kvm: Enable XSAVE live migration support
[qemu/stefanha.git] / disas.c
blob79a98ded8b73c807dc71e6dc0148c88219b469e7
1 /* General "disassemble this chunk" code. Used for debugging. */
2 #include "config.h"
3 #include "dis-asm.h"
4 #include "elf.h"
5 #include <errno.h>
7 #include "cpu.h"
8 #include "exec-all.h"
9 #include "disas.h"
11 /* Filled in by elfload.c. Simplistic, but will do for now. */
12 struct syminfo *syminfos = NULL;
14 /* Get LENGTH bytes from info's buffer, at target address memaddr.
15 Transfer them to myaddr. */
16 int
17 buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
18 struct disassemble_info *info)
20 if (memaddr < info->buffer_vma
21 || memaddr + length > info->buffer_vma + info->buffer_length)
22 /* Out of bounds. Use EIO because GDB uses it. */
23 return EIO;
24 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
25 return 0;
28 /* Get LENGTH bytes from info's buffer, at target address memaddr.
29 Transfer them to myaddr. */
30 static int
31 target_read_memory (bfd_vma memaddr,
32 bfd_byte *myaddr,
33 int length,
34 struct disassemble_info *info)
36 cpu_memory_rw_debug(cpu_single_env, memaddr, myaddr, length, 0);
37 return 0;
40 /* Print an error message. We can assume that this is in response to
41 an error return from buffer_read_memory. */
42 void
43 perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
45 if (status != EIO)
46 /* Can't happen. */
47 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
48 else
49 /* Actually, address between memaddr and memaddr + len was
50 out of bounds. */
51 (*info->fprintf_func) (info->stream,
52 "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
55 /* This could be in a separate file, to save miniscule amounts of space
56 in statically linked executables. */
58 /* Just print the address is hex. This is included for completeness even
59 though both GDB and objdump provide their own (to print symbolic
60 addresses). */
62 void
63 generic_print_address (bfd_vma addr, struct disassemble_info *info)
65 (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
68 /* Just return the given address. */
70 int
71 generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
73 return 1;
76 bfd_vma bfd_getl64 (const bfd_byte *addr)
78 unsigned long long v;
80 v = (unsigned long long) addr[0];
81 v |= (unsigned long long) addr[1] << 8;
82 v |= (unsigned long long) addr[2] << 16;
83 v |= (unsigned long long) addr[3] << 24;
84 v |= (unsigned long long) addr[4] << 32;
85 v |= (unsigned long long) addr[5] << 40;
86 v |= (unsigned long long) addr[6] << 48;
87 v |= (unsigned long long) addr[7] << 56;
88 return (bfd_vma) v;
91 bfd_vma bfd_getl32 (const bfd_byte *addr)
93 unsigned long v;
95 v = (unsigned long) addr[0];
96 v |= (unsigned long) addr[1] << 8;
97 v |= (unsigned long) addr[2] << 16;
98 v |= (unsigned long) addr[3] << 24;
99 return (bfd_vma) v;
102 bfd_vma bfd_getb32 (const bfd_byte *addr)
104 unsigned long v;
106 v = (unsigned long) addr[0] << 24;
107 v |= (unsigned long) addr[1] << 16;
108 v |= (unsigned long) addr[2] << 8;
109 v |= (unsigned long) addr[3];
110 return (bfd_vma) v;
113 bfd_vma bfd_getl16 (const bfd_byte *addr)
115 unsigned long v;
117 v = (unsigned long) addr[0];
118 v |= (unsigned long) addr[1] << 8;
119 return (bfd_vma) v;
122 bfd_vma bfd_getb16 (const bfd_byte *addr)
124 unsigned long v;
126 v = (unsigned long) addr[0] << 24;
127 v |= (unsigned long) addr[1] << 16;
128 return (bfd_vma) v;
131 #ifdef TARGET_ARM
132 static int
133 print_insn_thumb1(bfd_vma pc, disassemble_info *info)
135 return print_insn_arm(pc | 1, info);
137 #endif
139 /* Disassemble this for me please... (debugging). 'flags' has the following
140 values:
141 i386 - nonzero means 16 bit code
142 arm - nonzero means thumb code
143 ppc - nonzero means little endian
144 other targets - unused
146 void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
148 target_ulong pc;
149 int count;
150 struct disassemble_info disasm_info;
151 int (*print_insn)(bfd_vma pc, disassemble_info *info);
153 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
155 disasm_info.read_memory_func = target_read_memory;
156 disasm_info.buffer_vma = code;
157 disasm_info.buffer_length = size;
159 #ifdef TARGET_WORDS_BIGENDIAN
160 disasm_info.endian = BFD_ENDIAN_BIG;
161 #else
162 disasm_info.endian = BFD_ENDIAN_LITTLE;
163 #endif
164 #if defined(TARGET_I386)
165 if (flags == 2)
166 disasm_info.mach = bfd_mach_x86_64;
167 else if (flags == 1)
168 disasm_info.mach = bfd_mach_i386_i8086;
169 else
170 disasm_info.mach = bfd_mach_i386_i386;
171 print_insn = print_insn_i386;
172 #elif defined(TARGET_ARM)
173 if (flags)
174 print_insn = print_insn_thumb1;
175 else
176 print_insn = print_insn_arm;
177 #elif defined(TARGET_SPARC)
178 print_insn = print_insn_sparc;
179 #ifdef TARGET_SPARC64
180 disasm_info.mach = bfd_mach_sparc_v9b;
181 #endif
182 #elif defined(TARGET_PPC)
183 if (flags >> 16)
184 disasm_info.endian = BFD_ENDIAN_LITTLE;
185 if (flags & 0xFFFF) {
186 /* If we have a precise definitions of the instructions set, use it */
187 disasm_info.mach = flags & 0xFFFF;
188 } else {
189 #ifdef TARGET_PPC64
190 disasm_info.mach = bfd_mach_ppc64;
191 #else
192 disasm_info.mach = bfd_mach_ppc;
193 #endif
195 print_insn = print_insn_ppc;
196 #elif defined(TARGET_M68K)
197 print_insn = print_insn_m68k;
198 #elif defined(TARGET_MIPS)
199 #ifdef TARGET_WORDS_BIGENDIAN
200 print_insn = print_insn_big_mips;
201 #else
202 print_insn = print_insn_little_mips;
203 #endif
204 #elif defined(TARGET_SH4)
205 disasm_info.mach = bfd_mach_sh4;
206 print_insn = print_insn_sh;
207 #elif defined(TARGET_ALPHA)
208 disasm_info.mach = bfd_mach_alpha;
209 print_insn = print_insn_alpha;
210 #elif defined(TARGET_CRIS)
211 disasm_info.mach = bfd_mach_cris_v32;
212 print_insn = print_insn_crisv32;
213 #elif defined(TARGET_MICROBLAZE)
214 disasm_info.mach = bfd_arch_microblaze;
215 print_insn = print_insn_microblaze;
216 #else
217 fprintf(out, "0x" TARGET_FMT_lx
218 ": Asm output not supported on this arch\n", code);
219 return;
220 #endif
222 for (pc = code; size > 0; pc += count, size -= count) {
223 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
224 count = print_insn(pc, &disasm_info);
225 #if 0
227 int i;
228 uint8_t b;
229 fprintf(out, " {");
230 for(i = 0; i < count; i++) {
231 target_read_memory(pc + i, &b, 1, &disasm_info);
232 fprintf(out, " %02x", b);
234 fprintf(out, " }");
236 #endif
237 fprintf(out, "\n");
238 if (count < 0)
239 break;
240 if (size < count) {
241 fprintf(out,
242 "Disassembler disagrees with translator over instruction "
243 "decoding\n"
244 "Please report this to qemu-devel@nongnu.org\n");
245 break;
250 /* Disassemble this for me please... (debugging). */
251 void disas(FILE *out, void *code, unsigned long size)
253 unsigned long pc;
254 int count;
255 struct disassemble_info disasm_info;
256 int (*print_insn)(bfd_vma pc, disassemble_info *info);
258 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
260 disasm_info.buffer = code;
261 disasm_info.buffer_vma = (unsigned long)code;
262 disasm_info.buffer_length = size;
264 #ifdef HOST_WORDS_BIGENDIAN
265 disasm_info.endian = BFD_ENDIAN_BIG;
266 #else
267 disasm_info.endian = BFD_ENDIAN_LITTLE;
268 #endif
269 #if defined(__i386__)
270 disasm_info.mach = bfd_mach_i386_i386;
271 print_insn = print_insn_i386;
272 #elif defined(__x86_64__)
273 disasm_info.mach = bfd_mach_x86_64;
274 print_insn = print_insn_i386;
275 #elif defined(_ARCH_PPC)
276 print_insn = print_insn_ppc;
277 #elif defined(__alpha__)
278 print_insn = print_insn_alpha;
279 #elif defined(__sparc__)
280 print_insn = print_insn_sparc;
281 #if defined(__sparc_v8plus__) || defined(__sparc_v8plusa__) || defined(__sparc_v9__)
282 disasm_info.mach = bfd_mach_sparc_v9b;
283 #endif
284 #elif defined(__arm__)
285 print_insn = print_insn_arm;
286 #elif defined(__MIPSEB__)
287 print_insn = print_insn_big_mips;
288 #elif defined(__MIPSEL__)
289 print_insn = print_insn_little_mips;
290 #elif defined(__m68k__)
291 print_insn = print_insn_m68k;
292 #elif defined(__s390__)
293 print_insn = print_insn_s390;
294 #elif defined(__hppa__)
295 print_insn = print_insn_hppa;
296 #elif defined(__ia64__)
297 print_insn = print_insn_ia64;
298 #else
299 fprintf(out, "0x%lx: Asm output not supported on this arch\n",
300 (long) code);
301 return;
302 #endif
303 for (pc = (unsigned long)code; size > 0; pc += count, size -= count) {
304 fprintf(out, "0x%08lx: ", pc);
305 #ifdef __arm__
306 /* since data is included in the code, it is better to
307 display code data too */
308 fprintf(out, "%08x ", (int)bfd_getl32((const bfd_byte *)pc));
309 #endif
310 count = print_insn(pc, &disasm_info);
311 fprintf(out, "\n");
312 if (count < 0)
313 break;
317 /* Look up symbol for debugging purpose. Returns "" if unknown. */
318 const char *lookup_symbol(target_ulong orig_addr)
320 const char *symbol = "";
321 struct syminfo *s;
323 for (s = syminfos; s; s = s->next) {
324 symbol = s->lookup_symbol(s, orig_addr);
325 if (symbol[0] != '\0') {
326 break;
330 return symbol;
333 #if !defined(CONFIG_USER_ONLY)
335 #include "monitor.h"
337 static int monitor_disas_is_physical;
338 static CPUState *monitor_disas_env;
340 static int
341 monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
342 struct disassemble_info *info)
344 if (monitor_disas_is_physical) {
345 cpu_physical_memory_rw(memaddr, myaddr, length, 0);
346 } else {
347 cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
349 return 0;
352 static int monitor_fprintf(FILE *stream, const char *fmt, ...)
354 va_list ap;
355 va_start(ap, fmt);
356 monitor_vprintf((Monitor *)stream, fmt, ap);
357 va_end(ap);
358 return 0;
361 void monitor_disas(Monitor *mon, CPUState *env,
362 target_ulong pc, int nb_insn, int is_physical, int flags)
364 int count, i;
365 struct disassemble_info disasm_info;
366 int (*print_insn)(bfd_vma pc, disassemble_info *info);
368 INIT_DISASSEMBLE_INFO(disasm_info, (FILE *)mon, monitor_fprintf);
370 monitor_disas_env = env;
371 monitor_disas_is_physical = is_physical;
372 disasm_info.read_memory_func = monitor_read_memory;
374 disasm_info.buffer_vma = pc;
376 #ifdef TARGET_WORDS_BIGENDIAN
377 disasm_info.endian = BFD_ENDIAN_BIG;
378 #else
379 disasm_info.endian = BFD_ENDIAN_LITTLE;
380 #endif
381 #if defined(TARGET_I386)
382 if (flags == 2)
383 disasm_info.mach = bfd_mach_x86_64;
384 else if (flags == 1)
385 disasm_info.mach = bfd_mach_i386_i8086;
386 else
387 disasm_info.mach = bfd_mach_i386_i386;
388 print_insn = print_insn_i386;
389 #elif defined(TARGET_ARM)
390 print_insn = print_insn_arm;
391 #elif defined(TARGET_ALPHA)
392 print_insn = print_insn_alpha;
393 #elif defined(TARGET_SPARC)
394 print_insn = print_insn_sparc;
395 #ifdef TARGET_SPARC64
396 disasm_info.mach = bfd_mach_sparc_v9b;
397 #endif
398 #elif defined(TARGET_PPC)
399 #ifdef TARGET_PPC64
400 disasm_info.mach = bfd_mach_ppc64;
401 #else
402 disasm_info.mach = bfd_mach_ppc;
403 #endif
404 print_insn = print_insn_ppc;
405 #elif defined(TARGET_M68K)
406 print_insn = print_insn_m68k;
407 #elif defined(TARGET_MIPS)
408 #ifdef TARGET_WORDS_BIGENDIAN
409 print_insn = print_insn_big_mips;
410 #else
411 print_insn = print_insn_little_mips;
412 #endif
413 #elif defined(TARGET_SH4)
414 disasm_info.mach = bfd_mach_sh4;
415 print_insn = print_insn_sh;
416 #else
417 monitor_printf(mon, "0x" TARGET_FMT_lx
418 ": Asm output not supported on this arch\n", pc);
419 return;
420 #endif
422 for(i = 0; i < nb_insn; i++) {
423 monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
424 count = print_insn(pc, &disasm_info);
425 monitor_printf(mon, "\n");
426 if (count < 0)
427 break;
428 pc += count;
431 #endif