hw/mips_fulong2e.c

   1 /*
   2  * QEMU fulong 2e mini pc support
   3  *
   4  * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
   5  * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
   6  * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com)
   7  * This code is licensed under the GNU GPL v2.
   8  */
   9
  10 /*
  11  * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
  12  * http://www.linux-mips.org/wiki/Fulong
  13  *
  14  * Loongson 2e user manual:
  15  * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
  16  */
  17
  18 #include "hw.h"
  19 #include "pc.h"
  20 #include "fdc.h"
  21 #include "net.h"
  22 #include "boards.h"
  23 #include "smbus.h"
  24 #include "block.h"
  25 #include "flash.h"
  26 #include "mips.h"
  27 #include "mips_cpudevs.h"
  28 #include "pci.h"
  29 #include "usb-uhci.h"
  30 #include "qemu-char.h"
  31 #include "sysemu.h"
  32 #include "audio/audio.h"
  33 #include "qemu-log.h"
  34 #include "loader.h"
  35 #include "mips-bios.h"
  36 #include "ide.h"
  37 #include "elf.h"
  38 #include "vt82c686.h"
  39 #include "mc146818rtc.h"
  40 #include "blockdev.h"
  41
  42 #define DEBUG_FULONG2E_INIT
  43
  44 #define ENVP_ADDR       0x80002000l
  45 #define ENVP_NB_ENTRIES         16
  46 #define ENVP_ENTRY_SIZE         256
  47
  48 #define MAX_IDE_BUS 2
  49
  50 /*
  51  * PMON is not part of qemu and released with BSD license, anyone
  52  * who want to build a pmon binary please first git-clone the source
  53  * from the git repository at:
  54  * http://www.loongson.cn/support/git/pmon
  55  * Then follow the "Compile Guide" available at:
  56  * http://dev.lemote.com/code/pmon
  57  *
  58  * Notes:
  59  * 1, don't use the source at http://dev.lemote.com/http_git/pmon.git
  60  * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
  61  * in the "Compile Guide".
  62  */
  63 #define FULONG_BIOSNAME "pmon_fulong2e.bin"
  64
  65 /* PCI SLOT in fulong 2e */
  66 #define FULONG2E_VIA_SLOT        5
  67 #define FULONG2E_ATI_SLOT        6
  68 #define FULONG2E_RTL8139_SLOT    7
  69
  70 static PITState *pit;
  71
  72 static struct _loaderparams {
  73     int ram_size;
  74     const char *kernel_filename;
  75     const char *kernel_cmdline;
  76     const char *initrd_filename;
  77 } loaderparams;
  78
  79 static void prom_set(uint32_t* prom_buf, int index, const char *string, ...)
  80 {
  81     va_list ap;
  82     int32_t table_addr;
  83
  84     if (index >= ENVP_NB_ENTRIES)
  85         return;
  86
  87     if (string == NULL) {
  88         prom_buf[index] = 0;
  89         return;
  90     }
  91
  92     table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE;
  93     prom_buf[index] = tswap32(ENVP_ADDR + table_addr);
  94
  95     va_start(ap, string);
  96     vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap);
  97     va_end(ap);
  98 }
  99
 100 static int64_t load_kernel (CPUState *env)
 101 {
 102     int64_t kernel_entry, kernel_low, kernel_high;
 103     int index = 0;
 104     long initrd_size;
 105     ram_addr_t initrd_offset;
 106     uint32_t *prom_buf;
 107     long prom_size;
 108
 109     if (load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, NULL,
 110                  (uint64_t *)&kernel_entry, (uint64_t *)&kernel_low,
 111                  (uint64_t *)&kernel_high, 0, ELF_MACHINE, 1) < 0) {
 112         fprintf(stderr, "qemu: could not load kernel '%s'\n",
 113                 loaderparams.kernel_filename);
 114         exit(1);
 115     }
 116
 117     /* load initrd */
 118     initrd_size = 0;
 119     initrd_offset = 0;
 120     if (loaderparams.initrd_filename) {
 121         initrd_size = get_image_size (loaderparams.initrd_filename);
 122         if (initrd_size > 0) {
 123             initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
 124             if (initrd_offset + initrd_size > ram_size) {
 125                 fprintf(stderr,
 126                         "qemu: memory too small for initial ram disk '%s'\n",
 127                         loaderparams.initrd_filename);
 128                 exit(1);
 129             }
 130             initrd_size = load_image_targphys(loaderparams.initrd_filename,
 131                                      initrd_offset, ram_size - initrd_offset);
 132         }
 133         if (initrd_size == (target_ulong) -1) {
 134             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 135                     loaderparams.initrd_filename);
 136             exit(1);
 137         }
 138     }
 139
 140     /* Setup prom parameters. */
 141     prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE);
 142     prom_buf = qemu_malloc(prom_size);
 143
 144     prom_set(prom_buf, index++, loaderparams.kernel_filename);
 145     if (initrd_size > 0) {
 146         prom_set(prom_buf, index++, "rd_start=0x" PRIx64 " rd_size=%li %s",
 147                  cpu_mips_phys_to_kseg0(NULL, initrd_offset), initrd_size,
 148                  loaderparams.kernel_cmdline);
 149     } else {
 150         prom_set(prom_buf, index++, loaderparams.kernel_cmdline);
 151     }
 152
 153     /* Setup minimum environment variables */
 154     prom_set(prom_buf, index++, "busclock=33000000");
 155     prom_set(prom_buf, index++, "cpuclock=100000000");
 156     prom_set(prom_buf, index++, "memsize=%i", loaderparams.ram_size/1024/1024);
 157     prom_set(prom_buf, index++, "modetty0=38400n8r");
 158     prom_set(prom_buf, index++, NULL);
 159
 160     rom_add_blob_fixed("prom", prom_buf, prom_size,
 161                        cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR));
 162
 163     return kernel_entry;
 164 }
 165
 166 static void write_bootloader (CPUState *env, uint8_t *base, int64_t kernel_addr)
 167 {
 168     uint32_t *p;
 169
 170     /* Small bootloader */
 171     p = (uint32_t *) base;
 172
 173     stl_raw(p++, 0x0bf00010);                                      /* j 0x1fc00040 */
 174     stl_raw(p++, 0x00000000);                                      /* nop */
 175
 176     /* Second part of the bootloader */
 177     p = (uint32_t *) (base + 0x040);
 178
 179     stl_raw(p++, 0x3c040000);                                      /* lui a0, 0 */
 180     stl_raw(p++, 0x34840002);                                      /* ori a0, a0, 2 */
 181     stl_raw(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff));       /* lui a1, high(ENVP_ADDR) */
 182     stl_raw(p++, 0x34a50000 | (ENVP_ADDR & 0xffff));               /* ori a1, a0, low(ENVP_ADDR) */
 183     stl_raw(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff)); /* lui a2, high(ENVP_ADDR + 8) */
 184     stl_raw(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff));         /* ori a2, a2, low(ENVP_ADDR + 8) */
 185     stl_raw(p++, 0x3c070000 | (loaderparams.ram_size >> 16));      /* lui a3, high(env->ram_size) */
 186     stl_raw(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff));   /* ori a3, a3, low(env->ram_size) */
 187     stl_raw(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff));     /* lui ra, high(kernel_addr) */;
 188     stl_raw(p++, 0x37ff0000 | (kernel_addr & 0xffff));             /* ori ra, ra, low(kernel_addr) */
 189     stl_raw(p++, 0x03e00008);                                      /* jr ra */
 190     stl_raw(p++, 0x00000000);                                      /* nop */
 191 }
 192
 193
 194 static void main_cpu_reset(void *opaque)
 195 {
 196     CPUState *env = opaque;
 197
 198     cpu_reset(env);
 199     /* TODO: 2E reset stuff */
 200     if (loaderparams.kernel_filename) {
 201         env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
 202     }
 203 }
 204
 205 uint8_t eeprom_spd[0x80] = {
 206     0x80,0x08,0x07,0x0d,0x09,0x02,0x40,0x00,0x04,0x70,
 207     0x70,0x00,0x82,0x10,0x00,0x01,0x0e,0x04,0x0c,0x01,
 208     0x02,0x20,0x80,0x75,0x70,0x00,0x00,0x50,0x3c,0x50,
 209     0x2d,0x20,0xb0,0xb0,0x50,0x50,0x00,0x00,0x00,0x00,
 210     0x00,0x41,0x48,0x3c,0x32,0x75,0x00,0x00,0x00,0x00,
 211     0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 212     0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 213     0x00,0x00,0x00,0x9c,0x7b,0x07,0x00,0x00,0x00,0x00,
 214     0x00,0x00,0x00,0x00,0x48,0x42,0x35,0x34,0x41,0x32,
 215     0x35,0x36,0x38,0x4b,0x4e,0x2d,0x41,0x37,0x35,0x42,
 216     0x20,0x30,0x20
 217 };
 218
 219 /* Audio support */
 220 #ifdef HAS_AUDIO
 221 static void audio_init (PCIBus *pci_bus)
 222 {
 223     vt82c686b_ac97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 5));
 224     vt82c686b_mc97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 6));
 225 }
 226 #endif
 227
 228 /* Network support */
 229 static void network_init (void)
 230 {
 231     int i;
 232
 233     for(i = 0; i < nb_nics; i++) {
 234         NICInfo *nd = &nd_table[i];
 235         const char *default_devaddr = NULL;
 236
 237         if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
 238             /* The fulong board has a RTL8139 card using PCI SLOT 7 */
 239             default_devaddr = "07";
 240         }
 241
 242         pci_nic_init_nofail(nd, "rtl8139", default_devaddr);
 243     }
 244 }
 245
 246 static void cpu_request_exit(void *opaque, int irq, int level)
 247 {
 248     CPUState *env = cpu_single_env;
 249
 250     if (env && level) {
 251         cpu_exit(env);
 252     }
 253 }
 254
 255 static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device,
 256                         const char *kernel_filename, const char *kernel_cmdline,
 257                         const char *initrd_filename, const char *cpu_model)
 258 {
 259     char *filename;
 260     unsigned long ram_offset, bios_offset;
 261     unsigned long bios_size;
 262     int64_t kernel_entry;
 263     qemu_irq *i8259;
 264     qemu_irq *cpu_exit_irq;
 265     int via_devfn;
 266     PCIBus *pci_bus;
 267     ISADevice *isa_dev;
 268     uint8_t *eeprom_buf;
 269     i2c_bus *smbus;
 270     int i;
 271     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 272     DeviceState *eeprom;
 273     ISADevice *rtc_state;
 274     CPUState *env;
 275
 276     /* init CPUs */
 277     if (cpu_model == NULL) {
 278         cpu_model = "Loongson-2E";
 279     }
 280     env = cpu_init(cpu_model);
 281     if (!env) {
 282         fprintf(stderr, "Unable to find CPU definition\n");
 283         exit(1);
 284     }
 285
 286     register_savevm(NULL, "cpu", 0, 3, cpu_save, cpu_load, env);
 287     qemu_register_reset(main_cpu_reset, env);
 288
 289     /* fulong 2e has 256M ram. */
 290     ram_size = 256 * 1024 * 1024;
 291
 292     /* fulong 2e has a 1M flash.Winbond W39L040AP70Z */
 293     bios_size = 1024 * 1024;
 294
 295     /* allocate RAM */
 296     ram_offset = qemu_ram_alloc(NULL, "fulong2e.ram", ram_size);
 297     bios_offset = qemu_ram_alloc(NULL, "fulong2e.bios", bios_size);
 298
 299     cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
 300     cpu_register_physical_memory(0x1fc00000LL,
 301                                            bios_size, bios_offset | IO_MEM_ROM);
 302
 303     /* We do not support flash operation, just loading pmon.bin as raw BIOS.
 304      * Please use -L to set the BIOS path and -bios to set bios name. */
 305
 306     if (kernel_filename) {
 307         loaderparams.ram_size = ram_size;
 308         loaderparams.kernel_filename = kernel_filename;
 309         loaderparams.kernel_cmdline = kernel_cmdline;
 310         loaderparams.initrd_filename = initrd_filename;
 311         kernel_entry = load_kernel (env);
 312         write_bootloader(env, qemu_get_ram_ptr(bios_offset), kernel_entry);
 313     } else {
 314         if (bios_name == NULL) {
 315                 bios_name = FULONG_BIOSNAME;
 316         }
 317         filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 318         if (filename) {
 319             bios_size = load_image_targphys(filename, 0x1fc00000LL,
 320                                             BIOS_SIZE);
 321             qemu_free(filename);
 322         } else {
 323             bios_size = -1;
 324         }
 325
 326         if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) {
 327             fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n", bios_name);
 328             exit(1);
 329         }
 330     }
 331
 332     /* Init internal devices */
 333     cpu_mips_irq_init_cpu(env);
 334     cpu_mips_clock_init(env);
 335
 336     /* Interrupt controller */
 337     /* The 8259 -> IP5  */
 338     i8259 = i8259_init(env->irq[5]);
 339
 340     /* North bridge, Bonito --> IP2 */
 341     pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
 342
 343     /* South bridge */
 344     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 345         fprintf(stderr, "qemu: too many IDE bus\n");
 346         exit(1);
 347     }
 348
 349     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
 350         hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
 351     }
 352
 353     via_devfn = vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 0));
 354     if (via_devfn < 0) {
 355         fprintf(stderr, "vt82c686b_init error \n");
 356         exit(1);
 357     }
 358
 359     isa_bus_irqs(i8259);
 360     vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(FULONG2E_VIA_SLOT, 1));
 361     usb_uhci_vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 2));
 362     usb_uhci_vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 3));
 363
 364     smbus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 4),
 365                               0xeee1, NULL);
 366     eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
 367     memcpy(eeprom_buf, eeprom_spd, sizeof(eeprom_spd));
 368     /* TODO: Populate SPD eeprom data.  */
 369     eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
 370     qdev_prop_set_uint8(eeprom, "address", 0x50);
 371     qdev_prop_set_ptr(eeprom, "data", eeprom_buf);
 372     qdev_init_nofail(eeprom);
 373
 374     /* init other devices */
 375     pit = pit_init(0x40, isa_reserve_irq(0));
 376     cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
 377     DMA_init(0, cpu_exit_irq);
 378
 379     /* Super I/O */
 380     isa_dev = isa_create_simple("i8042");
 381
 382     rtc_state = rtc_init(2000, NULL);
 383
 384     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 385         if (serial_hds[i]) {
 386             serial_isa_init(i, serial_hds[i]);
 387         }
 388     }
 389
 390     if (parallel_hds[0]) {
 391         parallel_init(0, parallel_hds[0]);
 392     }
 393
 394     /* Sound card */
 395 #ifdef HAS_AUDIO
 396     audio_init(pci_bus);
 397 #endif
 398     /* Network card */
 399     network_init();
 400 }
 401
 402 QEMUMachine mips_fulong2e_machine = {
 403     .name = "fulong2e",
 404     .desc = "Fulong 2e mini pc",
 405     .init = mips_fulong2e_init,
 406 };
 407
 408 static void mips_fulong2e_machine_init(void)
 409 {
 410     qemu_register_machine(&mips_fulong2e_machine);
 411 }
 412
 413 machine_init(mips_fulong2e_machine_init);