hw/pc.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "hw.h"
  25 #include "pc.h"
  26 #include "apic.h"
  27 #include "fdc.h"
  28 #include "pci.h"
  29 #include "vmware_vga.h"
  30 #include "monitor.h"
  31 #include "fw_cfg.h"
  32 #include "hpet_emul.h"
  33 #include "smbios.h"
  34 #include "loader.h"
  35 #include "elf.h"
  36 #include "multiboot.h"
  37 #include "mc146818rtc.h"
  38 #include "sysemu.h"
  39
  40 /* output Bochs bios info messages */
  41 //#define DEBUG_BIOS
  42
  43 /* debug PC/ISA interrupts */
  44 //#define DEBUG_IRQ
  45
  46 #ifdef DEBUG_IRQ
  47 #define DPRINTF(fmt, ...)                                       \
  48     do { printf("CPUIRQ: " fmt , ## __VA_ARGS__); } while (0)
  49 #else
  50 #define DPRINTF(fmt, ...)
  51 #endif
  52
  53 #define BIOS_FILENAME "bios.bin"
  54
  55 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
  56
  57 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
  58 #define ACPI_DATA_SIZE       0x10000
  59 #define BIOS_CFG_IOPORT 0x510
  60 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
  61 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
  62 #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
  63 #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3)
  64
  65 #define E820_NR_ENTRIES         16
  66
  67 struct e820_entry {
  68     uint64_t address;
  69     uint64_t length;
  70     uint32_t type;
  71 };
  72
  73 struct e820_table {
  74     uint32_t count;
  75     struct e820_entry entry[E820_NR_ENTRIES];
  76 };
  77
  78 static struct e820_table e820_table;
  79
  80 void isa_irq_handler(void *opaque, int n, int level)
  81 {
  82     IsaIrqState *isa = (IsaIrqState *)opaque;
  83
  84     DPRINTF("isa_irqs: %s irq %d\n", level? "raise" : "lower", n);
  85     if (n < 16) {
  86         qemu_set_irq(isa->i8259[n], level);
  87     }
  88     if (isa->ioapic)
  89         qemu_set_irq(isa->ioapic[n], level);
  90 };
  91
  92 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
  93 {
  94 }
  95
  96 /* MSDOS compatibility mode FPU exception support */
  97 static qemu_irq ferr_irq;
  98
  99 void pc_register_ferr_irq(qemu_irq irq)
 100 {
 101     ferr_irq = irq;
 102 }
 103
 104 /* XXX: add IGNNE support */
 105 void cpu_set_ferr(CPUX86State *s)
 106 {
 107     qemu_irq_raise(ferr_irq);
 108 }
 109
 110 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
 111 {
 112     qemu_irq_lower(ferr_irq);
 113 }
 114
 115 /* TSC handling */
 116 uint64_t cpu_get_tsc(CPUX86State *env)
 117 {
 118     return cpu_get_ticks();
 119 }
 120
 121 /* SMM support */
 122
 123 static cpu_set_smm_t smm_set;
 124 static void *smm_arg;
 125
 126 void cpu_smm_register(cpu_set_smm_t callback, void *arg)
 127 {
 128     assert(smm_set == NULL);
 129     assert(smm_arg == NULL);
 130     smm_set = callback;
 131     smm_arg = arg;
 132 }
 133
 134 void cpu_smm_update(CPUState *env)
 135 {
 136     if (smm_set && smm_arg && env == first_cpu)
 137         smm_set(!!(env->hflags & HF_SMM_MASK), smm_arg);
 138 }
 139
 140
 141 /* IRQ handling */
 142 int cpu_get_pic_interrupt(CPUState *env)
 143 {
 144     int intno;
 145
 146     intno = apic_get_interrupt(env);
 147     if (intno >= 0) {
 148         /* set irq request if a PIC irq is still pending */
 149         /* XXX: improve that */
 150         pic_update_irq(isa_pic);
 151         return intno;
 152     }
 153     /* read the irq from the PIC */
 154     if (!apic_accept_pic_intr(env))
 155         return -1;
 156
 157     intno = pic_read_irq(isa_pic);
 158     return intno;
 159 }
 160
 161 static void pic_irq_request(void *opaque, int irq, int level)
 162 {
 163     CPUState *env = first_cpu;
 164
 165     DPRINTF("pic_irqs: %s irq %d\n", level? "raise" : "lower", irq);
 166     if (env->apic_state) {
 167         while (env) {
 168             if (apic_accept_pic_intr(env))
 169                 apic_deliver_pic_intr(env, level);
 170             env = env->next_cpu;
 171         }
 172     } else {
 173         if (level)
 174             cpu_interrupt(env, CPU_INTERRUPT_HARD);
 175         else
 176             cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
 177     }
 178 }
 179
 180 /* PC cmos mappings */
 181
 182 #define REG_EQUIPMENT_BYTE          0x14
 183
 184 static int cmos_get_fd_drive_type(int fd0)
 185 {
 186     int val;
 187
 188     switch (fd0) {
 189     case 0:
 190         /* 1.44 Mb 3"5 drive */
 191         val = 4;
 192         break;
 193     case 1:
 194         /* 2.88 Mb 3"5 drive */
 195         val = 5;
 196         break;
 197     case 2:
 198         /* 1.2 Mb 5"5 drive */
 199         val = 2;
 200         break;
 201     default:
 202         val = 0;
 203         break;
 204     }
 205     return val;
 206 }
 207
 208 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd,
 209                          ISADevice *s)
 210 {
 211     int cylinders, heads, sectors;
 212     bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
 213     rtc_set_memory(s, type_ofs, 47);
 214     rtc_set_memory(s, info_ofs, cylinders);
 215     rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
 216     rtc_set_memory(s, info_ofs + 2, heads);
 217     rtc_set_memory(s, info_ofs + 3, 0xff);
 218     rtc_set_memory(s, info_ofs + 4, 0xff);
 219     rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
 220     rtc_set_memory(s, info_ofs + 6, cylinders);
 221     rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
 222     rtc_set_memory(s, info_ofs + 8, sectors);
 223 }
 224
 225 /* convert boot_device letter to something recognizable by the bios */
 226 static int boot_device2nibble(char boot_device)
 227 {
 228     switch(boot_device) {
 229     case 'a':
 230     case 'b':
 231         return 0x01; /* floppy boot */
 232     case 'c':
 233         return 0x02; /* hard drive boot */
 234     case 'd':
 235         return 0x03; /* CD-ROM boot */
 236     case 'n':
 237         return 0x04; /* Network boot */
 238     }
 239     return 0;
 240 }
 241
 242 static int set_boot_dev(ISADevice *s, const char *boot_device, int fd_bootchk)
 243 {
 244 #define PC_MAX_BOOT_DEVICES 3
 245     int nbds, bds[3] = { 0, };
 246     int i;
 247
 248     nbds = strlen(boot_device);
 249     if (nbds > PC_MAX_BOOT_DEVICES) {
 250         error_report("Too many boot devices for PC");
 251         return(1);
 252     }
 253     for (i = 0; i < nbds; i++) {
 254         bds[i] = boot_device2nibble(boot_device[i]);
 255         if (bds[i] == 0) {
 256             error_report("Invalid boot device for PC: '%c'",
 257                          boot_device[i]);
 258             return(1);
 259         }
 260     }
 261     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 262     rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1));
 263     return(0);
 264 }
 265
 266 static int pc_boot_set(void *opaque, const char *boot_device)
 267 {
 268     return set_boot_dev(opaque, boot_device, 0);
 269 }
 270
 271 /* hd_table must contain 4 block drivers */
 272 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 273                   const char *boot_device, DriveInfo **hd_table,
 274                   FDCtrl *floppy_controller, ISADevice *s)
 275 {
 276     int val;
 277     int fd0, fd1, nb;
 278     int i;
 279
 280     /* various important CMOS locations needed by PC/Bochs bios */
 281
 282     /* memory size */
 283     val = 640; /* base memory in K */
 284     rtc_set_memory(s, 0x15, val);
 285     rtc_set_memory(s, 0x16, val >> 8);
 286
 287     val = (ram_size / 1024) - 1024;
 288     if (val > 65535)
 289         val = 65535;
 290     rtc_set_memory(s, 0x17, val);
 291     rtc_set_memory(s, 0x18, val >> 8);
 292     rtc_set_memory(s, 0x30, val);
 293     rtc_set_memory(s, 0x31, val >> 8);
 294
 295     if (above_4g_mem_size) {
 296         rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
 297         rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
 298         rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
 299     }
 300
 301     if (ram_size > (16 * 1024 * 1024))
 302         val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 303     else
 304         val = 0;
 305     if (val > 65535)
 306         val = 65535;
 307     rtc_set_memory(s, 0x34, val);
 308     rtc_set_memory(s, 0x35, val >> 8);
 309
 310     /* set the number of CPU */
 311     rtc_set_memory(s, 0x5f, smp_cpus - 1);
 312
 313     /* set boot devices, and disable floppy signature check if requested */
 314     if (set_boot_dev(s, boot_device, fd_bootchk)) {
 315         exit(1);
 316     }
 317
 318     /* floppy type */
 319
 320     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 321     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 322
 323     val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
 324     rtc_set_memory(s, 0x10, val);
 325
 326     val = 0;
 327     nb = 0;
 328     if (fd0 < 3)
 329         nb++;
 330     if (fd1 < 3)
 331         nb++;
 332     switch (nb) {
 333     case 0:
 334         break;
 335     case 1:
 336         val |= 0x01; /* 1 drive, ready for boot */
 337         break;
 338     case 2:
 339         val |= 0x41; /* 2 drives, ready for boot */
 340         break;
 341     }
 342     val |= 0x02; /* FPU is there */
 343     val |= 0x04; /* PS/2 mouse installed */
 344     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 345
 346     /* hard drives */
 347
 348     rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
 349     if (hd_table[0])
 350         cmos_init_hd(0x19, 0x1b, hd_table[0]->bdrv, s);
 351     if (hd_table[1])
 352         cmos_init_hd(0x1a, 0x24, hd_table[1]->bdrv, s);
 353
 354     val = 0;
 355     for (i = 0; i < 4; i++) {
 356         if (hd_table[i]) {
 357             int cylinders, heads, sectors, translation;
 358             /* NOTE: bdrv_get_geometry_hint() returns the physical
 359                 geometry.  It is always such that: 1 <= sects <= 63, 1
 360                 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
 361                 geometry can be different if a translation is done. */
 362             translation = bdrv_get_translation_hint(hd_table[i]->bdrv);
 363             if (translation == BIOS_ATA_TRANSLATION_AUTO) {
 364                 bdrv_get_geometry_hint(hd_table[i]->bdrv, &cylinders, &heads, &sectors);
 365                 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
 366                     /* No translation. */
 367                     translation = 0;
 368                 } else {
 369                     /* LBA translation. */
 370                     translation = 1;
 371                 }
 372             } else {
 373                 translation--;
 374             }
 375             val |= translation << (i * 2);
 376         }
 377     }
 378     rtc_set_memory(s, 0x39, val);
 379 }
 380
 381 static void handle_a20_line_change(void *opaque, int irq, int level)
 382 {
 383     CPUState *cpu = opaque;
 384
 385     /* XXX: send to all CPUs ? */
 386     cpu_x86_set_a20(cpu, level);
 387 }
 388
 389 /***********************************************************/
 390 /* Bochs BIOS debug ports */
 391
 392 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 393 {
 394     static const char shutdown_str[8] = "Shutdown";
 395     static int shutdown_index = 0;
 396
 397     switch(addr) {
 398         /* Bochs BIOS messages */
 399     case 0x400:
 400     case 0x401:
 401         fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
 402         exit(1);
 403     case 0x402:
 404     case 0x403:
 405 #ifdef DEBUG_BIOS
 406         fprintf(stderr, "%c", val);
 407 #endif
 408         break;
 409     case 0x8900:
 410         /* same as Bochs power off */
 411         if (val == shutdown_str[shutdown_index]) {
 412             shutdown_index++;
 413             if (shutdown_index == 8) {
 414                 shutdown_index = 0;
 415                 qemu_system_shutdown_request();
 416             }
 417         } else {
 418             shutdown_index = 0;
 419         }
 420         break;
 421
 422         /* LGPL'ed VGA BIOS messages */
 423     case 0x501:
 424     case 0x502:
 425         fprintf(stderr, "VGA BIOS panic, line %d\n", val);
 426         exit(1);
 427     case 0x500:
 428     case 0x503:
 429 #ifdef DEBUG_BIOS
 430         fprintf(stderr, "%c", val);
 431 #endif
 432         break;
 433     }
 434 }
 435
 436 int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
 437 {
 438     int index = e820_table.count;
 439     struct e820_entry *entry;
 440
 441     if (index >= E820_NR_ENTRIES)
 442         return -EBUSY;
 443     entry = &e820_table.entry[index];
 444
 445     entry->address = address;
 446     entry->length = length;
 447     entry->type = type;
 448
 449     e820_table.count++;
 450     return e820_table.count;
 451 }
 452
 453 static void *bochs_bios_init(void)
 454 {
 455     void *fw_cfg;
 456     uint8_t *smbios_table;
 457     size_t smbios_len;
 458     uint64_t *numa_fw_cfg;
 459     int i, j;
 460
 461     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
 462     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
 463     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
 464     register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
 465     register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
 466
 467     register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
 468     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
 469     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
 470     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
 471
 472     fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
 473
 474     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 475     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 476     fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
 477                      acpi_tables_len);
 478     fw_cfg_add_bytes(fw_cfg, FW_CFG_IRQ0_OVERRIDE, &irq0override, 1);
 479
 480     smbios_table = smbios_get_table(&smbios_len);
 481     if (smbios_table)
 482         fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
 483                          smbios_table, smbios_len);
 484     fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE, (uint8_t *)&e820_table,
 485                      sizeof(struct e820_table));
 486
 487     /* allocate memory for the NUMA channel: one (64bit) word for the number
 488      * of nodes, one word for each VCPU->node and one word for each node to
 489      * hold the amount of memory.
 490      */
 491     numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8);
 492     numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
 493     for (i = 0; i < smp_cpus; i++) {
 494         for (j = 0; j < nb_numa_nodes; j++) {
 495             if (node_cpumask[j] & (1 << i)) {
 496                 numa_fw_cfg[i + 1] = cpu_to_le64(j);
 497                 break;
 498             }
 499         }
 500     }
 501     for (i = 0; i < nb_numa_nodes; i++) {
 502         numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
 503     }
 504     fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
 505                      (1 + smp_cpus + nb_numa_nodes) * 8);
 506
 507     return fw_cfg;
 508 }
 509
 510 static long get_file_size(FILE *f)
 511 {
 512     long where, size;
 513
 514     /* XXX: on Unix systems, using fstat() probably makes more sense */
 515
 516     where = ftell(f);
 517     fseek(f, 0, SEEK_END);
 518     size = ftell(f);
 519     fseek(f, where, SEEK_SET);
 520
 521     return size;
 522 }
 523
 524 static void load_linux(void *fw_cfg,
 525                        const char *kernel_filename,
 526                        const char *initrd_filename,
 527                        const char *kernel_cmdline,
 528                        target_phys_addr_t max_ram_size)
 529 {
 530     uint16_t protocol;
 531     int setup_size, kernel_size, initrd_size = 0, cmdline_size;
 532     uint32_t initrd_max;
 533     uint8_t header[8192], *setup, *kernel, *initrd_data;
 534     target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
 535     FILE *f;
 536     char *vmode;
 537
 538     /* Align to 16 bytes as a paranoia measure */
 539     cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
 540
 541     /* load the kernel header */
 542     f = fopen(kernel_filename, "rb");
 543     if (!f || !(kernel_size = get_file_size(f)) ||
 544         fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) !=
 545         MIN(ARRAY_SIZE(header), kernel_size)) {
 546         fprintf(stderr, "qemu: could not load kernel '%s': %s\n",
 547                 kernel_filename, strerror(errno));
 548         exit(1);
 549     }
 550
 551     /* kernel protocol version */
 552 #if 0
 553     fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
 554 #endif
 555     if (ldl_p(header+0x202) == 0x53726448)
 556         protocol = lduw_p(header+0x206);
 557     else {
 558         /* This looks like a multiboot kernel. If it is, let's stop
 559            treating it like a Linux kernel. */
 560         if (load_multiboot(fw_cfg, f, kernel_filename, initrd_filename,
 561                            kernel_cmdline, kernel_size, header))
 562             return;
 563         protocol = 0;
 564     }
 565
 566     if (protocol < 0x200 || !(header[0x211] & 0x01)) {
 567         /* Low kernel */
 568         real_addr    = 0x90000;
 569         cmdline_addr = 0x9a000 - cmdline_size;
 570         prot_addr    = 0x10000;
 571     } else if (protocol < 0x202) {
 572         /* High but ancient kernel */
 573         real_addr    = 0x90000;
 574         cmdline_addr = 0x9a000 - cmdline_size;
 575         prot_addr    = 0x100000;
 576     } else {
 577         /* High and recent kernel */
 578         real_addr    = 0x10000;
 579         cmdline_addr = 0x20000;
 580         prot_addr    = 0x100000;
 581     }
 582
 583 #if 0
 584     fprintf(stderr,
 585             "qemu: real_addr     = 0x" TARGET_FMT_plx "\n"
 586             "qemu: cmdline_addr  = 0x" TARGET_FMT_plx "\n"
 587             "qemu: prot_addr     = 0x" TARGET_FMT_plx "\n",
 588             real_addr,
 589             cmdline_addr,
 590             prot_addr);
 591 #endif
 592
 593     /* highest address for loading the initrd */
 594     if (protocol >= 0x203)
 595         initrd_max = ldl_p(header+0x22c);
 596     else
 597         initrd_max = 0x37ffffff;
 598
 599     if (initrd_max >= max_ram_size-ACPI_DATA_SIZE)
 600         initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
 601
 602     fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_ADDR, cmdline_addr);
 603     fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(kernel_cmdline)+1);
 604     fw_cfg_add_bytes(fw_cfg, FW_CFG_CMDLINE_DATA,
 605                      (uint8_t*)strdup(kernel_cmdline),
 606                      strlen(kernel_cmdline)+1);
 607
 608     if (protocol >= 0x202) {
 609         stl_p(header+0x228, cmdline_addr);
 610     } else {
 611         stw_p(header+0x20, 0xA33F);
 612         stw_p(header+0x22, cmdline_addr-real_addr);
 613     }
 614
 615     /* handle vga= parameter */
 616     vmode = strstr(kernel_cmdline, "vga=");
 617     if (vmode) {
 618         unsigned int video_mode;
 619         /* skip "vga=" */
 620         vmode += 4;
 621         if (!strncmp(vmode, "normal", 6)) {
 622             video_mode = 0xffff;
 623         } else if (!strncmp(vmode, "ext", 3)) {
 624             video_mode = 0xfffe;
 625         } else if (!strncmp(vmode, "ask", 3)) {
 626             video_mode = 0xfffd;
 627         } else {
 628             video_mode = strtol(vmode, NULL, 0);
 629         }
 630         stw_p(header+0x1fa, video_mode);
 631     }
 632
 633     /* loader type */
 634     /* High nybble = B reserved for Qemu; low nybble is revision number.
 635        If this code is substantially changed, you may want to consider
 636        incrementing the revision. */
 637     if (protocol >= 0x200)
 638         header[0x210] = 0xB0;
 639
 640     /* heap */
 641     if (protocol >= 0x201) {
 642         header[0x211] |= 0x80;  /* CAN_USE_HEAP */
 643         stw_p(header+0x224, cmdline_addr-real_addr-0x200);
 644     }
 645
 646     /* load initrd */
 647     if (initrd_filename) {
 648         if (protocol < 0x200) {
 649             fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
 650             exit(1);
 651         }
 652
 653         initrd_size = get_image_size(initrd_filename);
 654         if (initrd_size < 0) {
 655             fprintf(stderr, "qemu: error reading initrd %s\n",
 656                     initrd_filename);
 657             exit(1);
 658         }
 659
 660         initrd_addr = (initrd_max-initrd_size) & ~4095;
 661
 662         initrd_data = qemu_malloc(initrd_size);
 663         load_image(initrd_filename, initrd_data);
 664
 665         fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr);
 666         fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
 667         fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, initrd_data, initrd_size);
 668
 669         stl_p(header+0x218, initrd_addr);
 670         stl_p(header+0x21c, initrd_size);
 671     }
 672
 673     /* load kernel and setup */
 674     setup_size = header[0x1f1];
 675     if (setup_size == 0)
 676         setup_size = 4;
 677     setup_size = (setup_size+1)*512;
 678     kernel_size -= setup_size;
 679
 680     setup  = qemu_malloc(setup_size);
 681     kernel = qemu_malloc(kernel_size);
 682     fseek(f, 0, SEEK_SET);
 683     if (fread(setup, 1, setup_size, f) != setup_size) {
 684         fprintf(stderr, "fread() failed\n");
 685         exit(1);
 686     }
 687     if (fread(kernel, 1, kernel_size, f) != kernel_size) {
 688         fprintf(stderr, "fread() failed\n");
 689         exit(1);
 690     }
 691     fclose(f);
 692     memcpy(setup, header, MIN(sizeof(header), setup_size));
 693
 694     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, prot_addr);
 695     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
 696     fw_cfg_add_bytes(fw_cfg, FW_CFG_KERNEL_DATA, kernel, kernel_size);
 697
 698     fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_ADDR, real_addr);
 699     fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_SIZE, setup_size);
 700     fw_cfg_add_bytes(fw_cfg, FW_CFG_SETUP_DATA, setup, setup_size);
 701
 702     option_rom[nb_option_roms] = "linuxboot.bin";
 703     nb_option_roms++;
 704 }
 705
 706 #define NE2000_NB_MAX 6
 707
 708 static const int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360,
 709                                               0x280, 0x380 };
 710 static const int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 711
 712 static const int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
 713 static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 714
 715 #ifdef HAS_AUDIO
 716 void pc_audio_init (PCIBus *pci_bus, qemu_irq *pic)
 717 {
 718     struct soundhw *c;
 719
 720     for (c = soundhw; c->name; ++c) {
 721         if (c->enabled) {
 722             if (c->isa) {
 723                 c->init.init_isa(pic);
 724             } else {
 725                 if (pci_bus) {
 726                     c->init.init_pci(pci_bus);
 727                 }
 728             }
 729         }
 730     }
 731 }
 732 #endif
 733
 734 void pc_init_ne2k_isa(NICInfo *nd)
 735 {
 736     static int nb_ne2k = 0;
 737
 738     if (nb_ne2k == NE2000_NB_MAX)
 739         return;
 740     isa_ne2000_init(ne2000_io[nb_ne2k],
 741                     ne2000_irq[nb_ne2k], nd);
 742     nb_ne2k++;
 743 }
 744
 745 int cpu_is_bsp(CPUState *env)
 746 {
 747     /* We hard-wire the BSP to the first CPU. */
 748     return env->cpu_index == 0;
 749 }
 750
 751 /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
 752    BIOS will read it and start S3 resume at POST Entry */
 753 void pc_cmos_set_s3_resume(void *opaque, int irq, int level)
 754 {
 755     ISADevice *s = opaque;
 756
 757     if (level) {
 758         rtc_set_memory(s, 0xF, 0xFE);
 759     }
 760 }
 761
 762 void pc_acpi_smi_interrupt(void *opaque, int irq, int level)
 763 {
 764     CPUState *s = opaque;
 765
 766     if (level) {
 767         cpu_interrupt(s, CPU_INTERRUPT_SMI);
 768     }
 769 }
 770
 771 static CPUState *pc_new_cpu(const char *cpu_model)
 772 {
 773     CPUState *env;
 774
 775     env = cpu_init(cpu_model);
 776     if (!env) {
 777         fprintf(stderr, "Unable to find x86 CPU definition\n");
 778         exit(1);
 779     }
 780     if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
 781         env->cpuid_apic_id = env->cpu_index;
 782         /* APIC reset callback resets cpu */
 783         apic_init(env);
 784     } else {
 785         qemu_register_reset((QEMUResetHandler*)cpu_reset, env);
 786     }
 787     return env;
 788 }
 789
 790 void pc_cpus_init(const char *cpu_model)
 791 {
 792     int i;
 793
 794     /* init CPUs */
 795     if (cpu_model == NULL) {
 796 #ifdef TARGET_X86_64
 797         cpu_model = "qemu64";
 798 #else
 799         cpu_model = "qemu32";
 800 #endif
 801     }
 802
 803     for(i = 0; i < smp_cpus; i++) {
 804         pc_new_cpu(cpu_model);
 805     }
 806 }
 807
 808 void pc_memory_init(ram_addr_t ram_size,
 809                     const char *kernel_filename,
 810                     const char *kernel_cmdline,
 811                     const char *initrd_filename,
 812                     ram_addr_t *below_4g_mem_size_p,
 813                     ram_addr_t *above_4g_mem_size_p)
 814 {
 815     char *filename;
 816     int ret, linux_boot, i;
 817     ram_addr_t ram_addr, bios_offset, option_rom_offset;
 818     ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
 819     int bios_size, isa_bios_size;
 820     void *fw_cfg;
 821
 822     if (ram_size >= 0xe0000000 ) {
 823         above_4g_mem_size = ram_size - 0xe0000000;
 824         below_4g_mem_size = 0xe0000000;
 825     } else {
 826         below_4g_mem_size = ram_size;
 827     }
 828     *above_4g_mem_size_p = above_4g_mem_size;
 829     *below_4g_mem_size_p = below_4g_mem_size;
 830
 831     linux_boot = (kernel_filename != NULL);
 832
 833     /* allocate RAM */
 834     ram_addr = qemu_ram_alloc(below_4g_mem_size);
 835     cpu_register_physical_memory(0, 0xa0000, ram_addr);
 836     cpu_register_physical_memory(0x100000,
 837                  below_4g_mem_size - 0x100000,
 838                  ram_addr + 0x100000);
 839
 840     /* above 4giga memory allocation */
 841     if (above_4g_mem_size > 0) {
 842 #if TARGET_PHYS_ADDR_BITS == 32
 843         hw_error("To much RAM for 32-bit physical address");
 844 #else
 845         ram_addr = qemu_ram_alloc(above_4g_mem_size);
 846         cpu_register_physical_memory(0x100000000ULL,
 847                                      above_4g_mem_size,
 848                                      ram_addr);
 849 #endif
 850     }
 851
 852
 853     /* BIOS load */
 854     if (bios_name == NULL)
 855         bios_name = BIOS_FILENAME;
 856     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 857     if (filename) {
 858         bios_size = get_image_size(filename);
 859     } else {
 860         bios_size = -1;
 861     }
 862     if (bios_size <= 0 ||
 863         (bios_size % 65536) != 0) {
 864         goto bios_error;
 865     }
 866     bios_offset = qemu_ram_alloc(bios_size);
 867     ret = rom_add_file_fixed(bios_name, (uint32_t)(-bios_size));
 868     if (ret != 0) {
 869     bios_error:
 870         fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name);
 871         exit(1);
 872     }
 873     if (filename) {
 874         qemu_free(filename);
 875     }
 876     /* map the last 128KB of the BIOS in ISA space */
 877     isa_bios_size = bios_size;
 878     if (isa_bios_size > (128 * 1024))
 879         isa_bios_size = 128 * 1024;
 880     cpu_register_physical_memory(0x100000 - isa_bios_size,
 881                                  isa_bios_size,
 882                                  (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
 883
 884     option_rom_offset = qemu_ram_alloc(PC_ROM_SIZE);
 885     cpu_register_physical_memory(PC_ROM_MIN_VGA, PC_ROM_SIZE, option_rom_offset);
 886
 887     /* map all the bios at the top of memory */
 888     cpu_register_physical_memory((uint32_t)(-bios_size),
 889                                  bios_size, bios_offset | IO_MEM_ROM);
 890
 891     fw_cfg = bochs_bios_init();
 892     rom_set_fw(fw_cfg);
 893
 894     if (linux_boot) {
 895         load_linux(fw_cfg, kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size);
 896     }
 897
 898     for (i = 0; i < nb_option_roms; i++) {
 899         rom_add_option(option_rom[i]);
 900     }
 901 }
 902
 903 qemu_irq *pc_allocate_cpu_irq(void)
 904 {
 905     return qemu_allocate_irqs(pic_irq_request, NULL, 1);
 906 }
 907
 908 void pc_vga_init(PCIBus *pci_bus)
 909 {
 910     if (cirrus_vga_enabled) {
 911         if (pci_bus) {
 912             pci_cirrus_vga_init(pci_bus);
 913         } else {
 914             isa_cirrus_vga_init();
 915         }
 916     } else if (vmsvga_enabled) {
 917         if (pci_bus)
 918             pci_vmsvga_init(pci_bus);
 919         else
 920             fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
 921     } else if (std_vga_enabled) {
 922         if (pci_bus) {
 923             pci_vga_init(pci_bus, 0, 0);
 924         } else {
 925             isa_vga_init();
 926         }
 927     }
 928 }
 929
 930 static void cpu_request_exit(void *opaque, int irq, int level)
 931 {
 932     CPUState *env = cpu_single_env;
 933
 934     if (env && level) {
 935         cpu_exit(env);
 936     }
 937 }
 938
 939 void pc_basic_device_init(qemu_irq *isa_irq,
 940                           FDCtrl **floppy_controller,
 941                           ISADevice **rtc_state)
 942 {
 943     int i;
 944     DriveInfo *fd[MAX_FD];
 945     PITState *pit;
 946     qemu_irq *a20_line;
 947     ISADevice *i8042;
 948     qemu_irq *cpu_exit_irq;
 949
 950     register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
 951
 952     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 953
 954     *rtc_state = rtc_init(2000);
 955
 956     qemu_register_boot_set(pc_boot_set, *rtc_state);
 957
 958     pit = pit_init(0x40, isa_reserve_irq(0));
 959     pcspk_init(pit);
 960     if (!no_hpet) {
 961         hpet_init(isa_irq);
 962     }
 963
 964     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
 965         if (serial_hds[i]) {
 966             serial_isa_init(i, serial_hds[i]);
 967         }
 968     }
 969
 970     for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
 971         if (parallel_hds[i]) {
 972             parallel_init(i, parallel_hds[i]);
 973         }
 974     }
 975
 976     a20_line = qemu_allocate_irqs(handle_a20_line_change, first_cpu, 1);
 977     i8042 = isa_create_simple("i8042");
 978     i8042_setup_a20_line(i8042, a20_line);
 979     vmmouse_init(i8042);
 980
 981     cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
 982     DMA_init(0, cpu_exit_irq);
 983
 984     for(i = 0; i < MAX_FD; i++) {
 985         fd[i] = drive_get(IF_FLOPPY, 0, i);
 986     }
 987     *floppy_controller = fdctrl_init_isa(fd);
 988 }
 989
 990 void pc_pci_device_init(PCIBus *pci_bus)
 991 {
 992     int max_bus;
 993     int bus;
 994
 995     max_bus = drive_get_max_bus(IF_SCSI);
 996     for (bus = 0; bus <= max_bus; bus++) {
 997         pci_create_simple(pci_bus, -1, "lsi53c895a");
 998     }
 999 }