hw/pckbd.c

   1 /*
   2  * QEMU PC keyboard emulation
   3  *
   4  * Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "hw.h"
  25 #include "isa.h"
  26 #include "pc.h"
  27 #include "ps2.h"
  28 #include "sysemu.h"
  29
  30 /* debug PC keyboard */
  31 //#define DEBUG_KBD
  32 #ifdef DEBUG_KBD
  33 #define DPRINTF(fmt, ...)                                       \
  34     do { printf("KBD: " fmt , ## __VA_ARGS__); } while (0)
  35 #else
  36 #define DPRINTF(fmt, ...)
  37 #endif
  38
  39 /*      Keyboard Controller Commands */
  40 #define KBD_CCMD_READ_MODE      0x20    /* Read mode bits */
  41 #define KBD_CCMD_WRITE_MODE     0x60    /* Write mode bits */
  42 #define KBD_CCMD_GET_VERSION    0xA1    /* Get controller version */
  43 #define KBD_CCMD_MOUSE_DISABLE  0xA7    /* Disable mouse interface */
  44 #define KBD_CCMD_MOUSE_ENABLE   0xA8    /* Enable mouse interface */
  45 #define KBD_CCMD_TEST_MOUSE     0xA9    /* Mouse interface test */
  46 #define KBD_CCMD_SELF_TEST      0xAA    /* Controller self test */
  47 #define KBD_CCMD_KBD_TEST       0xAB    /* Keyboard interface test */
  48 #define KBD_CCMD_KBD_DISABLE    0xAD    /* Keyboard interface disable */
  49 #define KBD_CCMD_KBD_ENABLE     0xAE    /* Keyboard interface enable */
  50 #define KBD_CCMD_READ_INPORT    0xC0    /* read input port */
  51 #define KBD_CCMD_READ_OUTPORT   0xD0    /* read output port */
  52 #define KBD_CCMD_WRITE_OUTPORT  0xD1    /* write output port */
  53 #define KBD_CCMD_WRITE_OBUF     0xD2
  54 #define KBD_CCMD_WRITE_AUX_OBUF 0xD3    /* Write to output buffer as if
  55                                            initiated by the auxiliary device */
  56 #define KBD_CCMD_WRITE_MOUSE    0xD4    /* Write the following byte to the mouse */
  57 #define KBD_CCMD_DISABLE_A20    0xDD    /* HP vectra only ? */
  58 #define KBD_CCMD_ENABLE_A20     0xDF    /* HP vectra only ? */
  59 #define KBD_CCMD_PULSE_BITS_3_0 0xF0    /* Pulse bits 3-0 of the output port P2. */
  60 #define KBD_CCMD_RESET          0xFE    /* Pulse bit 0 of the output port P2 = CPU reset. */
  61 #define KBD_CCMD_NO_OP          0xFF    /* Pulse no bits of the output port P2. */
  62
  63 /* Keyboard Commands */
  64 #define KBD_CMD_SET_LEDS        0xED    /* Set keyboard leds */
  65 #define KBD_CMD_ECHO            0xEE
  66 #define KBD_CMD_GET_ID          0xF2    /* get keyboard ID */
  67 #define KBD_CMD_SET_RATE        0xF3    /* Set typematic rate */
  68 #define KBD_CMD_ENABLE          0xF4    /* Enable scanning */
  69 #define KBD_CMD_RESET_DISABLE   0xF5    /* reset and disable scanning */
  70 #define KBD_CMD_RESET_ENABLE    0xF6    /* reset and enable scanning */
  71 #define KBD_CMD_RESET           0xFF    /* Reset */
  72
  73 /* Keyboard Replies */
  74 #define KBD_REPLY_POR           0xAA    /* Power on reset */
  75 #define KBD_REPLY_ACK           0xFA    /* Command ACK */
  76 #define KBD_REPLY_RESEND        0xFE    /* Command NACK, send the cmd again */
  77
  78 /* Status Register Bits */
  79 #define KBD_STAT_OBF            0x01    /* Keyboard output buffer full */
  80 #define KBD_STAT_IBF            0x02    /* Keyboard input buffer full */
  81 #define KBD_STAT_SELFTEST       0x04    /* Self test successful */
  82 #define KBD_STAT_CMD            0x08    /* Last write was a command write (0=data) */
  83 #define KBD_STAT_UNLOCKED       0x10    /* Zero if keyboard locked */
  84 #define KBD_STAT_MOUSE_OBF      0x20    /* Mouse output buffer full */
  85 #define KBD_STAT_GTO            0x40    /* General receive/xmit timeout */
  86 #define KBD_STAT_PERR           0x80    /* Parity error */
  87
  88 /* Controller Mode Register Bits */
  89 #define KBD_MODE_KBD_INT        0x01    /* Keyboard data generate IRQ1 */
  90 #define KBD_MODE_MOUSE_INT      0x02    /* Mouse data generate IRQ12 */
  91 #define KBD_MODE_SYS            0x04    /* The system flag (?) */
  92 #define KBD_MODE_NO_KEYLOCK     0x08    /* The keylock doesn't affect the keyboard if set */
  93 #define KBD_MODE_DISABLE_KBD    0x10    /* Disable keyboard interface */
  94 #define KBD_MODE_DISABLE_MOUSE  0x20    /* Disable mouse interface */
  95 #define KBD_MODE_KCC            0x40    /* Scan code conversion to PC format */
  96 #define KBD_MODE_RFU            0x80
  97
  98 /* Output Port Bits */
  99 #define KBD_OUT_RESET           0x01    /* 1=normal mode, 0=reset */
 100 #define KBD_OUT_A20             0x02    /* x86 only */
 101 #define KBD_OUT_OBF             0x10    /* Keyboard output buffer full */
 102 #define KBD_OUT_MOUSE_OBF       0x20    /* Mouse output buffer full */
 103
 104 /* Mouse Commands */
 105 #define AUX_SET_SCALE11         0xE6    /* Set 1:1 scaling */
 106 #define AUX_SET_SCALE21         0xE7    /* Set 2:1 scaling */
 107 #define AUX_SET_RES             0xE8    /* Set resolution */
 108 #define AUX_GET_SCALE           0xE9    /* Get scaling factor */
 109 #define AUX_SET_STREAM          0xEA    /* Set stream mode */
 110 #define AUX_POLL                0xEB    /* Poll */
 111 #define AUX_RESET_WRAP          0xEC    /* Reset wrap mode */
 112 #define AUX_SET_WRAP            0xEE    /* Set wrap mode */
 113 #define AUX_SET_REMOTE          0xF0    /* Set remote mode */
 114 #define AUX_GET_TYPE            0xF2    /* Get type */
 115 #define AUX_SET_SAMPLE          0xF3    /* Set sample rate */
 116 #define AUX_ENABLE_DEV          0xF4    /* Enable aux device */
 117 #define AUX_DISABLE_DEV         0xF5    /* Disable aux device */
 118 #define AUX_SET_DEFAULT         0xF6
 119 #define AUX_RESET               0xFF    /* Reset aux device */
 120 #define AUX_ACK                 0xFA    /* Command byte ACK. */
 121
 122 #define MOUSE_STATUS_REMOTE     0x40
 123 #define MOUSE_STATUS_ENABLED    0x20
 124 #define MOUSE_STATUS_SCALE21    0x10
 125
 126 #define KBD_PENDING_KBD         1
 127 #define KBD_PENDING_AUX         2
 128
 129 typedef struct KBDState {
 130     uint8_t write_cmd; /* if non zero, write data to port 60 is expected */
 131     uint8_t status;
 132     uint8_t mode;
 133     uint8_t outport;
 134     /* Bitmask of devices with data available.  */
 135     uint8_t pending;
 136     void *kbd;
 137     void *mouse;
 138
 139     qemu_irq irq_kbd;
 140     qemu_irq irq_mouse;
 141     qemu_irq *a20_out;
 142     target_phys_addr_t mask;
 143 } KBDState;
 144
 145 /* update irq and KBD_STAT_[MOUSE_]OBF */
 146 /* XXX: not generating the irqs if KBD_MODE_DISABLE_KBD is set may be
 147    incorrect, but it avoids having to simulate exact delays */
 148 static void kbd_update_irq(KBDState *s)
 149 {
 150     int irq_kbd_level, irq_mouse_level;
 151
 152     irq_kbd_level = 0;
 153     irq_mouse_level = 0;
 154     s->status &= ~(KBD_STAT_OBF | KBD_STAT_MOUSE_OBF);
 155     s->outport &= ~(KBD_OUT_OBF | KBD_OUT_MOUSE_OBF);
 156     if (s->pending) {
 157         s->status |= KBD_STAT_OBF;
 158         s->outport |= KBD_OUT_OBF;
 159         /* kbd data takes priority over aux data.  */
 160         if (s->pending == KBD_PENDING_AUX) {
 161             s->status |= KBD_STAT_MOUSE_OBF;
 162             s->outport |= KBD_OUT_MOUSE_OBF;
 163             if (s->mode & KBD_MODE_MOUSE_INT)
 164                 irq_mouse_level = 1;
 165         } else {
 166             if ((s->mode & KBD_MODE_KBD_INT) &&
 167                 !(s->mode & KBD_MODE_DISABLE_KBD))
 168                 irq_kbd_level = 1;
 169         }
 170     }
 171     qemu_set_irq(s->irq_kbd, irq_kbd_level);
 172     qemu_set_irq(s->irq_mouse, irq_mouse_level);
 173 }
 174
 175 static void kbd_update_kbd_irq(void *opaque, int level)
 176 {
 177     KBDState *s = (KBDState *)opaque;
 178
 179     if (level)
 180         s->pending |= KBD_PENDING_KBD;
 181     else
 182         s->pending &= ~KBD_PENDING_KBD;
 183     kbd_update_irq(s);
 184 }
 185
 186 static void kbd_update_aux_irq(void *opaque, int level)
 187 {
 188     KBDState *s = (KBDState *)opaque;
 189
 190     if (level)
 191         s->pending |= KBD_PENDING_AUX;
 192     else
 193         s->pending &= ~KBD_PENDING_AUX;
 194     kbd_update_irq(s);
 195 }
 196
 197 static uint32_t kbd_read_status(void *opaque, uint32_t addr)
 198 {
 199     KBDState *s = opaque;
 200     int val;
 201     val = s->status;
 202     DPRINTF("kbd: read status=0x%02x\n", val);
 203     return val;
 204 }
 205
 206 static void kbd_queue(KBDState *s, int b, int aux)
 207 {
 208     if (aux)
 209         ps2_queue(s->mouse, b);
 210     else
 211         ps2_queue(s->kbd, b);
 212 }
 213
 214 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
 215 {
 216     KBDState *s = opaque;
 217
 218     DPRINTF("kbd: write outport=0x%02x\n", val);
 219     s->outport = val;
 220     if (s->a20_out) {
 221         qemu_set_irq(*s->a20_out, (val >> 1) & 1);
 222     }
 223     if (!(val & 1)) {
 224         qemu_system_reset_request();
 225     }
 226 }
 227
 228 static uint32_t ioport92_read(void *opaque, uint32_t addr)
 229 {
 230     KBDState *s = opaque;
 231     uint32_t ret;
 232
 233     ret = s->outport;
 234     DPRINTF("kbd: read outport=0x%02x\n", ret);
 235     return ret;
 236 }
 237
 238 static void kbd_write_command(void *opaque, uint32_t addr, uint32_t val)
 239 {
 240     KBDState *s = opaque;
 241
 242     DPRINTF("kbd: write cmd=0x%02x\n", val);
 243
 244     /* Bits 3-0 of the output port P2 of the keyboard controller may be pulsed
 245      * low for approximately 6 micro seconds. Bits 3-0 of the KBD_CCMD_PULSE
 246      * command specify the output port bits to be pulsed.
 247      * 0: Bit should be pulsed. 1: Bit should not be modified.
 248      * The only useful version of this command is pulsing bit 0,
 249      * which does a CPU reset.
 250      */
 251     if((val & KBD_CCMD_PULSE_BITS_3_0) == KBD_CCMD_PULSE_BITS_3_0) {
 252         if(!(val & 1))
 253             val = KBD_CCMD_RESET;
 254         else
 255             val = KBD_CCMD_NO_OP;
 256     }
 257
 258     switch(val) {
 259     case KBD_CCMD_READ_MODE:
 260         kbd_queue(s, s->mode, 0);
 261         break;
 262     case KBD_CCMD_WRITE_MODE:
 263     case KBD_CCMD_WRITE_OBUF:
 264     case KBD_CCMD_WRITE_AUX_OBUF:
 265     case KBD_CCMD_WRITE_MOUSE:
 266     case KBD_CCMD_WRITE_OUTPORT:
 267         s->write_cmd = val;
 268         break;
 269     case KBD_CCMD_MOUSE_DISABLE:
 270         s->mode |= KBD_MODE_DISABLE_MOUSE;
 271         break;
 272     case KBD_CCMD_MOUSE_ENABLE:
 273         s->mode &= ~KBD_MODE_DISABLE_MOUSE;
 274         break;
 275     case KBD_CCMD_TEST_MOUSE:
 276         kbd_queue(s, 0x00, 0);
 277         break;
 278     case KBD_CCMD_SELF_TEST:
 279         s->status |= KBD_STAT_SELFTEST;
 280         kbd_queue(s, 0x55, 0);
 281         break;
 282     case KBD_CCMD_KBD_TEST:
 283         kbd_queue(s, 0x00, 0);
 284         break;
 285     case KBD_CCMD_KBD_DISABLE:
 286         s->mode |= KBD_MODE_DISABLE_KBD;
 287         kbd_update_irq(s);
 288         break;
 289     case KBD_CCMD_KBD_ENABLE:
 290         s->mode &= ~KBD_MODE_DISABLE_KBD;
 291         kbd_update_irq(s);
 292         break;
 293     case KBD_CCMD_READ_INPORT:
 294         kbd_queue(s, 0x00, 0);
 295         break;
 296     case KBD_CCMD_READ_OUTPORT:
 297         kbd_queue(s, s->outport, 0);
 298         break;
 299     case KBD_CCMD_ENABLE_A20:
 300         if (s->a20_out) {
 301             qemu_irq_raise(*s->a20_out);
 302         }
 303         s->outport |= KBD_OUT_A20;
 304         break;
 305     case KBD_CCMD_DISABLE_A20:
 306         if (s->a20_out) {
 307             qemu_irq_lower(*s->a20_out);
 308         }
 309         s->outport &= ~KBD_OUT_A20;
 310         break;
 311     case KBD_CCMD_RESET:
 312         qemu_system_reset_request();
 313         break;
 314     case KBD_CCMD_NO_OP:
 315         /* ignore that */
 316         break;
 317     default:
 318         fprintf(stderr, "qemu: unsupported keyboard cmd=0x%02x\n", val);
 319         break;
 320     }
 321 }
 322
 323 static uint32_t kbd_read_data(void *opaque, uint32_t addr)
 324 {
 325     KBDState *s = opaque;
 326     uint32_t val;
 327
 328     if (s->pending == KBD_PENDING_AUX)
 329         val = ps2_read_data(s->mouse);
 330     else
 331         val = ps2_read_data(s->kbd);
 332
 333     DPRINTF("kbd: read data=0x%02x\n", val);
 334     return val;
 335 }
 336
 337 static void kbd_write_data(void *opaque, uint32_t addr, uint32_t val)
 338 {
 339     KBDState *s = opaque;
 340
 341     DPRINTF("kbd: write data=0x%02x\n", val);
 342
 343     switch(s->write_cmd) {
 344     case 0:
 345         ps2_write_keyboard(s->kbd, val);
 346         break;
 347     case KBD_CCMD_WRITE_MODE:
 348         s->mode = val;
 349         ps2_keyboard_set_translation(s->kbd, (s->mode & KBD_MODE_KCC) != 0);
 350         /* ??? */
 351         kbd_update_irq(s);
 352         break;
 353     case KBD_CCMD_WRITE_OBUF:
 354         kbd_queue(s, val, 0);
 355         break;
 356     case KBD_CCMD_WRITE_AUX_OBUF:
 357         kbd_queue(s, val, 1);
 358         break;
 359     case KBD_CCMD_WRITE_OUTPORT:
 360         ioport92_write(s, 0, val);
 361         break;
 362     case KBD_CCMD_WRITE_MOUSE:
 363         ps2_write_mouse(s->mouse, val);
 364         break;
 365     default:
 366         break;
 367     }
 368     s->write_cmd = 0;
 369 }
 370
 371 static void kbd_reset(void *opaque)
 372 {
 373     KBDState *s = opaque;
 374
 375     s->mode = KBD_MODE_KBD_INT | KBD_MODE_MOUSE_INT;
 376     s->status = KBD_STAT_CMD | KBD_STAT_UNLOCKED;
 377     s->outport = KBD_OUT_RESET | KBD_OUT_A20;
 378 }
 379
 380 static const VMStateDescription vmstate_kbd = {
 381     .name = "pckbd",
 382     .version_id = 3,
 383     .minimum_version_id = 3,
 384     .minimum_version_id_old = 3,
 385     .fields      = (VMStateField []) {
 386         VMSTATE_UINT8(write_cmd, KBDState),
 387         VMSTATE_UINT8(status, KBDState),
 388         VMSTATE_UINT8(mode, KBDState),
 389         VMSTATE_UINT8(pending, KBDState),
 390         VMSTATE_END_OF_LIST()
 391     }
 392 };
 393
 394 /* Memory mapped interface */
 395 static uint32_t kbd_mm_readb (void *opaque, target_phys_addr_t addr)
 396 {
 397     KBDState *s = opaque;
 398
 399     if (addr & s->mask)
 400         return kbd_read_status(s, 0) & 0xff;
 401     else
 402         return kbd_read_data(s, 0) & 0xff;
 403 }
 404
 405 static void kbd_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
 406 {
 407     KBDState *s = opaque;
 408
 409     if (addr & s->mask)
 410         kbd_write_command(s, 0, value & 0xff);
 411     else
 412         kbd_write_data(s, 0, value & 0xff);
 413 }
 414
 415 static CPUReadMemoryFunc * const kbd_mm_read[] = {
 416     &kbd_mm_readb,
 417     &kbd_mm_readb,
 418     &kbd_mm_readb,
 419 };
 420
 421 static CPUWriteMemoryFunc * const kbd_mm_write[] = {
 422     &kbd_mm_writeb,
 423     &kbd_mm_writeb,
 424     &kbd_mm_writeb,
 425 };
 426
 427 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
 428                    target_phys_addr_t base, ram_addr_t size,
 429                    target_phys_addr_t mask)
 430 {
 431     KBDState *s = qemu_mallocz(sizeof(KBDState));
 432     int s_io_memory;
 433
 434     s->irq_kbd = kbd_irq;
 435     s->irq_mouse = mouse_irq;
 436     s->mask = mask;
 437
 438     vmstate_register(NULL, 0, &vmstate_kbd, s);
 439     s_io_memory = cpu_register_io_memory(kbd_mm_read, kbd_mm_write, s);
 440     cpu_register_physical_memory(base, size, s_io_memory);
 441
 442     s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
 443     s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
 444     qemu_register_reset(kbd_reset, s);
 445 }
 446
 447 typedef struct ISAKBDState {
 448     ISADevice dev;
 449     KBDState  kbd;
 450 } ISAKBDState;
 451
 452 void i8042_isa_mouse_fake_event(void *opaque)
 453 {
 454     ISADevice *dev = opaque;
 455     KBDState *s = &(DO_UPCAST(ISAKBDState, dev, dev)->kbd);
 456
 457     ps2_mouse_fake_event(s->mouse);
 458 }
 459
 460 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out)
 461 {
 462     KBDState *s = &(DO_UPCAST(ISAKBDState, dev, dev)->kbd);
 463
 464     s->a20_out = a20_out;
 465 }
 466
 467 static const VMStateDescription vmstate_kbd_isa = {
 468     .name = "pckbd",
 469     .version_id = 3,
 470     .minimum_version_id = 3,
 471     .minimum_version_id_old = 3,
 472     .fields      = (VMStateField []) {
 473         VMSTATE_STRUCT(kbd, ISAKBDState, 0, vmstate_kbd, KBDState),
 474         VMSTATE_END_OF_LIST()
 475     }
 476 };
 477
 478 static int i8042_initfn(ISADevice *dev)
 479 {
 480     KBDState *s = &(DO_UPCAST(ISAKBDState, dev, dev)->kbd);
 481
 482     isa_init_irq(dev, &s->irq_kbd, 1);
 483     isa_init_irq(dev, &s->irq_mouse, 12);
 484
 485     register_ioport_read(0x60, 1, 1, kbd_read_data, s);
 486     register_ioport_write(0x60, 1, 1, kbd_write_data, s);
 487     register_ioport_read(0x64, 1, 1, kbd_read_status, s);
 488     register_ioport_write(0x64, 1, 1, kbd_write_command, s);
 489     register_ioport_read(0x92, 1, 1, ioport92_read, s);
 490     register_ioport_write(0x92, 1, 1, ioport92_write, s);
 491
 492     s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
 493     s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
 494     qemu_register_reset(kbd_reset, s);
 495     return 0;
 496 }
 497
 498 static ISADeviceInfo i8042_info = {
 499     .qdev.name     = "i8042",
 500     .qdev.size     = sizeof(ISAKBDState),
 501     .qdev.vmsd     = &vmstate_kbd_isa,
 502     .qdev.no_user  = 1,
 503     .init          = i8042_initfn,
 504 };
 505
 506 static void i8042_register(void)
 507 {
 508     isa_qdev_register(&i8042_info);
 509 }
 510 device_init(i8042_register)