2 * ARM RealView Emulation Baseboard Interrupt Controller
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licenced under the GPL.
15 /* Only a single "CPU" interface is present. */
17 gic_get_current_cpu(void)
29 static uint32_t realview_gic_cpu_read(void *opaque
, target_phys_addr_t offset
)
31 gic_state
*s
= (gic_state
*)opaque
;
32 return gic_cpu_read(s
, gic_get_current_cpu(), offset
);
35 static void realview_gic_cpu_write(void *opaque
, target_phys_addr_t offset
,
38 gic_state
*s
= (gic_state
*)opaque
;
39 gic_cpu_write(s
, gic_get_current_cpu(), offset
, value
);
42 static CPUReadMemoryFunc
*realview_gic_cpu_readfn
[] = {
43 realview_gic_cpu_read
,
44 realview_gic_cpu_read
,
48 static CPUWriteMemoryFunc
*realview_gic_cpu_writefn
[] = {
49 realview_gic_cpu_write
,
50 realview_gic_cpu_write
,
51 realview_gic_cpu_write
54 static void realview_gic_map(SysBusDevice
*dev
, target_phys_addr_t base
)
56 RealViewGICState
*s
= FROM_SYSBUSGIC(RealViewGICState
, dev
);
57 cpu_register_physical_memory(base
, 0x1000, s
->iomemtype
);
58 cpu_register_physical_memory(base
+ 0x1000, 0x1000, s
->gic
.iomemtype
);
61 static void realview_gic_init(SysBusDevice
*dev
)
63 RealViewGICState
*s
= FROM_SYSBUSGIC(RealViewGICState
, dev
);
66 s
->iomemtype
= cpu_register_io_memory(0, realview_gic_cpu_readfn
,
67 realview_gic_cpu_writefn
, s
);
68 sysbus_init_mmio_cb(dev
, 0x2000, realview_gic_map
);
71 static void realview_gic_register_devices(void)
73 sysbus_register_dev("realview_gic", sizeof(RealViewGICState
),
77 device_init(realview_gic_register_devices
)