sh4/r2d: update pci, usb and kernel management
[qemu/sh4.git] / qemu-char.h
blobc64fc28c2ed354f07ccd8bd160cb2e04cb2bd9e7
1 #ifndef QEMU_CHAR_H
2 #define QEMU_CHAR_H
4 #include "sys-queue.h"
5 /* character device */
7 #define CHR_EVENT_BREAK 0 /* serial break char */
8 #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
9 #define CHR_EVENT_RESET 2 /* new connection established */
12 #define CHR_IOCTL_SERIAL_SET_PARAMS 1
13 typedef struct {
14 int speed;
15 int parity;
16 int data_bits;
17 int stop_bits;
18 } QEMUSerialSetParams;
20 #define CHR_IOCTL_SERIAL_SET_BREAK 2
22 #define CHR_IOCTL_PP_READ_DATA 3
23 #define CHR_IOCTL_PP_WRITE_DATA 4
24 #define CHR_IOCTL_PP_READ_CONTROL 5
25 #define CHR_IOCTL_PP_WRITE_CONTROL 6
26 #define CHR_IOCTL_PP_READ_STATUS 7
27 #define CHR_IOCTL_PP_EPP_READ_ADDR 8
28 #define CHR_IOCTL_PP_EPP_READ 9
29 #define CHR_IOCTL_PP_EPP_WRITE_ADDR 10
30 #define CHR_IOCTL_PP_EPP_WRITE 11
31 #define CHR_IOCTL_PP_DATA_DIR 12
33 #define CHR_IOCTL_SERIAL_SET_TIOCM 13
34 #define CHR_IOCTL_SERIAL_GET_TIOCM 14
36 #define CHR_TIOCM_CTS 0x020
37 #define CHR_TIOCM_CAR 0x040
38 #define CHR_TIOCM_DSR 0x100
39 #define CHR_TIOCM_RI 0x080
40 #define CHR_TIOCM_DTR 0x002
41 #define CHR_TIOCM_RTS 0x004
43 typedef void IOEventHandler(void *opaque, int event);
45 struct CharDriverState {
46 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
47 void (*chr_update_read_handler)(struct CharDriverState *s);
48 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
49 IOEventHandler *chr_event;
50 IOCanRWHandler *chr_can_read;
51 IOReadHandler *chr_read;
52 void *handler_opaque;
53 void (*chr_send_event)(struct CharDriverState *chr, int event);
54 void (*chr_close)(struct CharDriverState *chr);
55 void (*chr_accept_input)(struct CharDriverState *chr);
56 void *opaque;
57 int focus;
58 QEMUBH *bh;
59 char *label;
60 char *filename;
61 TAILQ_ENTRY(CharDriverState) next;
64 CharDriverState *qemu_chr_open(const char *label, const char *filename);
65 void qemu_chr_close(CharDriverState *chr);
66 void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
67 int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
68 void qemu_chr_send_event(CharDriverState *s, int event);
69 void qemu_chr_add_handlers(CharDriverState *s,
70 IOCanRWHandler *fd_can_read,
71 IOReadHandler *fd_read,
72 IOEventHandler *fd_event,
73 void *opaque);
74 int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
75 void qemu_chr_reset(CharDriverState *s);
76 int qemu_chr_can_read(CharDriverState *s);
77 void qemu_chr_read(CharDriverState *s, uint8_t *buf, int len);
78 void qemu_chr_accept_input(CharDriverState *s);
79 void qemu_chr_info(void);
81 extern int term_escape_char;
83 /* async I/O support */
85 int qemu_set_fd_handler2(int fd,
86 IOCanRWHandler *fd_read_poll,
87 IOHandler *fd_read,
88 IOHandler *fd_write,
89 void *opaque);
90 int qemu_set_fd_handler(int fd,
91 IOHandler *fd_read,
92 IOHandler *fd_write,
93 void *opaque);
95 #endif