sh4/r2d: update pci, usb and kernel management
[qemu/sh4.git] / m68k-dis.c
blob9978caac5ac3c377940ab30333f803c8732a03e6
1 /* This file is composed of several different files from the upstream
2 sourceware.org CVS. Original file boundaries marked with **** */
4 #include <string.h>
5 #include <math.h>
6 #include <stdio.h>
8 #include "dis-asm.h"
10 /* **** floatformat.h from sourceware.org CVS 2005-08-14. */
11 /* IEEE floating point support declarations, for GDB, the GNU Debugger.
12 Copyright 1991, 1994, 1995, 1997, 2000, 2003 Free Software Foundation, Inc.
14 This file is part of GDB.
16 This program is free software; you can redistribute it and/or modify
17 it under the terms of the GNU General Public License as published by
18 the Free Software Foundation; either version 2 of the License, or
19 (at your option) any later version.
21 This program is distributed in the hope that it will be useful,
22 but WITHOUT ANY WARRANTY; without even the implied warranty of
23 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 GNU General Public License for more details.
26 You should have received a copy of the GNU General Public License
27 along with this program; if not, write to the Free Software
28 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
30 #if !defined (FLOATFORMAT_H)
31 #define FLOATFORMAT_H 1
33 /*#include "ansidecl.h" */
35 /* A floatformat consists of a sign bit, an exponent and a mantissa. Once the
36 bytes are concatenated according to the byteorder flag, then each of those
37 fields is contiguous. We number the bits with 0 being the most significant
38 (i.e. BITS_BIG_ENDIAN type numbering), and specify which bits each field
39 contains with the *_start and *_len fields. */
41 /* What is the order of the bytes. */
43 enum floatformat_byteorders {
45 /* Standard little endian byte order.
46 EX: 1.2345678e10 => 00 00 80 c5 e0 fe 06 42 */
48 floatformat_little,
50 /* Standard big endian byte order.
51 EX: 1.2345678e10 => 42 06 fe e0 c5 80 00 00 */
53 floatformat_big,
55 /* Little endian byte order but big endian word order.
56 EX: 1.2345678e10 => e0 fe 06 42 00 00 80 c5 */
58 floatformat_littlebyte_bigword
62 enum floatformat_intbit { floatformat_intbit_yes, floatformat_intbit_no };
64 struct floatformat
66 enum floatformat_byteorders byteorder;
67 unsigned int totalsize; /* Total size of number in bits */
69 /* Sign bit is always one bit long. 1 means negative, 0 means positive. */
70 unsigned int sign_start;
72 unsigned int exp_start;
73 unsigned int exp_len;
74 /* Bias added to a "true" exponent to form the biased exponent. It
75 is intentionally signed as, otherwize, -exp_bias can turn into a
76 very large number (e.g., given the exp_bias of 0x3fff and a 64
77 bit long, the equation (long)(1 - exp_bias) evaluates to
78 4294950914) instead of -16382). */
79 int exp_bias;
80 /* Exponent value which indicates NaN. This is the actual value stored in
81 the float, not adjusted by the exp_bias. This usually consists of all
82 one bits. */
83 unsigned int exp_nan;
85 unsigned int man_start;
86 unsigned int man_len;
88 /* Is the integer bit explicit or implicit? */
89 enum floatformat_intbit intbit;
91 /* Internal name for debugging. */
92 const char *name;
94 /* Validator method. */
95 int (*is_valid) (const struct floatformat *fmt, const char *from);
98 /* floatformats for IEEE single and double, big and little endian. */
100 extern const struct floatformat floatformat_ieee_single_big;
101 extern const struct floatformat floatformat_ieee_single_little;
102 extern const struct floatformat floatformat_ieee_double_big;
103 extern const struct floatformat floatformat_ieee_double_little;
105 /* floatformat for ARM IEEE double, little endian bytes and big endian words */
107 extern const struct floatformat floatformat_ieee_double_littlebyte_bigword;
109 /* floatformats for various extendeds. */
111 extern const struct floatformat floatformat_i387_ext;
112 extern const struct floatformat floatformat_m68881_ext;
113 extern const struct floatformat floatformat_i960_ext;
114 extern const struct floatformat floatformat_m88110_ext;
115 extern const struct floatformat floatformat_m88110_harris_ext;
116 extern const struct floatformat floatformat_arm_ext_big;
117 extern const struct floatformat floatformat_arm_ext_littlebyte_bigword;
118 /* IA-64 Floating Point register spilt into memory. */
119 extern const struct floatformat floatformat_ia64_spill_big;
120 extern const struct floatformat floatformat_ia64_spill_little;
121 extern const struct floatformat floatformat_ia64_quad_big;
122 extern const struct floatformat floatformat_ia64_quad_little;
124 /* Convert from FMT to a double.
125 FROM is the address of the extended float.
126 Store the double in *TO. */
128 extern void
129 floatformat_to_double (const struct floatformat *, const char *, double *);
131 /* The converse: convert the double *FROM to FMT
132 and store where TO points. */
134 extern void
135 floatformat_from_double (const struct floatformat *, const double *, char *);
137 /* Return non-zero iff the data at FROM is a valid number in format FMT. */
139 extern int
140 floatformat_is_valid (const struct floatformat *fmt, const char *from);
142 #endif /* defined (FLOATFORMAT_H) */
143 /* **** End of floatformat.h */
144 /* **** m68k-dis.h from sourceware.org CVS 2005-08-14. */
145 /* Opcode table header for m680[01234]0/m6888[12]/m68851.
146 Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1999, 2001,
147 2003, 2004 Free Software Foundation, Inc.
149 This file is part of GDB, GAS, and the GNU binutils.
151 GDB, GAS, and the GNU binutils are free software; you can redistribute
152 them and/or modify them under the terms of the GNU General Public
153 License as published by the Free Software Foundation; either version
154 1, or (at your option) any later version.
156 GDB, GAS, and the GNU binutils are distributed in the hope that they
157 will be useful, but WITHOUT ANY WARRANTY; without even the implied
158 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
159 the GNU General Public License for more details.
161 You should have received a copy of the GNU General Public License
162 along with this file; see the file COPYING. If not, write to the Free
163 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
164 02110-1301, USA. */
166 /* These are used as bit flags for the arch field in the m68k_opcode
167 structure. */
168 #define _m68k_undef 0
169 #define m68000 0x001
170 #define m68008 m68000 /* Synonym for -m68000. otherwise unused. */
171 #define m68010 0x002
172 #define m68020 0x004
173 #define m68030 0x008
174 #define m68ec030 m68030 /* Similar enough to -m68030 to ignore differences;
175 gas will deal with the few differences. */
176 #define m68040 0x010
177 /* There is no 68050. */
178 #define m68060 0x020
179 #define m68881 0x040
180 #define m68882 m68881 /* Synonym for -m68881. otherwise unused. */
181 #define m68851 0x080
182 #define cpu32 0x100 /* e.g., 68332 */
184 #define mcfmac 0x200 /* ColdFire MAC. */
185 #define mcfemac 0x400 /* ColdFire EMAC. */
186 #define cfloat 0x800 /* ColdFire FPU. */
187 #define mcfhwdiv 0x1000 /* ColdFire hardware divide. */
189 #define mcfisa_a 0x2000 /* ColdFire ISA_A. */
190 #define mcfisa_aa 0x4000 /* ColdFire ISA_A+. */
191 #define mcfisa_b 0x8000 /* ColdFire ISA_B. */
192 #define mcfusp 0x10000 /* ColdFire USP instructions. */
194 #define mcf5200 0x20000
195 #define mcf5206e 0x40000
196 #define mcf521x 0x80000
197 #define mcf5249 0x100000
198 #define mcf528x 0x200000
199 #define mcf5307 0x400000
200 #define mcf5407 0x800000
201 #define mcf5470 0x1000000
202 #define mcf5480 0x2000000
204 /* Handy aliases. */
205 #define m68040up (m68040 | m68060)
206 #define m68030up (m68030 | m68040up)
207 #define m68020up (m68020 | m68030up)
208 #define m68010up (m68010 | cpu32 | m68020up)
209 #define m68000up (m68000 | m68010up)
211 #define mfloat (m68881 | m68882 | m68040 | m68060)
212 #define mmmu (m68851 | m68030 | m68040 | m68060)
214 /* The structure used to hold information for an opcode. */
216 struct m68k_opcode
218 /* The opcode name. */
219 const char *name;
220 /* The pseudo-size of the instruction(in bytes). Used to determine
221 number of bytes necessary to disassemble the instruction. */
222 unsigned int size;
223 /* The opcode itself. */
224 unsigned long opcode;
225 /* The mask used by the disassembler. */
226 unsigned long match;
227 /* The arguments. */
228 const char *args;
229 /* The architectures which support this opcode. */
230 unsigned int arch;
233 /* The structure used to hold information for an opcode alias. */
235 struct m68k_opcode_alias
237 /* The alias name. */
238 const char *alias;
239 /* The instruction for which this is an alias. */
240 const char *primary;
243 /* We store four bytes of opcode for all opcodes because that is the
244 most any of them need. The actual length of an instruction is
245 always at least 2 bytes, and is as much longer as necessary to hold
246 the operands it has.
248 The match field is a mask saying which bits must match particular
249 opcode in order for an instruction to be an instance of that
250 opcode.
252 The args field is a string containing two characters for each
253 operand of the instruction. The first specifies the kind of
254 operand; the second, the place it is stored. */
256 /* Kinds of operands:
257 Characters used: AaBbCcDdEeFfGgHIiJkLlMmnOopQqRrSsTtU VvWwXxYyZz01234|*~%;@!&$?/<>#^+-
259 D data register only. Stored as 3 bits.
260 A address register only. Stored as 3 bits.
261 a address register indirect only. Stored as 3 bits.
262 R either kind of register. Stored as 4 bits.
263 r either kind of register indirect only. Stored as 4 bits.
264 At the moment, used only for cas2 instruction.
265 F floating point coprocessor register only. Stored as 3 bits.
266 O an offset (or width): immediate data 0-31 or data register.
267 Stored as 6 bits in special format for BF... insns.
268 + autoincrement only. Stored as 3 bits (number of the address register).
269 - autodecrement only. Stored as 3 bits (number of the address register).
270 Q quick immediate data. Stored as 3 bits.
271 This matches an immediate operand only when value is in range 1 .. 8.
272 M moveq immediate data. Stored as 8 bits.
273 This matches an immediate operand only when value is in range -128..127
274 T trap vector immediate data. Stored as 4 bits.
276 k K-factor for fmove.p instruction. Stored as a 7-bit constant or
277 a three bit register offset, depending on the field type.
279 # immediate data. Stored in special places (b, w or l)
280 which say how many bits to store.
281 ^ immediate data for floating point instructions. Special places
282 are offset by 2 bytes from '#'...
283 B pc-relative address, converted to an offset
284 that is treated as immediate data.
285 d displacement and register. Stores the register as 3 bits
286 and stores the displacement in the entire second word.
288 C the CCR. No need to store it; this is just for filtering validity.
289 S the SR. No need to store, just as with CCR.
290 U the USP. No need to store, just as with CCR.
291 E the MAC ACC. No need to store, just as with CCR.
292 e the EMAC ACC[0123].
293 G the MAC/EMAC MACSR. No need to store, just as with CCR.
294 g the EMAC ACCEXT{01,23}.
295 H the MASK. No need to store, just as with CCR.
296 i the MAC/EMAC scale factor.
298 I Coprocessor ID. Not printed if 1. The Coprocessor ID is always
299 extracted from the 'd' field of word one, which means that an extended
300 coprocessor opcode can be skipped using the 'i' place, if needed.
302 s System Control register for the floating point coprocessor.
304 J Misc register for movec instruction, stored in 'j' format.
305 Possible values:
306 0x000 SFC Source Function Code reg [60, 40, 30, 20, 10]
307 0x001 DFC Data Function Code reg [60, 40, 30, 20, 10]
308 0x002 CACR Cache Control Register [60, 40, 30, 20, mcf]
309 0x003 TC MMU Translation Control [60, 40]
310 0x004 ITT0 Instruction Transparent
311 Translation reg 0 [60, 40]
312 0x005 ITT1 Instruction Transparent
313 Translation reg 1 [60, 40]
314 0x006 DTT0 Data Transparent
315 Translation reg 0 [60, 40]
316 0x007 DTT1 Data Transparent
317 Translation reg 1 [60, 40]
318 0x008 BUSCR Bus Control Register [60]
319 0x800 USP User Stack Pointer [60, 40, 30, 20, 10]
320 0x801 VBR Vector Base reg [60, 40, 30, 20, 10, mcf]
321 0x802 CAAR Cache Address Register [ 30, 20]
322 0x803 MSP Master Stack Pointer [ 40, 30, 20]
323 0x804 ISP Interrupt Stack Pointer [ 40, 30, 20]
324 0x805 MMUSR MMU Status reg [ 40]
325 0x806 URP User Root Pointer [60, 40]
326 0x807 SRP Supervisor Root Pointer [60, 40]
327 0x808 PCR Processor Configuration reg [60]
328 0xC00 ROMBAR ROM Base Address Register [520X]
329 0xC04 RAMBAR0 RAM Base Address Register 0 [520X]
330 0xC05 RAMBAR1 RAM Base Address Register 0 [520X]
331 0xC0F MBAR0 RAM Base Address Register 0 [520X]
332 0xC04 FLASHBAR FLASH Base Address Register [mcf528x]
333 0xC05 RAMBAR Static RAM Base Address Register [mcf528x]
335 L Register list of the type d0-d7/a0-a7 etc.
336 (New! Improved! Can also hold fp0-fp7, as well!)
337 The assembler tries to see if the registers match the insn by
338 looking at where the insn wants them stored.
340 l Register list like L, but with all the bits reversed.
341 Used for going the other way. . .
343 c cache identifier which may be "nc" for no cache, "ic"
344 for instruction cache, "dc" for data cache, or "bc"
345 for both caches. Used in cinv and cpush. Always
346 stored in position "d".
348 u Any register, with ``upper'' or ``lower'' specification. Used
349 in the mac instructions with size word.
351 The remainder are all stored as 6 bits using an address mode and a
352 register number; they differ in which addressing modes they match.
354 * all (modes 0-6,7.0-4)
355 ~ alterable memory (modes 2-6,7.0,7.1)
356 (not 0,1,7.2-4)
357 % alterable (modes 0-6,7.0,7.1)
358 (not 7.2-4)
359 ; data (modes 0,2-6,7.0-4)
360 (not 1)
361 @ data, but not immediate (modes 0,2-6,7.0-3)
362 (not 1,7.4)
363 ! control (modes 2,5,6,7.0-3)
364 (not 0,1,3,4,7.4)
365 & alterable control (modes 2,5,6,7.0,7.1)
366 (not 0,1,3,4,7.2-4)
367 $ alterable data (modes 0,2-6,7.0,7.1)
368 (not 1,7.2-4)
369 ? alterable control, or data register (modes 0,2,5,6,7.0,7.1)
370 (not 1,3,4,7.2-4)
371 / control, or data register (modes 0,2,5,6,7.0-3)
372 (not 1,3,4,7.4)
373 > *save operands (modes 2,4,5,6,7.0,7.1)
374 (not 0,1,3,7.2-4)
375 < *restore operands (modes 2,3,5,6,7.0-3)
376 (not 0,1,4,7.4)
378 coldfire move operands:
379 m (modes 0-4)
380 n (modes 5,7.2)
381 o (modes 6,7.0,7.1,7.3,7.4)
382 p (modes 0-5)
384 coldfire bset/bclr/btst/mulsl/mulul operands:
385 q (modes 0,2-5)
386 v (modes 0,2-5,7.0,7.1)
387 b (modes 0,2-5,7.2)
388 w (modes 2-5,7.2)
389 y (modes 2,5)
390 z (modes 2,5,7.2)
391 x mov3q immediate operand.
392 4 (modes 2,3,4,5)
395 /* For the 68851: */
396 /* I didn't use much imagination in choosing the
397 following codes, so many of them aren't very
398 mnemonic. -rab
400 0 32 bit pmmu register
401 Possible values:
402 000 TC Translation Control Register (68030, 68851)
404 1 16 bit pmmu register
405 111 AC Access Control (68851)
407 2 8 bit pmmu register
408 100 CAL Current Access Level (68851)
409 101 VAL Validate Access Level (68851)
410 110 SCC Stack Change Control (68851)
412 3 68030-only pmmu registers (32 bit)
413 010 TT0 Transparent Translation reg 0
414 (aka Access Control reg 0 -- AC0 -- on 68ec030)
415 011 TT1 Transparent Translation reg 1
416 (aka Access Control reg 1 -- AC1 -- on 68ec030)
418 W wide pmmu registers
419 Possible values:
420 001 DRP Dma Root Pointer (68851)
421 010 SRP Supervisor Root Pointer (68030, 68851)
422 011 CRP Cpu Root Pointer (68030, 68851)
424 f function code register (68030, 68851)
425 0 SFC
426 1 DFC
428 V VAL register only (68851)
430 X BADx, BACx (16 bit)
431 100 BAD Breakpoint Acknowledge Data (68851)
432 101 BAC Breakpoint Acknowledge Control (68851)
434 Y PSR (68851) (MMUSR on 68030) (ACUSR on 68ec030)
435 Z PCSR (68851)
437 | memory (modes 2-6, 7.*)
439 t address test level (68030 only)
440 Stored as 3 bits, range 0-7.
441 Also used for breakpoint instruction now.
445 /* Places to put an operand, for non-general operands:
446 Characters used: BbCcDdFfGgHhIijkLlMmNnostWw123456789/
448 s source, low bits of first word.
449 d dest, shifted 9 in first word
450 1 second word, shifted 12
451 2 second word, shifted 6
452 3 second word, shifted 0
453 4 third word, shifted 12
454 5 third word, shifted 6
455 6 third word, shifted 0
456 7 second word, shifted 7
457 8 second word, shifted 10
458 9 second word, shifted 5
459 D store in both place 1 and place 3; for divul and divsl.
460 B first word, low byte, for branch displacements
461 W second word (entire), for branch displacements
462 L second and third words (entire), for branch displacements
463 (also overloaded for move16)
464 b second word, low byte
465 w second word (entire) [variable word/long branch offset for dbra]
466 W second word (entire) (must be signed 16 bit value)
467 l second and third word (entire)
468 g variable branch offset for bra and similar instructions.
469 The place to store depends on the magnitude of offset.
470 t store in both place 7 and place 8; for floating point operations
471 c branch offset for cpBcc operations.
472 The place to store is word two if bit six of word one is zero,
473 and words two and three if bit six of word one is one.
474 i Increment by two, to skip over coprocessor extended operands. Only
475 works with the 'I' format.
476 k Dynamic K-factor field. Bits 6-4 of word 2, used as a register number.
477 Also used for dynamic fmovem instruction.
478 C floating point coprocessor constant - 7 bits. Also used for static
479 K-factors...
480 j Movec register #, stored in 12 low bits of second word.
481 m For M[S]ACx; 4 bits split with MSB shifted 6 bits in first word
482 and remaining 3 bits of register shifted 9 bits in first word.
483 Indicate upper/lower in 1 bit shifted 7 bits in second word.
484 Use with `R' or `u' format.
485 n `m' withouth upper/lower indication. (For M[S]ACx; 4 bits split
486 with MSB shifted 6 bits in first word and remaining 3 bits of
487 register shifted 9 bits in first word. No upper/lower
488 indication is done.) Use with `R' or `u' format.
489 o For M[S]ACw; 4 bits shifted 12 in second word (like `1').
490 Indicate upper/lower in 1 bit shifted 7 bits in second word.
491 Use with `R' or `u' format.
492 M For M[S]ACw; 4 bits in low bits of first word. Indicate
493 upper/lower in 1 bit shifted 6 bits in second word. Use with
494 `R' or `u' format.
495 N For M[S]ACw; 4 bits in low bits of second word. Indicate
496 upper/lower in 1 bit shifted 6 bits in second word. Use with
497 `R' or `u' format.
498 h shift indicator (scale factor), 1 bit shifted 10 in second word
500 Places to put operand, for general operands:
501 d destination, shifted 6 bits in first word
502 b source, at low bit of first word, and immediate uses one byte
503 w source, at low bit of first word, and immediate uses two bytes
504 l source, at low bit of first word, and immediate uses four bytes
505 s source, at low bit of first word.
506 Used sometimes in contexts where immediate is not allowed anyway.
507 f single precision float, low bit of 1st word, immediate uses 4 bytes
508 F double precision float, low bit of 1st word, immediate uses 8 bytes
509 x extended precision float, low bit of 1st word, immediate uses 12 bytes
510 p packed float, low bit of 1st word, immediate uses 12 bytes
511 G EMAC accumulator, load (bit 4 2nd word, !bit8 first word)
512 H EMAC accumulator, non load (bit 4 2nd word, bit 8 first word)
513 F EMAC ACCx
514 f EMAC ACCy
515 I MAC/EMAC scale factor
516 / Like 's', but set 2nd word, bit 5 if trailing_ampersand set
517 ] first word, bit 10
520 extern const struct m68k_opcode m68k_opcodes[];
521 extern const struct m68k_opcode_alias m68k_opcode_aliases[];
523 extern const int m68k_numopcodes, m68k_numaliases;
525 /* **** End of m68k-opcode.h */
526 /* **** m68k-dis.c from sourceware.org CVS 2005-08-14. */
527 /* Print Motorola 68k instructions.
528 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
529 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
530 Free Software Foundation, Inc.
532 This file is free software; you can redistribute it and/or modify
533 it under the terms of the GNU General Public License as published by
534 the Free Software Foundation; either version 2 of the License, or
535 (at your option) any later version.
537 This program is distributed in the hope that it will be useful,
538 but WITHOUT ANY WARRANTY; without even the implied warranty of
539 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
540 GNU General Public License for more details.
542 You should have received a copy of the GNU General Public License
543 along with this program; if not, write to the Free Software
544 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
545 MA 02110-1301, USA. */
547 /* Local function prototypes. */
549 static const char * const fpcr_names[] =
551 "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
552 "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"
555 static const char *const reg_names[] =
557 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
558 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
559 "%ps", "%pc"
562 /* Name of register halves for MAC/EMAC.
563 Separate from reg_names since 'spu', 'fpl' look weird. */
564 static const char *const reg_half_names[] =
566 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
567 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%a7",
568 "%ps", "%pc"
571 /* Sign-extend an (unsigned char). */
572 #if __STDC__ == 1
573 #define COERCE_SIGNED_CHAR(ch) ((signed char) (ch))
574 #else
575 #define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128)
576 #endif
578 /* Get a 1 byte signed integer. */
579 #define NEXTBYTE(p) (p += 2, FETCH_DATA (info, p), COERCE_SIGNED_CHAR(p[-1]))
581 /* Get a 2 byte signed integer. */
582 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
583 #define NEXTWORD(p) \
584 (p += 2, FETCH_DATA (info, p), \
585 COERCE16 ((p[-2] << 8) + p[-1]))
587 /* Get a 4 byte signed integer. */
588 #define COERCE32(x) ((bfd_signed_vma) ((x) ^ 0x80000000) - 0x80000000)
589 #define NEXTLONG(p) \
590 (p += 4, FETCH_DATA (info, p), \
591 (COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])))
593 /* Get a 4 byte unsigned integer. */
594 #define NEXTULONG(p) \
595 (p += 4, FETCH_DATA (info, p), \
596 (unsigned int) ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]))
598 /* Get a single precision float. */
599 #define NEXTSINGLE(val, p) \
600 (p += 4, FETCH_DATA (info, p), \
601 floatformat_to_double (&floatformat_ieee_single_big, (char *) p - 4, &val))
603 /* Get a double precision float. */
604 #define NEXTDOUBLE(val, p) \
605 (p += 8, FETCH_DATA (info, p), \
606 floatformat_to_double (&floatformat_ieee_double_big, (char *) p - 8, &val))
608 /* Get an extended precision float. */
609 #define NEXTEXTEND(val, p) \
610 (p += 12, FETCH_DATA (info, p), \
611 floatformat_to_double (&floatformat_m68881_ext, (char *) p - 12, &val))
613 /* Need a function to convert from packed to double
614 precision. Actually, it's easier to print a
615 packed number than a double anyway, so maybe
616 there should be a special case to handle this... */
617 #define NEXTPACKED(p) \
618 (p += 12, FETCH_DATA (info, p), 0.0)
620 /* Maximum length of an instruction. */
621 #define MAXLEN 22
623 #include <setjmp.h>
625 struct private
627 /* Points to first byte not fetched. */
628 bfd_byte *max_fetched;
629 bfd_byte the_buffer[MAXLEN];
630 bfd_vma insn_start;
631 jmp_buf bailout;
634 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
635 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
636 on error. */
637 #define FETCH_DATA(info, addr) \
638 ((addr) <= ((struct private *) (info->private_data))->max_fetched \
639 ? 1 : fetch_data ((info), (addr)))
641 static int
642 fetch_data (struct disassemble_info *info, bfd_byte *addr)
644 int status;
645 struct private *priv = (struct private *)info->private_data;
646 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
648 status = (*info->read_memory_func) (start,
649 priv->max_fetched,
650 addr - priv->max_fetched,
651 info);
652 if (status != 0)
654 (*info->memory_error_func) (status, start, info);
655 longjmp (priv->bailout, 1);
657 else
658 priv->max_fetched = addr;
659 return 1;
662 /* This function is used to print to the bit-bucket. */
663 static int
664 dummy_printer (FILE *file ATTRIBUTE_UNUSED,
665 const char *format ATTRIBUTE_UNUSED,
666 ...)
668 return 0;
671 static void
672 dummy_print_address (bfd_vma vma ATTRIBUTE_UNUSED,
673 struct disassemble_info *info ATTRIBUTE_UNUSED)
677 /* Fetch BITS bits from a position in the instruction specified by CODE.
678 CODE is a "place to put an argument", or 'x' for a destination
679 that is a general address (mode and register).
680 BUFFER contains the instruction. */
682 static int
683 fetch_arg (unsigned char *buffer,
684 int code,
685 int bits,
686 disassemble_info *info)
688 int val = 0;
690 switch (code)
692 case '/': /* MAC/EMAC mask bit. */
693 val = buffer[3] >> 5;
694 break;
696 case 'G': /* EMAC ACC load. */
697 val = ((buffer[3] >> 3) & 0x2) | ((~buffer[1] >> 7) & 0x1);
698 break;
700 case 'H': /* EMAC ACC !load. */
701 val = ((buffer[3] >> 3) & 0x2) | ((buffer[1] >> 7) & 0x1);
702 break;
704 case ']': /* EMAC ACCEXT bit. */
705 val = buffer[0] >> 2;
706 break;
708 case 'I': /* MAC/EMAC scale factor. */
709 val = buffer[2] >> 1;
710 break;
712 case 'F': /* EMAC ACCx. */
713 val = buffer[0] >> 1;
714 break;
716 case 'f':
717 val = buffer[1];
718 break;
720 case 's':
721 val = buffer[1];
722 break;
724 case 'd': /* Destination, for register or quick. */
725 val = (buffer[0] << 8) + buffer[1];
726 val >>= 9;
727 break;
729 case 'x': /* Destination, for general arg. */
730 val = (buffer[0] << 8) + buffer[1];
731 val >>= 6;
732 break;
734 case 'k':
735 FETCH_DATA (info, buffer + 3);
736 val = (buffer[3] >> 4);
737 break;
739 case 'C':
740 FETCH_DATA (info, buffer + 3);
741 val = buffer[3];
742 break;
744 case '1':
745 FETCH_DATA (info, buffer + 3);
746 val = (buffer[2] << 8) + buffer[3];
747 val >>= 12;
748 break;
750 case '2':
751 FETCH_DATA (info, buffer + 3);
752 val = (buffer[2] << 8) + buffer[3];
753 val >>= 6;
754 break;
756 case '3':
757 case 'j':
758 FETCH_DATA (info, buffer + 3);
759 val = (buffer[2] << 8) + buffer[3];
760 break;
762 case '4':
763 FETCH_DATA (info, buffer + 5);
764 val = (buffer[4] << 8) + buffer[5];
765 val >>= 12;
766 break;
768 case '5':
769 FETCH_DATA (info, buffer + 5);
770 val = (buffer[4] << 8) + buffer[5];
771 val >>= 6;
772 break;
774 case '6':
775 FETCH_DATA (info, buffer + 5);
776 val = (buffer[4] << 8) + buffer[5];
777 break;
779 case '7':
780 FETCH_DATA (info, buffer + 3);
781 val = (buffer[2] << 8) + buffer[3];
782 val >>= 7;
783 break;
785 case '8':
786 FETCH_DATA (info, buffer + 3);
787 val = (buffer[2] << 8) + buffer[3];
788 val >>= 10;
789 break;
791 case '9':
792 FETCH_DATA (info, buffer + 3);
793 val = (buffer[2] << 8) + buffer[3];
794 val >>= 5;
795 break;
797 case 'e':
798 val = (buffer[1] >> 6);
799 break;
801 case 'm':
802 val = (buffer[1] & 0x40 ? 0x8 : 0)
803 | ((buffer[0] >> 1) & 0x7)
804 | (buffer[3] & 0x80 ? 0x10 : 0);
805 break;
807 case 'n':
808 val = (buffer[1] & 0x40 ? 0x8 : 0) | ((buffer[0] >> 1) & 0x7);
809 break;
811 case 'o':
812 val = (buffer[2] >> 4) | (buffer[3] & 0x80 ? 0x10 : 0);
813 break;
815 case 'M':
816 val = (buffer[1] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0);
817 break;
819 case 'N':
820 val = (buffer[3] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0);
821 break;
823 case 'h':
824 val = buffer[2] >> 2;
825 break;
827 default:
828 abort ();
831 switch (bits)
833 case 1:
834 return val & 1;
835 case 2:
836 return val & 3;
837 case 3:
838 return val & 7;
839 case 4:
840 return val & 017;
841 case 5:
842 return val & 037;
843 case 6:
844 return val & 077;
845 case 7:
846 return val & 0177;
847 case 8:
848 return val & 0377;
849 case 12:
850 return val & 07777;
851 default:
852 abort ();
856 /* Check if an EA is valid for a particular code. This is required
857 for the EMAC instructions since the type of source address determines
858 if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it
859 is a non-load EMAC instruction and the bits mean register Ry.
860 A similar case exists for the movem instructions where the register
861 mask is interpreted differently for different EAs. */
863 static bfd_boolean
864 m68k_valid_ea (char code, int val)
866 int mode, mask;
867 #define M(n0,n1,n2,n3,n4,n5,n6,n70,n71,n72,n73,n74) \
868 (n0 | n1 << 1 | n2 << 2 | n3 << 3 | n4 << 4 | n5 << 5 | n6 << 6 \
869 | n70 << 7 | n71 << 8 | n72 << 9 | n73 << 10 | n74 << 11)
871 switch (code)
873 case '*':
874 mask = M (1,1,1,1,1,1,1,1,1,1,1,1);
875 break;
876 case '~':
877 mask = M (0,0,1,1,1,1,1,1,1,0,0,0);
878 break;
879 case '%':
880 mask = M (1,1,1,1,1,1,1,1,1,0,0,0);
881 break;
882 case ';':
883 mask = M (1,0,1,1,1,1,1,1,1,1,1,1);
884 break;
885 case '@':
886 mask = M (1,0,1,1,1,1,1,1,1,1,1,0);
887 break;
888 case '!':
889 mask = M (0,0,1,0,0,1,1,1,1,1,1,0);
890 break;
891 case '&':
892 mask = M (0,0,1,0,0,1,1,1,1,0,0,0);
893 break;
894 case '$':
895 mask = M (1,0,1,1,1,1,1,1,1,0,0,0);
896 break;
897 case '?':
898 mask = M (1,0,1,0,0,1,1,1,1,0,0,0);
899 break;
900 case '/':
901 mask = M (1,0,1,0,0,1,1,1,1,1,1,0);
902 break;
903 case '|':
904 mask = M (0,0,1,0,0,1,1,1,1,1,1,0);
905 break;
906 case '>':
907 mask = M (0,0,1,0,1,1,1,1,1,0,0,0);
908 break;
909 case '<':
910 mask = M (0,0,1,1,0,1,1,1,1,1,1,0);
911 break;
912 case 'm':
913 mask = M (1,1,1,1,1,0,0,0,0,0,0,0);
914 break;
915 case 'n':
916 mask = M (0,0,0,0,0,1,0,0,0,1,0,0);
917 break;
918 case 'o':
919 mask = M (0,0,0,0,0,0,1,1,1,0,1,1);
920 break;
921 case 'p':
922 mask = M (1,1,1,1,1,1,0,0,0,0,0,0);
923 break;
924 case 'q':
925 mask = M (1,0,1,1,1,1,0,0,0,0,0,0);
926 break;
927 case 'v':
928 mask = M (1,0,1,1,1,1,0,1,1,0,0,0);
929 break;
930 case 'b':
931 mask = M (1,0,1,1,1,1,0,0,0,1,0,0);
932 break;
933 case 'w':
934 mask = M (0,0,1,1,1,1,0,0,0,1,0,0);
935 break;
936 case 'y':
937 mask = M (0,0,1,0,0,1,0,0,0,0,0,0);
938 break;
939 case 'z':
940 mask = M (0,0,1,0,0,1,0,0,0,1,0,0);
941 break;
942 case '4':
943 mask = M (0,0,1,1,1,1,0,0,0,0,0,0);
944 break;
945 default:
946 abort ();
948 #undef M
950 mode = (val >> 3) & 7;
951 if (mode == 7)
952 mode += val & 7;
953 return (mask & (1 << mode)) != 0;
956 /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
957 REGNO = -1 for pc, -2 for none (suppressed). */
959 static void
960 print_base (int regno, bfd_vma disp, disassemble_info *info)
962 if (regno == -1)
964 (*info->fprintf_func) (info->stream, "%%pc@(");
965 (*info->print_address_func) (disp, info);
967 else
969 char buf[50];
971 if (regno == -2)
972 (*info->fprintf_func) (info->stream, "@(");
973 else if (regno == -3)
974 (*info->fprintf_func) (info->stream, "%%zpc@(");
975 else
976 (*info->fprintf_func) (info->stream, "%s@(", reg_names[regno]);
978 sprintf_vma (buf, disp);
979 (*info->fprintf_func) (info->stream, "%s", buf);
983 /* Print an indexed argument. The base register is BASEREG (-1 for pc).
984 P points to extension word, in buffer.
985 ADDR is the nominal core address of that extension word. */
987 static unsigned char *
988 print_indexed (int basereg,
989 unsigned char *p,
990 bfd_vma addr,
991 disassemble_info *info)
993 int word;
994 static const char *const scales[] = { "", ":2", ":4", ":8" };
995 bfd_vma base_disp;
996 bfd_vma outer_disp;
997 char buf[40];
998 char vmabuf[50];
1000 word = NEXTWORD (p);
1002 /* Generate the text for the index register.
1003 Where this will be output is not yet determined. */
1004 sprintf (buf, "%s:%c%s",
1005 reg_names[(word >> 12) & 0xf],
1006 (word & 0x800) ? 'l' : 'w',
1007 scales[(word >> 9) & 3]);
1009 /* Handle the 68000 style of indexing. */
1011 if ((word & 0x100) == 0)
1013 base_disp = word & 0xff;
1014 if ((base_disp & 0x80) != 0)
1015 base_disp -= 0x100;
1016 if (basereg == -1)
1017 base_disp += addr;
1018 print_base (basereg, base_disp, info);
1019 (*info->fprintf_func) (info->stream, ",%s)", buf);
1020 return p;
1023 /* Handle the generalized kind. */
1024 /* First, compute the displacement to add to the base register. */
1025 if (word & 0200)
1027 if (basereg == -1)
1028 basereg = -3;
1029 else
1030 basereg = -2;
1032 if (word & 0100)
1033 buf[0] = '\0';
1034 base_disp = 0;
1035 switch ((word >> 4) & 3)
1037 case 2:
1038 base_disp = NEXTWORD (p);
1039 break;
1040 case 3:
1041 base_disp = NEXTLONG (p);
1043 if (basereg == -1)
1044 base_disp += addr;
1046 /* Handle single-level case (not indirect). */
1047 if ((word & 7) == 0)
1049 print_base (basereg, base_disp, info);
1050 if (buf[0] != '\0')
1051 (*info->fprintf_func) (info->stream, ",%s", buf);
1052 (*info->fprintf_func) (info->stream, ")");
1053 return p;
1056 /* Two level. Compute displacement to add after indirection. */
1057 outer_disp = 0;
1058 switch (word & 3)
1060 case 2:
1061 outer_disp = NEXTWORD (p);
1062 break;
1063 case 3:
1064 outer_disp = NEXTLONG (p);
1067 print_base (basereg, base_disp, info);
1068 if ((word & 4) == 0 && buf[0] != '\0')
1070 (*info->fprintf_func) (info->stream, ",%s", buf);
1071 buf[0] = '\0';
1073 sprintf_vma (vmabuf, outer_disp);
1074 (*info->fprintf_func) (info->stream, ")@(%s", vmabuf);
1075 if (buf[0] != '\0')
1076 (*info->fprintf_func) (info->stream, ",%s", buf);
1077 (*info->fprintf_func) (info->stream, ")");
1079 return p;
1082 /* Returns number of bytes "eaten" by the operand, or
1083 return -1 if an invalid operand was found, or -2 if
1084 an opcode tabe error was found.
1085 ADDR is the pc for this arg to be relative to. */
1087 static int
1088 print_insn_arg (const char *d,
1089 unsigned char *buffer,
1090 unsigned char *p0,
1091 bfd_vma addr,
1092 disassemble_info *info)
1094 int val = 0;
1095 int place = d[1];
1096 unsigned char *p = p0;
1097 int regno;
1098 const char *regname;
1099 unsigned char *p1;
1100 double flval;
1101 int flt_p;
1102 bfd_signed_vma disp;
1103 unsigned int uval;
1105 switch (*d)
1107 case 'c': /* Cache identifier. */
1109 static const char *const cacheFieldName[] = { "nc", "dc", "ic", "bc" };
1110 val = fetch_arg (buffer, place, 2, info);
1111 (*info->fprintf_func) (info->stream, cacheFieldName[val]);
1112 break;
1115 case 'a': /* Address register indirect only. Cf. case '+'. */
1117 (*info->fprintf_func)
1118 (info->stream,
1119 "%s@",
1120 reg_names[fetch_arg (buffer, place, 3, info) + 8]);
1121 break;
1124 case '_': /* 32-bit absolute address for move16. */
1126 uval = NEXTULONG (p);
1127 (*info->print_address_func) (uval, info);
1128 break;
1131 case 'C':
1132 (*info->fprintf_func) (info->stream, "%%ccr");
1133 break;
1135 case 'S':
1136 (*info->fprintf_func) (info->stream, "%%sr");
1137 break;
1139 case 'U':
1140 (*info->fprintf_func) (info->stream, "%%usp");
1141 break;
1143 case 'E':
1144 (*info->fprintf_func) (info->stream, "%%acc");
1145 break;
1147 case 'G':
1148 (*info->fprintf_func) (info->stream, "%%macsr");
1149 break;
1151 case 'H':
1152 (*info->fprintf_func) (info->stream, "%%mask");
1153 break;
1155 case 'J':
1157 /* FIXME: There's a problem here, different m68k processors call the
1158 same address different names. This table can't get it right
1159 because it doesn't know which processor it's disassembling for. */
1160 static const struct { const char *name; int value; } names[]
1161 = {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
1162 {"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
1163 {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
1164 {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
1165 {"%msp", 0x803}, {"%isp", 0x804},
1166 {"%flashbar", 0xc04}, {"%rambar", 0xc05}, /* mcf528x added these. */
1168 /* Should we be calling this psr like we do in case 'Y'? */
1169 {"%mmusr",0x805},
1171 {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808}};
1173 val = fetch_arg (buffer, place, 12, info);
1174 for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--)
1175 if (names[regno].value == val)
1177 (*info->fprintf_func) (info->stream, "%s", names[regno].name);
1178 break;
1180 if (regno < 0)
1181 (*info->fprintf_func) (info->stream, "%d", val);
1183 break;
1185 case 'Q':
1186 val = fetch_arg (buffer, place, 3, info);
1187 /* 0 means 8, except for the bkpt instruction... */
1188 if (val == 0 && d[1] != 's')
1189 val = 8;
1190 (*info->fprintf_func) (info->stream, "#%d", val);
1191 break;
1193 case 'x':
1194 val = fetch_arg (buffer, place, 3, info);
1195 /* 0 means -1. */
1196 if (val == 0)
1197 val = -1;
1198 (*info->fprintf_func) (info->stream, "#%d", val);
1199 break;
1201 case 'M':
1202 if (place == 'h')
1204 static const char *const scalefactor_name[] = { "<<", ">>" };
1205 val = fetch_arg (buffer, place, 1, info);
1206 (*info->fprintf_func) (info->stream, scalefactor_name[val]);
1208 else
1210 val = fetch_arg (buffer, place, 8, info);
1211 if (val & 0x80)
1212 val = val - 0x100;
1213 (*info->fprintf_func) (info->stream, "#%d", val);
1215 break;
1217 case 'T':
1218 val = fetch_arg (buffer, place, 4, info);
1219 (*info->fprintf_func) (info->stream, "#%d", val);
1220 break;
1222 case 'D':
1223 (*info->fprintf_func) (info->stream, "%s",
1224 reg_names[fetch_arg (buffer, place, 3, info)]);
1225 break;
1227 case 'A':
1228 (*info->fprintf_func)
1229 (info->stream, "%s",
1230 reg_names[fetch_arg (buffer, place, 3, info) + 010]);
1231 break;
1233 case 'R':
1234 (*info->fprintf_func)
1235 (info->stream, "%s",
1236 reg_names[fetch_arg (buffer, place, 4, info)]);
1237 break;
1239 case 'r':
1240 regno = fetch_arg (buffer, place, 4, info);
1241 if (regno > 7)
1242 (*info->fprintf_func) (info->stream, "%s@", reg_names[regno]);
1243 else
1244 (*info->fprintf_func) (info->stream, "@(%s)", reg_names[regno]);
1245 break;
1247 case 'F':
1248 (*info->fprintf_func)
1249 (info->stream, "%%fp%d",
1250 fetch_arg (buffer, place, 3, info));
1251 break;
1253 case 'O':
1254 val = fetch_arg (buffer, place, 6, info);
1255 if (val & 0x20)
1256 (*info->fprintf_func) (info->stream, "%s", reg_names[val & 7]);
1257 else
1258 (*info->fprintf_func) (info->stream, "%d", val);
1259 break;
1261 case '+':
1262 (*info->fprintf_func)
1263 (info->stream, "%s@+",
1264 reg_names[fetch_arg (buffer, place, 3, info) + 8]);
1265 break;
1267 case '-':
1268 (*info->fprintf_func)
1269 (info->stream, "%s@-",
1270 reg_names[fetch_arg (buffer, place, 3, info) + 8]);
1271 break;
1273 case 'k':
1274 if (place == 'k')
1275 (*info->fprintf_func)
1276 (info->stream, "{%s}",
1277 reg_names[fetch_arg (buffer, place, 3, info)]);
1278 else if (place == 'C')
1280 val = fetch_arg (buffer, place, 7, info);
1281 if (val > 63) /* This is a signed constant. */
1282 val -= 128;
1283 (*info->fprintf_func) (info->stream, "{#%d}", val);
1285 else
1286 return -2;
1287 break;
1289 case '#':
1290 case '^':
1291 p1 = buffer + (*d == '#' ? 2 : 4);
1292 if (place == 's')
1293 val = fetch_arg (buffer, place, 4, info);
1294 else if (place == 'C')
1295 val = fetch_arg (buffer, place, 7, info);
1296 else if (place == '8')
1297 val = fetch_arg (buffer, place, 3, info);
1298 else if (place == '3')
1299 val = fetch_arg (buffer, place, 8, info);
1300 else if (place == 'b')
1301 val = NEXTBYTE (p1);
1302 else if (place == 'w' || place == 'W')
1303 val = NEXTWORD (p1);
1304 else if (place == 'l')
1305 val = NEXTLONG (p1);
1306 else
1307 return -2;
1308 (*info->fprintf_func) (info->stream, "#%d", val);
1309 break;
1311 case 'B':
1312 if (place == 'b')
1313 disp = NEXTBYTE (p);
1314 else if (place == 'B')
1315 disp = COERCE_SIGNED_CHAR (buffer[1]);
1316 else if (place == 'w' || place == 'W')
1317 disp = NEXTWORD (p);
1318 else if (place == 'l' || place == 'L' || place == 'C')
1319 disp = NEXTLONG (p);
1320 else if (place == 'g')
1322 disp = NEXTBYTE (buffer);
1323 if (disp == 0)
1324 disp = NEXTWORD (p);
1325 else if (disp == -1)
1326 disp = NEXTLONG (p);
1328 else if (place == 'c')
1330 if (buffer[1] & 0x40) /* If bit six is one, long offset. */
1331 disp = NEXTLONG (p);
1332 else
1333 disp = NEXTWORD (p);
1335 else
1336 return -2;
1338 (*info->print_address_func) (addr + disp, info);
1339 break;
1341 case 'd':
1342 val = NEXTWORD (p);
1343 (*info->fprintf_func)
1344 (info->stream, "%s@(%d)",
1345 reg_names[fetch_arg (buffer, place, 3, info) + 8], val);
1346 break;
1348 case 's':
1349 (*info->fprintf_func) (info->stream, "%s",
1350 fpcr_names[fetch_arg (buffer, place, 3, info)]);
1351 break;
1353 case 'e':
1354 val = fetch_arg(buffer, place, 2, info);
1355 (*info->fprintf_func) (info->stream, "%%acc%d", val);
1356 break;
1358 case 'g':
1359 val = fetch_arg(buffer, place, 1, info);
1360 (*info->fprintf_func) (info->stream, "%%accext%s", val==0 ? "01" : "23");
1361 break;
1363 case 'i':
1364 val = fetch_arg(buffer, place, 2, info);
1365 if (val == 1)
1366 (*info->fprintf_func) (info->stream, "<<");
1367 else if (val == 3)
1368 (*info->fprintf_func) (info->stream, ">>");
1369 else
1370 return -1;
1371 break;
1373 case 'I':
1374 /* Get coprocessor ID... */
1375 val = fetch_arg (buffer, 'd', 3, info);
1377 if (val != 1) /* Unusual coprocessor ID? */
1378 (*info->fprintf_func) (info->stream, "(cpid=%d) ", val);
1379 break;
1381 case '4':
1382 case '*':
1383 case '~':
1384 case '%':
1385 case ';':
1386 case '@':
1387 case '!':
1388 case '$':
1389 case '?':
1390 case '/':
1391 case '&':
1392 case '|':
1393 case '<':
1394 case '>':
1395 case 'm':
1396 case 'n':
1397 case 'o':
1398 case 'p':
1399 case 'q':
1400 case 'v':
1401 case 'b':
1402 case 'w':
1403 case 'y':
1404 case 'z':
1405 if (place == 'd')
1407 val = fetch_arg (buffer, 'x', 6, info);
1408 val = ((val & 7) << 3) + ((val >> 3) & 7);
1410 else
1411 val = fetch_arg (buffer, 's', 6, info);
1413 /* If the <ea> is invalid for *d, then reject this match. */
1414 if (!m68k_valid_ea (*d, val))
1415 return -1;
1417 /* Get register number assuming address register. */
1418 regno = (val & 7) + 8;
1419 regname = reg_names[regno];
1420 switch (val >> 3)
1422 case 0:
1423 (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
1424 break;
1426 case 1:
1427 (*info->fprintf_func) (info->stream, "%s", regname);
1428 break;
1430 case 2:
1431 (*info->fprintf_func) (info->stream, "%s@", regname);
1432 break;
1434 case 3:
1435 (*info->fprintf_func) (info->stream, "%s@+", regname);
1436 break;
1438 case 4:
1439 (*info->fprintf_func) (info->stream, "%s@-", regname);
1440 break;
1442 case 5:
1443 val = NEXTWORD (p);
1444 (*info->fprintf_func) (info->stream, "%s@(%d)", regname, val);
1445 break;
1447 case 6:
1448 p = print_indexed (regno, p, addr, info);
1449 break;
1451 case 7:
1452 switch (val & 7)
1454 case 0:
1455 val = NEXTWORD (p);
1456 (*info->print_address_func) (val, info);
1457 break;
1459 case 1:
1460 uval = NEXTULONG (p);
1461 (*info->print_address_func) (uval, info);
1462 break;
1464 case 2:
1465 val = NEXTWORD (p);
1466 (*info->fprintf_func) (info->stream, "%%pc@(");
1467 (*info->print_address_func) (addr + val, info);
1468 (*info->fprintf_func) (info->stream, ")");
1469 break;
1471 case 3:
1472 p = print_indexed (-1, p, addr, info);
1473 break;
1475 case 4:
1476 flt_p = 1; /* Assume it's a float... */
1477 switch (place)
1479 case 'b':
1480 val = NEXTBYTE (p);
1481 flt_p = 0;
1482 break;
1484 case 'w':
1485 val = NEXTWORD (p);
1486 flt_p = 0;
1487 break;
1489 case 'l':
1490 val = NEXTLONG (p);
1491 flt_p = 0;
1492 break;
1494 case 'f':
1495 NEXTSINGLE (flval, p);
1496 break;
1498 case 'F':
1499 NEXTDOUBLE (flval, p);
1500 break;
1502 case 'x':
1503 NEXTEXTEND (flval, p);
1504 break;
1506 case 'p':
1507 flval = NEXTPACKED (p);
1508 break;
1510 default:
1511 return -1;
1513 if (flt_p) /* Print a float? */
1514 (*info->fprintf_func) (info->stream, "#%g", flval);
1515 else
1516 (*info->fprintf_func) (info->stream, "#%d", val);
1517 break;
1519 default:
1520 return -1;
1524 /* If place is '/', then this is the case of the mask bit for
1525 mac/emac loads. Now that the arg has been printed, grab the
1526 mask bit and if set, add a '&' to the arg. */
1527 if (place == '/')
1529 val = fetch_arg (buffer, place, 1, info);
1530 if (val)
1531 info->fprintf_func (info->stream, "&");
1533 break;
1535 case 'L':
1536 case 'l':
1537 if (place == 'w')
1539 char doneany;
1540 p1 = buffer + 2;
1541 val = NEXTWORD (p1);
1542 /* Move the pointer ahead if this point is farther ahead
1543 than the last. */
1544 p = p1 > p ? p1 : p;
1545 if (val == 0)
1547 (*info->fprintf_func) (info->stream, "#0");
1548 break;
1550 if (*d == 'l')
1552 int newval = 0;
1554 for (regno = 0; regno < 16; ++regno)
1555 if (val & (0x8000 >> regno))
1556 newval |= 1 << regno;
1557 val = newval;
1559 val &= 0xffff;
1560 doneany = 0;
1561 for (regno = 0; regno < 16; ++regno)
1562 if (val & (1 << regno))
1564 int first_regno;
1566 if (doneany)
1567 (*info->fprintf_func) (info->stream, "/");
1568 doneany = 1;
1569 (*info->fprintf_func) (info->stream, "%s", reg_names[regno]);
1570 first_regno = regno;
1571 while (val & (1 << (regno + 1)))
1572 ++regno;
1573 if (regno > first_regno)
1574 (*info->fprintf_func) (info->stream, "-%s",
1575 reg_names[regno]);
1578 else if (place == '3')
1580 /* `fmovem' insn. */
1581 char doneany;
1582 val = fetch_arg (buffer, place, 8, info);
1583 if (val == 0)
1585 (*info->fprintf_func) (info->stream, "#0");
1586 break;
1588 if (*d == 'l')
1590 int newval = 0;
1592 for (regno = 0; regno < 8; ++regno)
1593 if (val & (0x80 >> regno))
1594 newval |= 1 << regno;
1595 val = newval;
1597 val &= 0xff;
1598 doneany = 0;
1599 for (regno = 0; regno < 8; ++regno)
1600 if (val & (1 << regno))
1602 int first_regno;
1603 if (doneany)
1604 (*info->fprintf_func) (info->stream, "/");
1605 doneany = 1;
1606 (*info->fprintf_func) (info->stream, "%%fp%d", regno);
1607 first_regno = regno;
1608 while (val & (1 << (regno + 1)))
1609 ++regno;
1610 if (regno > first_regno)
1611 (*info->fprintf_func) (info->stream, "-%%fp%d", regno);
1614 else if (place == '8')
1616 /* fmoveml for FP status registers. */
1617 (*info->fprintf_func) (info->stream, "%s",
1618 fpcr_names[fetch_arg (buffer, place, 3,
1619 info)]);
1621 else
1622 return -2;
1623 break;
1625 case 'X':
1626 place = '8';
1627 case 'Y':
1628 case 'Z':
1629 case 'W':
1630 case '0':
1631 case '1':
1632 case '2':
1633 case '3':
1635 int val = fetch_arg (buffer, place, 5, info);
1636 const char *name = 0;
1638 switch (val)
1640 case 2: name = "%tt0"; break;
1641 case 3: name = "%tt1"; break;
1642 case 0x10: name = "%tc"; break;
1643 case 0x11: name = "%drp"; break;
1644 case 0x12: name = "%srp"; break;
1645 case 0x13: name = "%crp"; break;
1646 case 0x14: name = "%cal"; break;
1647 case 0x15: name = "%val"; break;
1648 case 0x16: name = "%scc"; break;
1649 case 0x17: name = "%ac"; break;
1650 case 0x18: name = "%psr"; break;
1651 case 0x19: name = "%pcsr"; break;
1652 case 0x1c:
1653 case 0x1d:
1655 int break_reg = ((buffer[3] >> 2) & 7);
1657 (*info->fprintf_func)
1658 (info->stream, val == 0x1c ? "%%bad%d" : "%%bac%d",
1659 break_reg);
1661 break;
1662 default:
1663 (*info->fprintf_func) (info->stream, "<mmu register %d>", val);
1665 if (name)
1666 (*info->fprintf_func) (info->stream, "%s", name);
1668 break;
1670 case 'f':
1672 int fc = fetch_arg (buffer, place, 5, info);
1674 if (fc == 1)
1675 (*info->fprintf_func) (info->stream, "%%dfc");
1676 else if (fc == 0)
1677 (*info->fprintf_func) (info->stream, "%%sfc");
1678 else
1679 /* xgettext:c-format */
1680 (*info->fprintf_func) (info->stream, _("<function code %d>"), fc);
1682 break;
1684 case 'V':
1685 (*info->fprintf_func) (info->stream, "%%val");
1686 break;
1688 case 't':
1690 int level = fetch_arg (buffer, place, 3, info);
1692 (*info->fprintf_func) (info->stream, "%d", level);
1694 break;
1696 case 'u':
1698 short is_upper = 0;
1699 int reg = fetch_arg (buffer, place, 5, info);
1701 if (reg & 0x10)
1703 is_upper = 1;
1704 reg &= 0xf;
1706 (*info->fprintf_func) (info->stream, "%s%s",
1707 reg_half_names[reg],
1708 is_upper ? "u" : "l");
1710 break;
1712 default:
1713 return -2;
1716 return p - p0;
1719 /* Try to match the current instruction to best and if so, return the
1720 number of bytes consumed from the instruction stream, else zero. */
1722 static int
1723 match_insn_m68k (bfd_vma memaddr,
1724 disassemble_info * info,
1725 const struct m68k_opcode * best,
1726 struct private * priv)
1728 unsigned char *save_p;
1729 unsigned char *p;
1730 const char *d;
1732 bfd_byte *buffer = priv->the_buffer;
1733 fprintf_ftype save_printer = info->fprintf_func;
1734 void (* save_print_address) (bfd_vma, struct disassemble_info *)
1735 = info->print_address_func;
1737 /* Point at first word of argument data,
1738 and at descriptor for first argument. */
1739 p = buffer + 2;
1741 /* Figure out how long the fixed-size portion of the instruction is.
1742 The only place this is stored in the opcode table is
1743 in the arguments--look for arguments which specify fields in the 2nd
1744 or 3rd words of the instruction. */
1745 for (d = best->args; *d; d += 2)
1747 /* I don't think it is necessary to be checking d[0] here;
1748 I suspect all this could be moved to the case statement below. */
1749 if (d[0] == '#')
1751 if (d[1] == 'l' && p - buffer < 6)
1752 p = buffer + 6;
1753 else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8')
1754 p = buffer + 4;
1757 if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4)
1758 p = buffer + 4;
1760 switch (d[1])
1762 case '1':
1763 case '2':
1764 case '3':
1765 case '7':
1766 case '8':
1767 case '9':
1768 case 'i':
1769 if (p - buffer < 4)
1770 p = buffer + 4;
1771 break;
1772 case '4':
1773 case '5':
1774 case '6':
1775 if (p - buffer < 6)
1776 p = buffer + 6;
1777 break;
1778 default:
1779 break;
1783 /* pflusha is an exceptions. It takes no arguments but is two words
1784 long. Recognize it by looking at the lower 16 bits of the mask. */
1785 if (p - buffer < 4 && (best->match & 0xFFFF) != 0)
1786 p = buffer + 4;
1788 /* lpstop is another exception. It takes a one word argument but is
1789 three words long. */
1790 if (p - buffer < 6
1791 && (best->match & 0xffff) == 0xffff
1792 && best->args[0] == '#'
1793 && best->args[1] == 'w')
1795 /* Copy the one word argument into the usual location for a one
1796 word argument, to simplify printing it. We can get away with
1797 this because we know exactly what the second word is, and we
1798 aren't going to print anything based on it. */
1799 p = buffer + 6;
1800 FETCH_DATA (info, p);
1801 buffer[2] = buffer[4];
1802 buffer[3] = buffer[5];
1805 FETCH_DATA (info, p);
1807 d = best->args;
1809 save_p = p;
1810 info->print_address_func = dummy_print_address;
1811 info->fprintf_func = (fprintf_ftype) dummy_printer;
1813 /* We scan the operands twice. The first time we don't print anything,
1814 but look for errors. */
1815 for (; *d; d += 2)
1817 int eaten = print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
1819 if (eaten >= 0)
1820 p += eaten;
1821 else if (eaten == -1)
1823 info->fprintf_func = save_printer;
1824 info->print_address_func = save_print_address;
1825 return 0;
1827 else
1829 info->fprintf_func (info->stream,
1830 /* xgettext:c-format */
1831 _("<internal error in opcode table: %s %s>\n"),
1832 best->name, best->args);
1833 info->fprintf_func = save_printer;
1834 info->print_address_func = save_print_address;
1835 return 2;
1839 p = save_p;
1840 info->fprintf_func = save_printer;
1841 info->print_address_func = save_print_address;
1843 d = best->args;
1845 info->fprintf_func (info->stream, "%s", best->name);
1847 if (*d)
1848 info->fprintf_func (info->stream, " ");
1850 while (*d)
1852 p += print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
1853 d += 2;
1855 if (*d && *(d - 2) != 'I' && *d != 'k')
1856 info->fprintf_func (info->stream, ",");
1859 return p - buffer;
1862 /* Print the m68k instruction at address MEMADDR in debugged memory,
1863 on INFO->STREAM. Returns length of the instruction, in bytes. */
1866 print_insn_m68k (bfd_vma memaddr, disassemble_info *info)
1868 int i;
1869 const char *d;
1870 unsigned int arch_mask;
1871 struct private priv;
1872 bfd_byte *buffer = priv.the_buffer;
1873 int major_opcode;
1874 static int numopcodes[16];
1875 static const struct m68k_opcode **opcodes[16];
1876 int val;
1878 if (!opcodes[0])
1880 /* Speed up the matching by sorting the opcode
1881 table on the upper four bits of the opcode. */
1882 const struct m68k_opcode **opc_pointer[16];
1884 /* First count how many opcodes are in each of the sixteen buckets. */
1885 for (i = 0; i < m68k_numopcodes; i++)
1886 numopcodes[(m68k_opcodes[i].opcode >> 28) & 15]++;
1888 /* Then create a sorted table of pointers
1889 that point into the unsorted table. */
1890 opc_pointer[0] = malloc (sizeof (struct m68k_opcode *)
1891 * m68k_numopcodes);
1892 opcodes[0] = opc_pointer[0];
1894 for (i = 1; i < 16; i++)
1896 opc_pointer[i] = opc_pointer[i - 1] + numopcodes[i - 1];
1897 opcodes[i] = opc_pointer[i];
1900 for (i = 0; i < m68k_numopcodes; i++)
1901 *opc_pointer[(m68k_opcodes[i].opcode >> 28) & 15]++ = &m68k_opcodes[i];
1904 info->private_data = (PTR) &priv;
1905 /* Tell objdump to use two bytes per chunk
1906 and six bytes per line for displaying raw data. */
1907 info->bytes_per_chunk = 2;
1908 info->bytes_per_line = 6;
1909 info->display_endian = BFD_ENDIAN_BIG;
1910 priv.max_fetched = priv.the_buffer;
1911 priv.insn_start = memaddr;
1913 if (setjmp (priv.bailout) != 0)
1914 /* Error return. */
1915 return -1;
1917 switch (info->mach)
1919 default:
1920 case 0:
1921 arch_mask = (unsigned int) -1;
1922 break;
1923 case bfd_mach_m68000:
1924 arch_mask = m68000|m68881|m68851;
1925 break;
1926 case bfd_mach_m68008:
1927 arch_mask = m68008|m68881|m68851;
1928 break;
1929 case bfd_mach_m68010:
1930 arch_mask = m68010|m68881|m68851;
1931 break;
1932 case bfd_mach_m68020:
1933 arch_mask = m68020|m68881|m68851;
1934 break;
1935 case bfd_mach_m68030:
1936 arch_mask = m68030|m68881|m68851;
1937 break;
1938 case bfd_mach_m68040:
1939 arch_mask = m68040|m68881|m68851;
1940 break;
1941 case bfd_mach_m68060:
1942 arch_mask = m68060|m68881|m68851;
1943 break;
1944 case bfd_mach_mcf5200:
1945 arch_mask = mcfisa_a;
1946 break;
1947 case bfd_mach_mcf521x:
1948 case bfd_mach_mcf528x:
1949 arch_mask = mcfisa_a|mcfhwdiv|mcfisa_aa|mcfusp|mcfemac;
1950 break;
1951 case bfd_mach_mcf5206e:
1952 arch_mask = mcfisa_a|mcfhwdiv|mcfmac;
1953 break;
1954 case bfd_mach_mcf5249:
1955 arch_mask = mcfisa_a|mcfhwdiv|mcfemac;
1956 break;
1957 case bfd_mach_mcf5307:
1958 arch_mask = mcfisa_a|mcfhwdiv|mcfmac;
1959 break;
1960 case bfd_mach_mcf5407:
1961 arch_mask = mcfisa_a|mcfhwdiv|mcfisa_b|mcfmac;
1962 break;
1963 case bfd_mach_mcf547x:
1964 case bfd_mach_mcf548x:
1965 case bfd_mach_mcfv4e:
1966 arch_mask = mcfisa_a|mcfhwdiv|mcfisa_b|mcfusp|cfloat|mcfemac;
1967 break;
1970 FETCH_DATA (info, buffer + 2);
1971 major_opcode = (buffer[0] >> 4) & 15;
1973 for (i = 0; i < numopcodes[major_opcode]; i++)
1975 const struct m68k_opcode *opc = opcodes[major_opcode][i];
1976 unsigned long opcode = opc->opcode;
1977 unsigned long match = opc->match;
1979 if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24)))
1980 && ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16)))
1981 /* Only fetch the next two bytes if we need to. */
1982 && (((0xffff & match) == 0)
1984 (FETCH_DATA (info, buffer + 4)
1985 && ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8)))
1986 && ((0xff & buffer[3] & match) == (0xff & opcode)))
1988 && (opc->arch & arch_mask) != 0)
1990 /* Don't use for printout the variants of divul and divsl
1991 that have the same register number in two places.
1992 The more general variants will match instead. */
1993 for (d = opc->args; *d; d += 2)
1994 if (d[1] == 'D')
1995 break;
1997 /* Don't use for printout the variants of most floating
1998 point coprocessor instructions which use the same
1999 register number in two places, as above. */
2000 if (*d == '\0')
2001 for (d = opc->args; *d; d += 2)
2002 if (d[1] == 't')
2003 break;
2005 /* Don't match fmovel with more than one register;
2006 wait for fmoveml. */
2007 if (*d == '\0')
2009 for (d = opc->args; *d; d += 2)
2011 if (d[0] == 's' && d[1] == '8')
2013 val = fetch_arg (buffer, d[1], 3, info);
2014 if ((val & (val - 1)) != 0)
2015 break;
2020 if (*d == '\0')
2021 if ((val = match_insn_m68k (memaddr, info, opc, & priv)))
2022 return val;
2026 /* Handle undefined instructions. */
2027 info->fprintf_func (info->stream, "0%o", (buffer[0] << 8) + buffer[1]);
2028 return 2;
2030 /* **** End of m68k-dis.c */
2031 /* **** m68k-opc.h from sourceware.org CVS 2005-08-14. */
2032 /* Opcode table for m680[012346]0/m6888[12]/m68851/mcf5200.
2033 Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
2034 2000, 2001, 2003, 2004, 2005
2035 Free Software Foundation, Inc.
2037 This file is part of GDB, GAS, and the GNU binutils.
2039 GDB, GAS, and the GNU binutils are free software; you can redistribute
2040 them and/or modify them under the terms of the GNU General Public
2041 License as published by the Free Software Foundation; either version
2042 1, or (at your option) any later version.
2044 GDB, GAS, and the GNU binutils are distributed in the hope that they
2045 will be useful, but WITHOUT ANY WARRANTY; without even the implied
2046 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
2047 the GNU General Public License for more details.
2049 You should have received a copy of the GNU General Public License
2050 along with this file; see the file COPYING. If not, write to the Free
2051 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
2052 02110-1301, USA. */
2054 #define one(x) ((unsigned int) (x) << 16)
2055 #define two(x, y) (((unsigned int) (x) << 16) + (y))
2057 /* The assembler requires that all instances of the same mnemonic must
2058 be consecutive. If they aren't, the assembler will bomb at
2059 runtime. */
2061 const struct m68k_opcode m68k_opcodes[] =
2063 {"abcd", 2, one(0140400), one(0170770), "DsDd", m68000up },
2064 {"abcd", 2, one(0140410), one(0170770), "-s-d", m68000up },
2066 {"addaw", 2, one(0150300), one(0170700), "*wAd", m68000up },
2067 {"addal", 2, one(0150700), one(0170700), "*lAd", m68000up | mcfisa_a },
2069 {"addib", 4, one(0003000), one(0177700), "#b$s", m68000up },
2070 {"addiw", 4, one(0003100), one(0177700), "#w$s", m68000up },
2071 {"addil", 6, one(0003200), one(0177700), "#l$s", m68000up },
2072 {"addil", 6, one(0003200), one(0177700), "#lDs", mcfisa_a },
2074 {"addqb", 2, one(0050000), one(0170700), "Qd$b", m68000up },
2075 {"addqw", 2, one(0050100), one(0170700), "Qd%w", m68000up },
2076 {"addql", 2, one(0050200), one(0170700), "Qd%l", m68000up | mcfisa_a },
2078 /* The add opcode can generate the adda, addi, and addq instructions. */
2079 {"addb", 2, one(0050000), one(0170700), "Qd$b", m68000up },
2080 {"addb", 4, one(0003000), one(0177700), "#b$s", m68000up },
2081 {"addb", 2, one(0150000), one(0170700), ";bDd", m68000up },
2082 {"addb", 2, one(0150400), one(0170700), "Dd~b", m68000up },
2083 {"addw", 2, one(0050100), one(0170700), "Qd%w", m68000up },
2084 {"addw", 2, one(0150300), one(0170700), "*wAd", m68000up },
2085 {"addw", 4, one(0003100), one(0177700), "#w$s", m68000up },
2086 {"addw", 2, one(0150100), one(0170700), "*wDd", m68000up },
2087 {"addw", 2, one(0150500), one(0170700), "Dd~w", m68000up },
2088 {"addl", 2, one(0050200), one(0170700), "Qd%l", m68000up | mcfisa_a },
2089 {"addl", 6, one(0003200), one(0177700), "#l$s", m68000up },
2090 {"addl", 6, one(0003200), one(0177700), "#lDs", mcfisa_a },
2091 {"addl", 2, one(0150700), one(0170700), "*lAd", m68000up | mcfisa_a },
2092 {"addl", 2, one(0150200), one(0170700), "*lDd", m68000up | mcfisa_a },
2093 {"addl", 2, one(0150600), one(0170700), "Dd~l", m68000up | mcfisa_a },
2095 {"addxb", 2, one(0150400), one(0170770), "DsDd", m68000up },
2096 {"addxb", 2, one(0150410), one(0170770), "-s-d", m68000up },
2097 {"addxw", 2, one(0150500), one(0170770), "DsDd", m68000up },
2098 {"addxw", 2, one(0150510), one(0170770), "-s-d", m68000up },
2099 {"addxl", 2, one(0150600), one(0170770), "DsDd", m68000up | mcfisa_a },
2100 {"addxl", 2, one(0150610), one(0170770), "-s-d", m68000up },
2102 {"andib", 4, one(0001000), one(0177700), "#b$s", m68000up },
2103 {"andib", 4, one(0001074), one(0177777), "#bCs", m68000up },
2104 {"andiw", 4, one(0001100), one(0177700), "#w$s", m68000up },
2105 {"andiw", 4, one(0001174), one(0177777), "#wSs", m68000up },
2106 {"andil", 6, one(0001200), one(0177700), "#l$s", m68000up },
2107 {"andil", 6, one(0001200), one(0177700), "#lDs", mcfisa_a },
2108 {"andi", 4, one(0001100), one(0177700), "#w$s", m68000up },
2109 {"andi", 4, one(0001074), one(0177777), "#bCs", m68000up },
2110 {"andi", 4, one(0001174), one(0177777), "#wSs", m68000up },
2112 /* The and opcode can generate the andi instruction. */
2113 {"andb", 4, one(0001000), one(0177700), "#b$s", m68000up },
2114 {"andb", 4, one(0001074), one(0177777), "#bCs", m68000up },
2115 {"andb", 2, one(0140000), one(0170700), ";bDd", m68000up },
2116 {"andb", 2, one(0140400), one(0170700), "Dd~b", m68000up },
2117 {"andw", 4, one(0001100), one(0177700), "#w$s", m68000up },
2118 {"andw", 4, one(0001174), one(0177777), "#wSs", m68000up },
2119 {"andw", 2, one(0140100), one(0170700), ";wDd", m68000up },
2120 {"andw", 2, one(0140500), one(0170700), "Dd~w", m68000up },
2121 {"andl", 6, one(0001200), one(0177700), "#l$s", m68000up },
2122 {"andl", 6, one(0001200), one(0177700), "#lDs", mcfisa_a },
2123 {"andl", 2, one(0140200), one(0170700), ";lDd", m68000up | mcfisa_a },
2124 {"andl", 2, one(0140600), one(0170700), "Dd~l", m68000up | mcfisa_a },
2125 {"and", 4, one(0001100), one(0177700), "#w$w", m68000up },
2126 {"and", 4, one(0001074), one(0177777), "#bCs", m68000up },
2127 {"and", 4, one(0001174), one(0177777), "#wSs", m68000up },
2128 {"and", 2, one(0140100), one(0170700), ";wDd", m68000up },
2129 {"and", 2, one(0140500), one(0170700), "Dd~w", m68000up },
2131 {"aslb", 2, one(0160400), one(0170770), "QdDs", m68000up },
2132 {"aslb", 2, one(0160440), one(0170770), "DdDs", m68000up },
2133 {"aslw", 2, one(0160500), one(0170770), "QdDs", m68000up },
2134 {"aslw", 2, one(0160540), one(0170770), "DdDs", m68000up },
2135 {"aslw", 2, one(0160700), one(0177700), "~s", m68000up },
2136 {"asll", 2, one(0160600), one(0170770), "QdDs", m68000up | mcfisa_a },
2137 {"asll", 2, one(0160640), one(0170770), "DdDs", m68000up | mcfisa_a },
2139 {"asrb", 2, one(0160000), one(0170770), "QdDs", m68000up },
2140 {"asrb", 2, one(0160040), one(0170770), "DdDs", m68000up },
2141 {"asrw", 2, one(0160100), one(0170770), "QdDs", m68000up },
2142 {"asrw", 2, one(0160140), one(0170770), "DdDs", m68000up },
2143 {"asrw", 2, one(0160300), one(0177700), "~s", m68000up },
2144 {"asrl", 2, one(0160200), one(0170770), "QdDs", m68000up | mcfisa_a },
2145 {"asrl", 2, one(0160240), one(0170770), "DdDs", m68000up | mcfisa_a },
2147 {"bhiw", 2, one(0061000), one(0177777), "BW", m68000up | mcfisa_a },
2148 {"blsw", 2, one(0061400), one(0177777), "BW", m68000up | mcfisa_a },
2149 {"bccw", 2, one(0062000), one(0177777), "BW", m68000up | mcfisa_a },
2150 {"bcsw", 2, one(0062400), one(0177777), "BW", m68000up | mcfisa_a },
2151 {"bnew", 2, one(0063000), one(0177777), "BW", m68000up | mcfisa_a },
2152 {"beqw", 2, one(0063400), one(0177777), "BW", m68000up | mcfisa_a },
2153 {"bvcw", 2, one(0064000), one(0177777), "BW", m68000up | mcfisa_a },
2154 {"bvsw", 2, one(0064400), one(0177777), "BW", m68000up | mcfisa_a },
2155 {"bplw", 2, one(0065000), one(0177777), "BW", m68000up | mcfisa_a },
2156 {"bmiw", 2, one(0065400), one(0177777), "BW", m68000up | mcfisa_a },
2157 {"bgew", 2, one(0066000), one(0177777), "BW", m68000up | mcfisa_a },
2158 {"bltw", 2, one(0066400), one(0177777), "BW", m68000up | mcfisa_a },
2159 {"bgtw", 2, one(0067000), one(0177777), "BW", m68000up | mcfisa_a },
2160 {"blew", 2, one(0067400), one(0177777), "BW", m68000up | mcfisa_a },
2162 {"bhil", 2, one(0061377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2163 {"blsl", 2, one(0061777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2164 {"bccl", 2, one(0062377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2165 {"bcsl", 2, one(0062777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2166 {"bnel", 2, one(0063377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2167 {"beql", 2, one(0063777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2168 {"bvcl", 2, one(0064377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2169 {"bvsl", 2, one(0064777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2170 {"bpll", 2, one(0065377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2171 {"bmil", 2, one(0065777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2172 {"bgel", 2, one(0066377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2173 {"bltl", 2, one(0066777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2174 {"bgtl", 2, one(0067377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2175 {"blel", 2, one(0067777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2177 {"bhis", 2, one(0061000), one(0177400), "BB", m68000up | mcfisa_a },
2178 {"blss", 2, one(0061400), one(0177400), "BB", m68000up | mcfisa_a },
2179 {"bccs", 2, one(0062000), one(0177400), "BB", m68000up | mcfisa_a },
2180 {"bcss", 2, one(0062400), one(0177400), "BB", m68000up | mcfisa_a },
2181 {"bnes", 2, one(0063000), one(0177400), "BB", m68000up | mcfisa_a },
2182 {"beqs", 2, one(0063400), one(0177400), "BB", m68000up | mcfisa_a },
2183 {"bvcs", 2, one(0064000), one(0177400), "BB", m68000up | mcfisa_a },
2184 {"bvss", 2, one(0064400), one(0177400), "BB", m68000up | mcfisa_a },
2185 {"bpls", 2, one(0065000), one(0177400), "BB", m68000up | mcfisa_a },
2186 {"bmis", 2, one(0065400), one(0177400), "BB", m68000up | mcfisa_a },
2187 {"bges", 2, one(0066000), one(0177400), "BB", m68000up | mcfisa_a },
2188 {"blts", 2, one(0066400), one(0177400), "BB", m68000up | mcfisa_a },
2189 {"bgts", 2, one(0067000), one(0177400), "BB", m68000up | mcfisa_a },
2190 {"bles", 2, one(0067400), one(0177400), "BB", m68000up | mcfisa_a },
2192 {"jhi", 2, one(0061000), one(0177400), "Bg", m68000up | mcfisa_a },
2193 {"jls", 2, one(0061400), one(0177400), "Bg", m68000up | mcfisa_a },
2194 {"jcc", 2, one(0062000), one(0177400), "Bg", m68000up | mcfisa_a },
2195 {"jcs", 2, one(0062400), one(0177400), "Bg", m68000up | mcfisa_a },
2196 {"jne", 2, one(0063000), one(0177400), "Bg", m68000up | mcfisa_a },
2197 {"jeq", 2, one(0063400), one(0177400), "Bg", m68000up | mcfisa_a },
2198 {"jvc", 2, one(0064000), one(0177400), "Bg", m68000up | mcfisa_a },
2199 {"jvs", 2, one(0064400), one(0177400), "Bg", m68000up | mcfisa_a },
2200 {"jpl", 2, one(0065000), one(0177400), "Bg", m68000up | mcfisa_a },
2201 {"jmi", 2, one(0065400), one(0177400), "Bg", m68000up | mcfisa_a },
2202 {"jge", 2, one(0066000), one(0177400), "Bg", m68000up | mcfisa_a },
2203 {"jlt", 2, one(0066400), one(0177400), "Bg", m68000up | mcfisa_a },
2204 {"jgt", 2, one(0067000), one(0177400), "Bg", m68000up | mcfisa_a },
2205 {"jle", 2, one(0067400), one(0177400), "Bg", m68000up | mcfisa_a },
2207 {"bchg", 2, one(0000500), one(0170700), "Dd$s", m68000up | mcfisa_a },
2208 {"bchg", 4, one(0004100), one(0177700), "#b$s", m68000up },
2209 {"bchg", 4, one(0004100), one(0177700), "#bqs", mcfisa_a },
2211 {"bclr", 2, one(0000600), one(0170700), "Dd$s", m68000up | mcfisa_a },
2212 {"bclr", 4, one(0004200), one(0177700), "#b$s", m68000up },
2213 {"bclr", 4, one(0004200), one(0177700), "#bqs", mcfisa_a },
2215 {"bfchg", 4, two(0165300, 0), two(0177700, 0170000), "?sO2O3", m68020up },
2216 {"bfclr", 4, two(0166300, 0), two(0177700, 0170000), "?sO2O3", m68020up },
2217 {"bfexts", 4, two(0165700, 0), two(0177700, 0100000), "/sO2O3D1", m68020up },
2218 {"bfextu", 4, two(0164700, 0), two(0177700, 0100000), "/sO2O3D1", m68020up },
2219 {"bfffo", 4, two(0166700, 0), two(0177700, 0100000), "/sO2O3D1", m68020up },
2220 {"bfins", 4, two(0167700, 0), two(0177700, 0100000), "D1?sO2O3", m68020up },
2221 {"bfset", 4, two(0167300, 0), two(0177700, 0170000), "?sO2O3", m68020up },
2222 {"bftst", 4, two(0164300, 0), two(0177700, 0170000), "/sO2O3", m68020up },
2224 {"bgnd", 2, one(0045372), one(0177777), "", cpu32 },
2226 {"bitrev", 2, one(0000300), one(0177770), "Ds", mcfisa_aa},
2228 {"bkpt", 2, one(0044110), one(0177770), "ts", m68010up },
2230 {"braw", 2, one(0060000), one(0177777), "BW", m68000up | mcfisa_a },
2231 {"bral", 2, one(0060377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2232 {"bras", 2, one(0060000), one(0177400), "BB", m68000up | mcfisa_a },
2234 {"bset", 2, one(0000700), one(0170700), "Dd$s", m68000up | mcfisa_a },
2235 {"bset", 2, one(0000700), one(0170700), "Ddvs", mcfisa_a },
2236 {"bset", 4, one(0004300), one(0177700), "#b$s", m68000up },
2237 {"bset", 4, one(0004300), one(0177700), "#bqs", mcfisa_a },
2239 {"bsrw", 2, one(0060400), one(0177777), "BW", m68000up | mcfisa_a },
2240 {"bsrl", 2, one(0060777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
2241 {"bsrs", 2, one(0060400), one(0177400), "BB", m68000up | mcfisa_a },
2243 {"btst", 2, one(0000400), one(0170700), "Dd;b", m68000up | mcfisa_a },
2244 {"btst", 4, one(0004000), one(0177700), "#b@s", m68000up },
2245 {"btst", 4, one(0004000), one(0177700), "#bqs", mcfisa_a },
2247 {"byterev", 2, one(0001300), one(0177770), "Ds", mcfisa_aa},
2249 {"callm", 4, one(0003300), one(0177700), "#b!s", m68020 },
2251 {"cas2w", 6, two(0006374,0), two(0177777,0007070), "D3D6D2D5r1r4", m68020up },
2252 {"cas2w", 6, two(0006374,0), two(0177777,0007070), "D3D6D2D5R1R4", m68020up },
2253 {"cas2l", 6, two(0007374,0), two(0177777,0007070), "D3D6D2D5r1r4", m68020up },
2254 {"cas2l", 6, two(0007374,0), two(0177777,0007070), "D3D6D2D5R1R4", m68020up },
2256 {"casb", 4, two(0005300, 0), two(0177700, 0177070), "D3D2~s", m68020up },
2257 {"casw", 4, two(0006300, 0), two(0177700, 0177070), "D3D2~s", m68020up },
2258 {"casl", 4, two(0007300, 0), two(0177700, 0177070), "D3D2~s", m68020up },
2260 {"chk2b", 4, two(0000300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 },
2261 {"chk2w", 4, two(0001300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 },
2262 {"chk2l", 4, two(0002300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 },
2264 {"chkl", 2, one(0040400), one(0170700), ";lDd", m68000up },
2265 {"chkw", 2, one(0040600), one(0170700), ";wDd", m68000up },
2267 #define SCOPE_LINE (0x1 << 3)
2268 #define SCOPE_PAGE (0x2 << 3)
2269 #define SCOPE_ALL (0x3 << 3)
2271 {"cinva", 2, one(0xf400|SCOPE_ALL), one(0xff38), "ce", m68040up },
2272 {"cinvl", 2, one(0xf400|SCOPE_LINE), one(0xff38), "ceas", m68040up },
2273 {"cinvp", 2, one(0xf400|SCOPE_PAGE), one(0xff38), "ceas", m68040up },
2275 {"cpusha", 2, one(0xf420|SCOPE_ALL), one(0xff38), "ce", m68040up },
2276 {"cpushl", 2, one(0xf420|SCOPE_LINE), one(0xff38), "ceas", m68040up | mcfisa_a },
2277 {"cpushp", 2, one(0xf420|SCOPE_PAGE), one(0xff38), "ceas", m68040up },
2279 #undef SCOPE_LINE
2280 #undef SCOPE_PAGE
2281 #undef SCOPE_ALL
2283 {"clrb", 2, one(0041000), one(0177700), "$s", m68000up | mcfisa_a },
2284 {"clrw", 2, one(0041100), one(0177700), "$s", m68000up | mcfisa_a },
2285 {"clrl", 2, one(0041200), one(0177700), "$s", m68000up | mcfisa_a },
2287 {"cmp2b", 4, two(0000300,0), two(0177700,07777), "!sR1", m68020up | cpu32 },
2288 {"cmp2w", 4, two(0001300,0), two(0177700,07777), "!sR1", m68020up | cpu32 },
2289 {"cmp2l", 4, two(0002300,0), two(0177700,07777), "!sR1", m68020up | cpu32 },
2291 {"cmpaw", 2, one(0130300), one(0170700), "*wAd", m68000up },
2292 {"cmpal", 2, one(0130700), one(0170700), "*lAd", m68000up | mcfisa_a },
2294 {"cmpib", 4, one(0006000), one(0177700), "#b@s", m68000up },
2295 {"cmpib", 4, one(0006000), one(0177700), "#bDs", mcfisa_b },
2296 {"cmpiw", 4, one(0006100), one(0177700), "#w@s", m68000up },
2297 {"cmpiw", 4, one(0006100), one(0177700), "#wDs", mcfisa_b },
2298 {"cmpil", 6, one(0006200), one(0177700), "#l@s", m68000up },
2299 {"cmpil", 6, one(0006200), one(0177700), "#lDs", mcfisa_a },
2301 {"cmpmb", 2, one(0130410), one(0170770), "+s+d", m68000up },
2302 {"cmpmw", 2, one(0130510), one(0170770), "+s+d", m68000up },
2303 {"cmpml", 2, one(0130610), one(0170770), "+s+d", m68000up },
2305 /* The cmp opcode can generate the cmpa, cmpm, and cmpi instructions. */
2306 {"cmpb", 4, one(0006000), one(0177700), "#b@s", m68000up },
2307 {"cmpb", 4, one(0006000), one(0177700), "#bDs", mcfisa_b },
2308 {"cmpb", 2, one(0130410), one(0170770), "+s+d", m68000up },
2309 {"cmpb", 2, one(0130000), one(0170700), ";bDd", m68000up },
2310 {"cmpb", 2, one(0130000), one(0170700), "*bDd", mcfisa_b },
2311 {"cmpw", 2, one(0130300), one(0170700), "*wAd", m68000up },
2312 {"cmpw", 4, one(0006100), one(0177700), "#w@s", m68000up },
2313 {"cmpw", 4, one(0006100), one(0177700), "#wDs", mcfisa_b },
2314 {"cmpw", 2, one(0130510), one(0170770), "+s+d", m68000up },
2315 {"cmpw", 2, one(0130100), one(0170700), "*wDd", m68000up | mcfisa_b },
2316 {"cmpl", 2, one(0130700), one(0170700), "*lAd", m68000up | mcfisa_a },
2317 {"cmpl", 6, one(0006200), one(0177700), "#l@s", m68000up },
2318 {"cmpl", 6, one(0006200), one(0177700), "#lDs", mcfisa_a },
2319 {"cmpl", 2, one(0130610), one(0170770), "+s+d", m68000up },
2320 {"cmpl", 2, one(0130200), one(0170700), "*lDd", m68000up | mcfisa_a },
2322 {"dbcc", 2, one(0052310), one(0177770), "DsBw", m68000up },
2323 {"dbcs", 2, one(0052710), one(0177770), "DsBw", m68000up },
2324 {"dbeq", 2, one(0053710), one(0177770), "DsBw", m68000up },
2325 {"dbf", 2, one(0050710), one(0177770), "DsBw", m68000up },
2326 {"dbge", 2, one(0056310), one(0177770), "DsBw", m68000up },
2327 {"dbgt", 2, one(0057310), one(0177770), "DsBw", m68000up },
2328 {"dbhi", 2, one(0051310), one(0177770), "DsBw", m68000up },
2329 {"dble", 2, one(0057710), one(0177770), "DsBw", m68000up },
2330 {"dbls", 2, one(0051710), one(0177770), "DsBw", m68000up },
2331 {"dblt", 2, one(0056710), one(0177770), "DsBw", m68000up },
2332 {"dbmi", 2, one(0055710), one(0177770), "DsBw", m68000up },
2333 {"dbne", 2, one(0053310), one(0177770), "DsBw", m68000up },
2334 {"dbpl", 2, one(0055310), one(0177770), "DsBw", m68000up },
2335 {"dbt", 2, one(0050310), one(0177770), "DsBw", m68000up },
2336 {"dbvc", 2, one(0054310), one(0177770), "DsBw", m68000up },
2337 {"dbvs", 2, one(0054710), one(0177770), "DsBw", m68000up },
2339 {"divsw", 2, one(0100700), one(0170700), ";wDd", m68000up | mcfhwdiv },
2341 {"divsl", 4, two(0046100,0006000),two(0177700,0107770),";lD3D1", m68020up|cpu32 },
2342 {"divsl", 4, two(0046100,0004000),two(0177700,0107770),";lDD", m68020up|cpu32 },
2343 {"divsl", 4, two(0046100,0004000),two(0177700,0107770),"qsDD", mcfhwdiv },
2345 {"divsll", 4, two(0046100,0004000),two(0177700,0107770),";lD3D1",m68020up|cpu32 },
2346 {"divsll", 4, two(0046100,0004000),two(0177700,0107770),";lDD", m68020up|cpu32 },
2348 {"divuw", 2, one(0100300), one(0170700), ";wDd", m68000up | mcfhwdiv },
2350 {"divul", 4, two(0046100,0002000),two(0177700,0107770),";lD3D1", m68020up|cpu32 },
2351 {"divul", 4, two(0046100,0000000),two(0177700,0107770),";lDD", m68020up|cpu32 },
2352 {"divul", 4, two(0046100,0000000),two(0177700,0107770),"qsDD", mcfhwdiv },
2354 {"divull", 4, two(0046100,0000000),two(0177700,0107770),";lD3D1",m68020up|cpu32 },
2355 {"divull", 4, two(0046100,0000000),two(0177700,0107770),";lDD", m68020up|cpu32 },
2357 {"eorib", 4, one(0005000), one(0177700), "#b$s", m68000up },
2358 {"eorib", 4, one(0005074), one(0177777), "#bCs", m68000up },
2359 {"eoriw", 4, one(0005100), one(0177700), "#w$s", m68000up },
2360 {"eoriw", 4, one(0005174), one(0177777), "#wSs", m68000up },
2361 {"eoril", 6, one(0005200), one(0177700), "#l$s", m68000up },
2362 {"eoril", 6, one(0005200), one(0177700), "#lDs", mcfisa_a },
2363 {"eori", 4, one(0005074), one(0177777), "#bCs", m68000up },
2364 {"eori", 4, one(0005174), one(0177777), "#wSs", m68000up },
2365 {"eori", 4, one(0005100), one(0177700), "#w$s", m68000up },
2367 /* The eor opcode can generate the eori instruction. */
2368 {"eorb", 4, one(0005000), one(0177700), "#b$s", m68000up },
2369 {"eorb", 4, one(0005074), one(0177777), "#bCs", m68000up },
2370 {"eorb", 2, one(0130400), one(0170700), "Dd$s", m68000up },
2371 {"eorw", 4, one(0005100), one(0177700), "#w$s", m68000up },
2372 {"eorw", 4, one(0005174), one(0177777), "#wSs", m68000up },
2373 {"eorw", 2, one(0130500), one(0170700), "Dd$s", m68000up },
2374 {"eorl", 6, one(0005200), one(0177700), "#l$s", m68000up },
2375 {"eorl", 6, one(0005200), one(0177700), "#lDs", mcfisa_a },
2376 {"eorl", 2, one(0130600), one(0170700), "Dd$s", m68000up | mcfisa_a },
2377 {"eor", 4, one(0005074), one(0177777), "#bCs", m68000up },
2378 {"eor", 4, one(0005174), one(0177777), "#wSs", m68000up },
2379 {"eor", 4, one(0005100), one(0177700), "#w$s", m68000up },
2380 {"eor", 2, one(0130500), one(0170700), "Dd$s", m68000up },
2382 {"exg", 2, one(0140500), one(0170770), "DdDs", m68000up },
2383 {"exg", 2, one(0140510), one(0170770), "AdAs", m68000up },
2384 {"exg", 2, one(0140610), one(0170770), "DdAs", m68000up },
2385 {"exg", 2, one(0140610), one(0170770), "AsDd", m68000up },
2387 {"extw", 2, one(0044200), one(0177770), "Ds", m68000up|mcfisa_a },
2388 {"extl", 2, one(0044300), one(0177770), "Ds", m68000up|mcfisa_a },
2389 {"extbl", 2, one(0044700), one(0177770), "Ds", m68020up|cpu32|mcfisa_a },
2391 {"ff1", 2, one(0002300), one(0177770), "Ds", mcfisa_aa},
2393 /* float stuff starts here */
2395 {"fabsb", 4, two(0xF000, 0x5818), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2396 {"fabsb", 4, two(0xF000, 0x5818), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2397 {"fabsd", 4, two(0xF000, 0x0018), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2398 {"fabsd", 4, two(0xF000, 0x0018), two(0xF1C0, 0xE07F), "IiFt", cfloat },
2399 {"fabsd", 4, two(0xF000, 0x5418), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2400 {"fabsd", 4, two(0xF000, 0x5418), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2401 {"fabsl", 4, two(0xF000, 0x4018), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2402 {"fabsl", 4, two(0xF000, 0x4018), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2403 {"fabsp", 4, two(0xF000, 0x4C18), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2404 {"fabss", 4, two(0xF000, 0x4418), two(0xF1C0, 0xFC7F), "Ii;fF7", cfloat },
2405 {"fabss", 4, two(0xF000, 0x4418), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2406 {"fabsw", 4, two(0xF000, 0x5018), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2407 {"fabsw", 4, two(0xF000, 0x5018), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2408 {"fabsx", 4, two(0xF000, 0x0018), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2409 {"fabsx", 4, two(0xF000, 0x4818), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2410 {"fabsx", 4, two(0xF000, 0x0018), two(0xF1C0, 0xE07F), "IiFt", mfloat },
2412 {"fsabsb", 4, two(0xF000, 0x5858), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
2413 {"fsabsb", 4, two(0xF000, 0x5858), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2414 {"fsabsd", 4, two(0xF000, 0x0058), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2415 {"fsabsd", 4, two(0xF000, 0x0058), two(0xF1C0, 0xE07F), "IiFt", cfloat },
2416 {"fsabsd", 4, two(0xF000, 0x5458), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
2417 {"fsabsd", 4, two(0xF000, 0x5458), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2418 {"fsabsl", 4, two(0xF000, 0x4058), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
2419 {"fsabsl", 4, two(0xF000, 0x4058), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2420 {"fsabsp", 4, two(0xF000, 0x4C58), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
2421 {"fsabss", 4, two(0xF000, 0x4258), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2422 {"fsabss", 4, two(0xF000, 0x4458), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
2423 {"fsabsw", 4, two(0xF000, 0x5058), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
2424 {"fsabsw", 4, two(0xF000, 0x5058), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2425 {"fsabsx", 4, two(0xF000, 0x0058), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
2426 {"fsabsx", 4, two(0xF000, 0x4858), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
2427 {"fsabsx", 4, two(0xF000, 0x0058), two(0xF1C0, 0xE07F), "IiFt", m68040up },
2429 {"fdabsb", 4, two(0xF000, 0x585C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2430 {"fdabsb", 4, two(0xF000, 0x585c), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up},
2431 {"fdabsd", 4, two(0xF000, 0x005C), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2432 {"fdabsd", 4, two(0xF000, 0x005C), two(0xF1C0, 0xE07F), "IiFt", cfloat },
2433 {"fdabsd", 4, two(0xF000, 0x545C), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2434 {"fdabsd", 4, two(0xF000, 0x545c), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up},
2435 {"fdabsl", 4, two(0xF000, 0x405C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2436 {"fdabsl", 4, two(0xF000, 0x405c), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up},
2437 {"fdabsp", 4, two(0xF000, 0x4C5c), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up},
2438 {"fdabss", 4, two(0xF000, 0x425C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2439 {"fdabss", 4, two(0xF000, 0x445c), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up},
2440 {"fdabsw", 4, two(0xF000, 0x505C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2441 {"fdabsw", 4, two(0xF000, 0x505c), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up},
2442 {"fdabsx", 4, two(0xF000, 0x005c), two(0xF1C0, 0xE07F), "IiF8F7", m68040up},
2443 {"fdabsx", 4, two(0xF000, 0x485c), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up},
2444 {"fdabsx", 4, two(0xF000, 0x005c), two(0xF1C0, 0xE07F), "IiFt", m68040up},
2446 {"facosb", 4, two(0xF000, 0x581C), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2447 {"facosd", 4, two(0xF000, 0x541C), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2448 {"facosl", 4, two(0xF000, 0x401C), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2449 {"facosp", 4, two(0xF000, 0x4C1C), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2450 {"facoss", 4, two(0xF000, 0x441C), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2451 {"facosw", 4, two(0xF000, 0x501C), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2452 {"facosx", 4, two(0xF000, 0x001C), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2453 {"facosx", 4, two(0xF000, 0x481C), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2454 {"facosx", 4, two(0xF000, 0x001C), two(0xF1C0, 0xE07F), "IiFt", mfloat },
2456 {"faddb", 4, two(0xF000, 0x5822), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2457 {"faddb", 4, two(0xF000, 0x5822), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2458 {"faddd", 4, two(0xF000, 0x0022), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2459 {"faddd", 4, two(0xF000, 0x5422), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2460 {"faddd", 4, two(0xF000, 0x5422), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2461 {"faddd", 4, two(0xF000, 0x5422), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2462 {"faddl", 4, two(0xF000, 0x4022), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2463 {"faddl", 4, two(0xF000, 0x4022), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2464 {"faddp", 4, two(0xF000, 0x4C22), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2465 {"fadds", 4, two(0xF000, 0x4422), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2466 {"fadds", 4, two(0xF000, 0x4422), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2467 {"faddw", 4, two(0xF000, 0x5022), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2468 {"faddw", 4, two(0xF000, 0x5022), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2469 {"faddx", 4, two(0xF000, 0x0022), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2470 {"faddx", 4, two(0xF000, 0x4822), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2472 {"fsaddb", 4, two(0xF000, 0x5862), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
2473 {"fsaddb", 4, two(0xF000, 0x5862), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2474 {"fsaddd", 4, two(0xF000, 0x0066), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2475 {"fsaddd", 4, two(0xF000, 0x5462), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
2476 {"fsaddd", 4, two(0xF000, 0x5462), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2477 {"fsaddl", 4, two(0xF000, 0x4062), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
2478 {"fsaddl", 4, two(0xF000, 0x4062), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2479 {"fsaddp", 4, two(0xF000, 0x4C62), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
2480 {"fsadds", 4, two(0xF000, 0x4462), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
2481 {"fsadds", 4, two(0xF000, 0x4862), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2482 {"fsaddw", 4, two(0xF000, 0x5062), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
2483 {"fsaddw", 4, two(0xF000, 0x5062), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2484 {"fsaddx", 4, two(0xF000, 0x0062), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
2485 {"fsaddx", 4, two(0xF000, 0x4862), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
2487 {"fdaddb", 4, two(0xF000, 0x5826), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2488 {"fdaddb", 4, two(0xF000, 0x5866), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
2489 {"fdaddd", 4, two(0xF000, 0x0066), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2490 {"fdaddd", 4, two(0xF000, 0x5426), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2491 {"fdaddd", 4, two(0xF000, 0x5466), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
2492 {"fdaddl", 4, two(0xF000, 0x4026), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2493 {"fdaddl", 4, two(0xF000, 0x4066), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
2494 {"fdaddp", 4, two(0xF000, 0x4C66), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
2495 {"fdadds", 4, two(0xF000, 0x4466), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
2496 {"fdadds", 4, two(0xF000, 0x4826), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2497 {"fdaddw", 4, two(0xF000, 0x5026), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2498 {"fdaddw", 4, two(0xF000, 0x5066), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
2499 {"fdaddx", 4, two(0xF000, 0x0066), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
2500 {"fdaddx", 4, two(0xF000, 0x4866), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
2502 {"fasinb", 4, two(0xF000, 0x580C), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2503 {"fasind", 4, two(0xF000, 0x540C), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2504 {"fasinl", 4, two(0xF000, 0x400C), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2505 {"fasinp", 4, two(0xF000, 0x4C0C), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2506 {"fasins", 4, two(0xF000, 0x440C), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2507 {"fasinw", 4, two(0xF000, 0x500C), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2508 {"fasinx", 4, two(0xF000, 0x000C), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2509 {"fasinx", 4, two(0xF000, 0x480C), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2510 {"fasinx", 4, two(0xF000, 0x000C), two(0xF1C0, 0xE07F), "IiFt", mfloat },
2512 {"fatanb", 4, two(0xF000, 0x580A), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2513 {"fatand", 4, two(0xF000, 0x540A), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2514 {"fatanl", 4, two(0xF000, 0x400A), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2515 {"fatanp", 4, two(0xF000, 0x4C0A), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2516 {"fatans", 4, two(0xF000, 0x440A), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2517 {"fatanw", 4, two(0xF000, 0x500A), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2518 {"fatanx", 4, two(0xF000, 0x000A), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2519 {"fatanx", 4, two(0xF000, 0x480A), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2520 {"fatanx", 4, two(0xF000, 0x000A), two(0xF1C0, 0xE07F), "IiFt", mfloat },
2522 {"fatanhb", 4, two(0xF000, 0x580D), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2523 {"fatanhd", 4, two(0xF000, 0x540D), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2524 {"fatanhl", 4, two(0xF000, 0x400D), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2525 {"fatanhp", 4, two(0xF000, 0x4C0D), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2526 {"fatanhs", 4, two(0xF000, 0x440D), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2527 {"fatanhw", 4, two(0xF000, 0x500D), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2528 {"fatanhx", 4, two(0xF000, 0x000D), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2529 {"fatanhx", 4, two(0xF000, 0x480D), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2530 {"fatanhx", 4, two(0xF000, 0x000D), two(0xF1C0, 0xE07F), "IiFt", mfloat },
2532 {"fbeq", 2, one(0xF081), one(0xF1FF), "IdBW", mfloat | cfloat },
2533 {"fbf", 2, one(0xF080), one(0xF1FF), "IdBW", mfloat | cfloat },
2534 {"fbge", 2, one(0xF093), one(0xF1FF), "IdBW", mfloat | cfloat },
2535 {"fbgl", 2, one(0xF096), one(0xF1FF), "IdBW", mfloat | cfloat },
2536 {"fbgle", 2, one(0xF097), one(0xF1FF), "IdBW", mfloat | cfloat },
2537 {"fbgt", 2, one(0xF092), one(0xF1FF), "IdBW", mfloat | cfloat },
2538 {"fble", 2, one(0xF095), one(0xF1FF), "IdBW", mfloat | cfloat },
2539 {"fblt", 2, one(0xF094), one(0xF1FF), "IdBW", mfloat | cfloat },
2540 {"fbne", 2, one(0xF08E), one(0xF1FF), "IdBW", mfloat | cfloat },
2541 {"fbnge", 2, one(0xF09C), one(0xF1FF), "IdBW", mfloat | cfloat },
2542 {"fbngl", 2, one(0xF099), one(0xF1FF), "IdBW", mfloat | cfloat },
2543 {"fbngle", 2, one(0xF098), one(0xF1FF), "IdBW", mfloat | cfloat },
2544 {"fbngt", 2, one(0xF09D), one(0xF1FF), "IdBW", mfloat | cfloat },
2545 {"fbnle", 2, one(0xF09A), one(0xF1FF), "IdBW", mfloat | cfloat },
2546 {"fbnlt", 2, one(0xF09B), one(0xF1FF), "IdBW", mfloat | cfloat },
2547 {"fboge", 2, one(0xF083), one(0xF1FF), "IdBW", mfloat | cfloat },
2548 {"fbogl", 2, one(0xF086), one(0xF1FF), "IdBW", mfloat | cfloat },
2549 {"fbogt", 2, one(0xF082), one(0xF1FF), "IdBW", mfloat | cfloat },
2550 {"fbole", 2, one(0xF085), one(0xF1FF), "IdBW", mfloat | cfloat },
2551 {"fbolt", 2, one(0xF084), one(0xF1FF), "IdBW", mfloat | cfloat },
2552 {"fbor", 2, one(0xF087), one(0xF1FF), "IdBW", mfloat | cfloat },
2553 {"fbseq", 2, one(0xF091), one(0xF1FF), "IdBW", mfloat | cfloat },
2554 {"fbsf", 2, one(0xF090), one(0xF1FF), "IdBW", mfloat | cfloat },
2555 {"fbsne", 2, one(0xF09E), one(0xF1FF), "IdBW", mfloat | cfloat },
2556 {"fbst", 2, one(0xF09F), one(0xF1FF), "IdBW", mfloat | cfloat },
2557 {"fbt", 2, one(0xF08F), one(0xF1FF), "IdBW", mfloat | cfloat },
2558 {"fbueq", 2, one(0xF089), one(0xF1FF), "IdBW", mfloat | cfloat },
2559 {"fbuge", 2, one(0xF08B), one(0xF1FF), "IdBW", mfloat | cfloat },
2560 {"fbugt", 2, one(0xF08A), one(0xF1FF), "IdBW", mfloat | cfloat },
2561 {"fbule", 2, one(0xF08D), one(0xF1FF), "IdBW", mfloat | cfloat },
2562 {"fbult", 2, one(0xF08C), one(0xF1FF), "IdBW", mfloat | cfloat },
2563 {"fbun", 2, one(0xF088), one(0xF1FF), "IdBW", mfloat | cfloat },
2565 {"fbeql", 2, one(0xF0C1), one(0xF1FF), "IdBC", mfloat | cfloat },
2566 {"fbfl", 2, one(0xF0C0), one(0xF1FF), "IdBC", mfloat | cfloat },
2567 {"fbgel", 2, one(0xF0D3), one(0xF1FF), "IdBC", mfloat | cfloat },
2568 {"fbgll", 2, one(0xF0D6), one(0xF1FF), "IdBC", mfloat | cfloat },
2569 {"fbglel", 2, one(0xF0D7), one(0xF1FF), "IdBC", mfloat | cfloat },
2570 {"fbgtl", 2, one(0xF0D2), one(0xF1FF), "IdBC", mfloat | cfloat },
2571 {"fblel", 2, one(0xF0D5), one(0xF1FF), "IdBC", mfloat | cfloat },
2572 {"fbltl", 2, one(0xF0D4), one(0xF1FF), "IdBC", mfloat | cfloat },
2573 {"fbnel", 2, one(0xF0CE), one(0xF1FF), "IdBC", mfloat | cfloat },
2574 {"fbngel", 2, one(0xF0DC), one(0xF1FF), "IdBC", mfloat | cfloat },
2575 {"fbngll", 2, one(0xF0D9), one(0xF1FF), "IdBC", mfloat | cfloat },
2576 {"fbnglel", 2, one(0xF0D8), one(0xF1FF), "IdBC", mfloat | cfloat },
2577 {"fbngtl", 2, one(0xF0DD), one(0xF1FF), "IdBC", mfloat | cfloat },
2578 {"fbnlel", 2, one(0xF0DA), one(0xF1FF), "IdBC", mfloat | cfloat },
2579 {"fbnltl", 2, one(0xF0DB), one(0xF1FF), "IdBC", mfloat | cfloat },
2580 {"fbogel", 2, one(0xF0C3), one(0xF1FF), "IdBC", mfloat | cfloat },
2581 {"fbogll", 2, one(0xF0C6), one(0xF1FF), "IdBC", mfloat | cfloat },
2582 {"fbogtl", 2, one(0xF0C2), one(0xF1FF), "IdBC", mfloat | cfloat },
2583 {"fbolel", 2, one(0xF0C5), one(0xF1FF), "IdBC", mfloat | cfloat },
2584 {"fboltl", 2, one(0xF0C4), one(0xF1FF), "IdBC", mfloat | cfloat },
2585 {"fborl", 2, one(0xF0C7), one(0xF1FF), "IdBC", mfloat | cfloat },
2586 {"fbseql", 2, one(0xF0D1), one(0xF1FF), "IdBC", mfloat | cfloat },
2587 {"fbsfl", 2, one(0xF0D0), one(0xF1FF), "IdBC", mfloat | cfloat },
2588 {"fbsnel", 2, one(0xF0DE), one(0xF1FF), "IdBC", mfloat | cfloat },
2589 {"fbstl", 2, one(0xF0DF), one(0xF1FF), "IdBC", mfloat | cfloat },
2590 {"fbtl", 2, one(0xF0CF), one(0xF1FF), "IdBC", mfloat | cfloat },
2591 {"fbueql", 2, one(0xF0C9), one(0xF1FF), "IdBC", mfloat | cfloat },
2592 {"fbugel", 2, one(0xF0CB), one(0xF1FF), "IdBC", mfloat | cfloat },
2593 {"fbugtl", 2, one(0xF0CA), one(0xF1FF), "IdBC", mfloat | cfloat },
2594 {"fbulel", 2, one(0xF0CD), one(0xF1FF), "IdBC", mfloat | cfloat },
2595 {"fbultl", 2, one(0xF0CC), one(0xF1FF), "IdBC", mfloat | cfloat },
2596 {"fbunl", 2, one(0xF0C8), one(0xF1FF), "IdBC", mfloat | cfloat },
2598 {"fjeq", 2, one(0xF081), one(0xF1BF), "IdBc", mfloat | cfloat },
2599 {"fjf", 2, one(0xF080), one(0xF1BF), "IdBc", mfloat | cfloat },
2600 {"fjge", 2, one(0xF093), one(0xF1BF), "IdBc", mfloat | cfloat },
2601 {"fjgl", 2, one(0xF096), one(0xF1BF), "IdBc", mfloat | cfloat },
2602 {"fjgle", 2, one(0xF097), one(0xF1BF), "IdBc", mfloat | cfloat },
2603 {"fjgt", 2, one(0xF092), one(0xF1BF), "IdBc", mfloat | cfloat },
2604 {"fjle", 2, one(0xF095), one(0xF1BF), "IdBc", mfloat | cfloat },
2605 {"fjlt", 2, one(0xF094), one(0xF1BF), "IdBc", mfloat | cfloat },
2606 {"fjne", 2, one(0xF08E), one(0xF1BF), "IdBc", mfloat | cfloat },
2607 {"fjnge", 2, one(0xF09C), one(0xF1BF), "IdBc", mfloat | cfloat },
2608 {"fjngl", 2, one(0xF099), one(0xF1BF), "IdBc", mfloat | cfloat },
2609 {"fjngle", 2, one(0xF098), one(0xF1BF), "IdBc", mfloat | cfloat },
2610 {"fjngt", 2, one(0xF09D), one(0xF1BF), "IdBc", mfloat | cfloat },
2611 {"fjnle", 2, one(0xF09A), one(0xF1BF), "IdBc", mfloat | cfloat },
2612 {"fjnlt", 2, one(0xF09B), one(0xF1BF), "IdBc", mfloat | cfloat },
2613 {"fjoge", 2, one(0xF083), one(0xF1BF), "IdBc", mfloat | cfloat },
2614 {"fjogl", 2, one(0xF086), one(0xF1BF), "IdBc", mfloat | cfloat },
2615 {"fjogt", 2, one(0xF082), one(0xF1BF), "IdBc", mfloat | cfloat },
2616 {"fjole", 2, one(0xF085), one(0xF1BF), "IdBc", mfloat | cfloat },
2617 {"fjolt", 2, one(0xF084), one(0xF1BF), "IdBc", mfloat | cfloat },
2618 {"fjor", 2, one(0xF087), one(0xF1BF), "IdBc", mfloat | cfloat },
2619 {"fjseq", 2, one(0xF091), one(0xF1BF), "IdBc", mfloat | cfloat },
2620 {"fjsf", 2, one(0xF090), one(0xF1BF), "IdBc", mfloat | cfloat },
2621 {"fjsne", 2, one(0xF09E), one(0xF1BF), "IdBc", mfloat | cfloat },
2622 {"fjst", 2, one(0xF09F), one(0xF1BF), "IdBc", mfloat | cfloat },
2623 {"fjt", 2, one(0xF08F), one(0xF1BF), "IdBc", mfloat | cfloat },
2624 {"fjueq", 2, one(0xF089), one(0xF1BF), "IdBc", mfloat | cfloat },
2625 {"fjuge", 2, one(0xF08B), one(0xF1BF), "IdBc", mfloat | cfloat },
2626 {"fjugt", 2, one(0xF08A), one(0xF1BF), "IdBc", mfloat | cfloat },
2627 {"fjule", 2, one(0xF08D), one(0xF1BF), "IdBc", mfloat | cfloat },
2628 {"fjult", 2, one(0xF08C), one(0xF1BF), "IdBc", mfloat | cfloat },
2629 {"fjun", 2, one(0xF088), one(0xF1BF), "IdBc", mfloat | cfloat },
2631 {"fcmpb", 4, two(0xF000, 0x5838), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2632 {"fcmpb", 4, two(0xF000, 0x5838), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2633 {"fcmpd", 4, two(0xF000, 0x5438), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2634 {"fcmpd", 4, two(0xF000, 0x5438), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2635 {"fcmpd", 4, two(0xF000, 0x0038), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2636 {"fcmpl", 4, two(0xF000, 0x4038), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2637 {"fcmpl", 4, two(0xF000, 0x4038), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2638 {"fcmpp", 4, two(0xF000, 0x4C38), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2639 {"fcmps", 4, two(0xF000, 0x4438), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2640 {"fcmps", 4, two(0xF000, 0x4438), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2641 {"fcmpw", 4, two(0xF000, 0x5038), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2642 {"fcmpw", 4, two(0xF000, 0x5038), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2643 {"fcmpx", 4, two(0xF000, 0x0038), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2644 {"fcmpx", 4, two(0xF000, 0x4838), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2646 {"fcosb", 4, two(0xF000, 0x581D), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2647 {"fcosd", 4, two(0xF000, 0x541D), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2648 {"fcosl", 4, two(0xF000, 0x401D), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2649 {"fcosp", 4, two(0xF000, 0x4C1D), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2650 {"fcoss", 4, two(0xF000, 0x441D), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2651 {"fcosw", 4, two(0xF000, 0x501D), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2652 {"fcosx", 4, two(0xF000, 0x001D), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2653 {"fcosx", 4, two(0xF000, 0x481D), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2654 {"fcosx", 4, two(0xF000, 0x001D), two(0xF1C0, 0xE07F), "IiFt", mfloat },
2656 {"fcoshb", 4, two(0xF000, 0x5819), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2657 {"fcoshd", 4, two(0xF000, 0x5419), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2658 {"fcoshl", 4, two(0xF000, 0x4019), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2659 {"fcoshp", 4, two(0xF000, 0x4C19), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2660 {"fcoshs", 4, two(0xF000, 0x4419), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2661 {"fcoshw", 4, two(0xF000, 0x5019), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2662 {"fcoshx", 4, two(0xF000, 0x0019), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2663 {"fcoshx", 4, two(0xF000, 0x4819), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2664 {"fcoshx", 4, two(0xF000, 0x0019), two(0xF1C0, 0xE07F), "IiFt", mfloat },
2666 {"fdbeq", 4, two(0xF048, 0x0001), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2667 {"fdbf", 4, two(0xF048, 0x0000), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2668 {"fdbge", 4, two(0xF048, 0x0013), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2669 {"fdbgl", 4, two(0xF048, 0x0016), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2670 {"fdbgle", 4, two(0xF048, 0x0017), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2671 {"fdbgt", 4, two(0xF048, 0x0012), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2672 {"fdble", 4, two(0xF048, 0x0015), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2673 {"fdblt", 4, two(0xF048, 0x0014), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2674 {"fdbne", 4, two(0xF048, 0x000E), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2675 {"fdbnge", 4, two(0xF048, 0x001C), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2676 {"fdbngl", 4, two(0xF048, 0x0019), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2677 {"fdbngle", 4, two(0xF048, 0x0018), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2678 {"fdbngt", 4, two(0xF048, 0x001D), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2679 {"fdbnle", 4, two(0xF048, 0x001A), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2680 {"fdbnlt", 4, two(0xF048, 0x001B), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2681 {"fdboge", 4, two(0xF048, 0x0003), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2682 {"fdbogl", 4, two(0xF048, 0x0006), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2683 {"fdbogt", 4, two(0xF048, 0x0002), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2684 {"fdbole", 4, two(0xF048, 0x0005), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2685 {"fdbolt", 4, two(0xF048, 0x0004), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2686 {"fdbor", 4, two(0xF048, 0x0007), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2687 {"fdbseq", 4, two(0xF048, 0x0011), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2688 {"fdbsf", 4, two(0xF048, 0x0010), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2689 {"fdbsne", 4, two(0xF048, 0x001E), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2690 {"fdbst", 4, two(0xF048, 0x001F), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2691 {"fdbt", 4, two(0xF048, 0x000F), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2692 {"fdbueq", 4, two(0xF048, 0x0009), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2693 {"fdbuge", 4, two(0xF048, 0x000B), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2694 {"fdbugt", 4, two(0xF048, 0x000A), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2695 {"fdbule", 4, two(0xF048, 0x000D), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2696 {"fdbult", 4, two(0xF048, 0x000C), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2697 {"fdbun", 4, two(0xF048, 0x0008), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat },
2699 {"fdivb", 4, two(0xF000, 0x5820), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2700 {"fdivb", 4, two(0xF000, 0x5820), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2701 {"fdivd", 4, two(0xF000, 0x0020), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2702 {"fdivd", 4, two(0xF000, 0x5420), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2703 {"fdivd", 4, two(0xF000, 0x5420), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2704 {"fdivl", 4, two(0xF000, 0x4020), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2705 {"fdivl", 4, two(0xF000, 0x4020), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2706 {"fdivp", 4, two(0xF000, 0x4C20), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2707 {"fdivs", 4, two(0xF000, 0x4420), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2708 {"fdivs", 4, two(0xF000, 0x4420), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2709 {"fdivw", 4, two(0xF000, 0x5020), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2710 {"fdivw", 4, two(0xF000, 0x5020), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2711 {"fdivx", 4, two(0xF000, 0x0020), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2712 {"fdivx", 4, two(0xF000, 0x4820), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2714 {"fsdivb", 4, two(0xF000, 0x5860), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
2715 {"fsdivb", 4, two(0xF000, 0x5860), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2716 {"fsdivd", 4, two(0xF000, 0x0060), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2717 {"fsdivd", 4, two(0xF000, 0x5460), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
2718 {"fsdivd", 4, two(0xF000, 0x5460), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2719 {"fsdivl", 4, two(0xF000, 0x4060), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
2720 {"fsdivl", 4, two(0xF000, 0x4060), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2721 {"fsdivp", 4, two(0xF000, 0x4C60), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
2722 {"fsdivs", 4, two(0xF000, 0x4460), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
2723 {"fsdivs", 4, two(0xF000, 0x4460), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2724 {"fsdivw", 4, two(0xF000, 0x5060), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
2725 {"fsdivw", 4, two(0xF000, 0x5060), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2726 {"fsdivx", 4, two(0xF000, 0x0060), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
2727 {"fsdivx", 4, two(0xF000, 0x4860), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
2729 {"fddivb", 4, two(0xF000, 0x5864), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
2730 {"fddivb", 4, two(0xF000, 0x5864), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2731 {"fddivd", 4, two(0xF000, 0x0064), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2732 {"fddivd", 4, two(0xF000, 0x5464), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
2733 {"fddivd", 4, two(0xF000, 0x5464), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2734 {"fddivl", 4, two(0xF000, 0x4064), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
2735 {"fddivl", 4, two(0xF000, 0x4064), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2736 {"fddivp", 4, two(0xF000, 0x4C64), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
2737 {"fddivs", 4, two(0xF000, 0x4464), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
2738 {"fddivs", 4, two(0xF000, 0x4464), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2739 {"fddivw", 4, two(0xF000, 0x5064), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
2740 {"fddivw", 4, two(0xF000, 0x5064), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2741 {"fddivx", 4, two(0xF000, 0x0064), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
2742 {"fddivx", 4, two(0xF000, 0x4864), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
2744 {"fetoxb", 4, two(0xF000, 0x5810), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2745 {"fetoxd", 4, two(0xF000, 0x5410), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2746 {"fetoxl", 4, two(0xF000, 0x4010), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2747 {"fetoxp", 4, two(0xF000, 0x4C10), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2748 {"fetoxs", 4, two(0xF000, 0x4410), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2749 {"fetoxw", 4, two(0xF000, 0x5010), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2750 {"fetoxx", 4, two(0xF000, 0x0010), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2751 {"fetoxx", 4, two(0xF000, 0x4810), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2752 {"fetoxx", 4, two(0xF000, 0x0010), two(0xF1C0, 0xE07F), "IiFt", mfloat },
2754 {"fetoxm1b", 4, two(0xF000, 0x5808), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2755 {"fetoxm1d", 4, two(0xF000, 0x5408), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2756 {"fetoxm1l", 4, two(0xF000, 0x4008), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2757 {"fetoxm1p", 4, two(0xF000, 0x4C08), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2758 {"fetoxm1s", 4, two(0xF000, 0x4408), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2759 {"fetoxm1w", 4, two(0xF000, 0x5008), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2760 {"fetoxm1x", 4, two(0xF000, 0x0008), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2761 {"fetoxm1x", 4, two(0xF000, 0x4808), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2762 {"fetoxm1x", 4, two(0xF000, 0x0008), two(0xF1C0, 0xE07F), "IiFt", mfloat },
2764 {"fgetexpb", 4, two(0xF000, 0x581E), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2765 {"fgetexpd", 4, two(0xF000, 0x541E), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2766 {"fgetexpl", 4, two(0xF000, 0x401E), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2767 {"fgetexpp", 4, two(0xF000, 0x4C1E), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2768 {"fgetexps", 4, two(0xF000, 0x441E), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2769 {"fgetexpw", 4, two(0xF000, 0x501E), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2770 {"fgetexpx", 4, two(0xF000, 0x001E), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2771 {"fgetexpx", 4, two(0xF000, 0x481E), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2772 {"fgetexpx", 4, two(0xF000, 0x001E), two(0xF1C0, 0xE07F), "IiFt", mfloat },
2774 {"fgetmanb", 4, two(0xF000, 0x581F), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2775 {"fgetmand", 4, two(0xF000, 0x541F), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2776 {"fgetmanl", 4, two(0xF000, 0x401F), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2777 {"fgetmanp", 4, two(0xF000, 0x4C1F), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2778 {"fgetmans", 4, two(0xF000, 0x441F), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2779 {"fgetmanw", 4, two(0xF000, 0x501F), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2780 {"fgetmanx", 4, two(0xF000, 0x001F), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2781 {"fgetmanx", 4, two(0xF000, 0x481F), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2782 {"fgetmanx", 4, two(0xF000, 0x001F), two(0xF1C0, 0xE07F), "IiFt", mfloat },
2784 {"fintb", 4, two(0xF000, 0x5801), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2785 {"fintb", 4, two(0xF000, 0x5801), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2786 {"fintd", 4, two(0xF000, 0x0001), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2787 {"fintd", 4, two(0xF000, 0x0001), two(0xF1C0, 0xE07F), "IiFt", cfloat },
2788 {"fintd", 4, two(0xF000, 0x5401), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2789 {"fintd", 4, two(0xF000, 0x5401), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2790 {"fintl", 4, two(0xF000, 0x4001), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2791 {"fintl", 4, two(0xF000, 0x4001), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2792 {"fintp", 4, two(0xF000, 0x4C01), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2793 {"fints", 4, two(0xF000, 0x4401), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2794 {"fints", 4, two(0xF000, 0x4401), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2795 {"fintw", 4, two(0xF000, 0x5001), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2796 {"fintw", 4, two(0xF000, 0x5001), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2797 {"fintx", 4, two(0xF000, 0x0001), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2798 {"fintx", 4, two(0xF000, 0x4801), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2799 {"fintx", 4, two(0xF000, 0x0001), two(0xF1C0, 0xE07F), "IiFt", mfloat },
2801 {"fintrzb", 4, two(0xF000, 0x5803), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2802 {"fintrzb", 4, two(0xF000, 0x5803), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2803 {"fintrzd", 4, two(0xF000, 0x0003), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2804 {"fintrzd", 4, two(0xF000, 0x0003), two(0xF1C0, 0xE07F), "IiFt", cfloat },
2805 {"fintrzd", 4, two(0xF000, 0x5403), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2806 {"fintrzd", 4, two(0xF000, 0x5403), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2807 {"fintrzl", 4, two(0xF000, 0x4003), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2808 {"fintrzl", 4, two(0xF000, 0x4003), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2809 {"fintrzp", 4, two(0xF000, 0x4C03), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2810 {"fintrzs", 4, two(0xF000, 0x4403), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2811 {"fintrzs", 4, two(0xF000, 0x4403), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2812 {"fintrzw", 4, two(0xF000, 0x5003), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2813 {"fintrzw", 4, two(0xF000, 0x5003), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2814 {"fintrzx", 4, two(0xF000, 0x0003), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2815 {"fintrzx", 4, two(0xF000, 0x4803), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2816 {"fintrzx", 4, two(0xF000, 0x0003), two(0xF1C0, 0xE07F), "IiFt", mfloat },
2818 {"flog10b", 4, two(0xF000, 0x5815), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2819 {"flog10d", 4, two(0xF000, 0x5415), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2820 {"flog10l", 4, two(0xF000, 0x4015), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2821 {"flog10p", 4, two(0xF000, 0x4C15), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2822 {"flog10s", 4, two(0xF000, 0x4415), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2823 {"flog10w", 4, two(0xF000, 0x5015), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2824 {"flog10x", 4, two(0xF000, 0x0015), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2825 {"flog10x", 4, two(0xF000, 0x4815), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2826 {"flog10x", 4, two(0xF000, 0x0015), two(0xF1C0, 0xE07F), "IiFt", mfloat },
2828 {"flog2b", 4, two(0xF000, 0x5816), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2829 {"flog2d", 4, two(0xF000, 0x5416), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2830 {"flog2l", 4, two(0xF000, 0x4016), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2831 {"flog2p", 4, two(0xF000, 0x4C16), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2832 {"flog2s", 4, two(0xF000, 0x4416), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2833 {"flog2w", 4, two(0xF000, 0x5016), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2834 {"flog2x", 4, two(0xF000, 0x0016), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2835 {"flog2x", 4, two(0xF000, 0x4816), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2836 {"flog2x", 4, two(0xF000, 0x0016), two(0xF1C0, 0xE07F), "IiFt", mfloat },
2838 {"flognb", 4, two(0xF000, 0x5814), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2839 {"flognd", 4, two(0xF000, 0x5414), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2840 {"flognl", 4, two(0xF000, 0x4014), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2841 {"flognp", 4, two(0xF000, 0x4C14), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2842 {"flogns", 4, two(0xF000, 0x4414), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2843 {"flognw", 4, two(0xF000, 0x5014), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2844 {"flognx", 4, two(0xF000, 0x0014), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2845 {"flognx", 4, two(0xF000, 0x4814), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2846 {"flognx", 4, two(0xF000, 0x0014), two(0xF1C0, 0xE07F), "IiFt", mfloat },
2848 {"flognp1b", 4, two(0xF000, 0x5806), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2849 {"flognp1d", 4, two(0xF000, 0x5406), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2850 {"flognp1l", 4, two(0xF000, 0x4006), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2851 {"flognp1p", 4, two(0xF000, 0x4C06), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2852 {"flognp1s", 4, two(0xF000, 0x4406), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2853 {"flognp1w", 4, two(0xF000, 0x5006), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2854 {"flognp1x", 4, two(0xF000, 0x0006), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2855 {"flognp1x", 4, two(0xF000, 0x4806), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2856 {"flognp1x", 4, two(0xF000, 0x0006), two(0xF1C0, 0xE07F), "IiFt", mfloat },
2858 {"fmodb", 4, two(0xF000, 0x5821), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2859 {"fmodd", 4, two(0xF000, 0x5421), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2860 {"fmodl", 4, two(0xF000, 0x4021), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2861 {"fmodp", 4, two(0xF000, 0x4C21), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2862 {"fmods", 4, two(0xF000, 0x4421), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2863 {"fmodw", 4, two(0xF000, 0x5021), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2864 {"fmodx", 4, two(0xF000, 0x0021), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
2865 {"fmodx", 4, two(0xF000, 0x4821), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2867 {"fmoveb", 4, two(0xF000, 0x5800), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2868 {"fmoveb", 4, two(0xF000, 0x7800), two(0xF1C0, 0xFC7F), "IiF7bs", cfloat },
2869 {"fmoveb", 4, two(0xF000, 0x5800), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2870 {"fmoveb", 4, two(0xF000, 0x7800), two(0xF1C0, 0xFC7F), "IiF7$b", mfloat },
2871 {"fmoved", 4, two(0xF000, 0x5400), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2872 {"fmoved", 4, two(0xF000, 0x7400), two(0xF1C0, 0xFC7F), "IiF7~F", mfloat },
2873 {"fmoved", 4, two(0xF000, 0x0000), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2874 {"fmoved", 4, two(0xF000, 0x5400), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2875 {"fmoved", 4, two(0xF000, 0x7400), two(0xF1C0, 0xFC7F), "IiF7ws", cfloat },
2876 {"fmovel", 4, two(0xF000, 0x4000), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2877 {"fmovel", 4, two(0xF000, 0x6000), two(0xF1C0, 0xFC7F), "IiF7$l", mfloat },
2878 /* FIXME: the next two variants should not permit moving an address
2879 register to anything but the floating point instruction register. */
2880 {"fmovel", 4, two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8%s", mfloat },
2881 {"fmovel", 4, two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Ii*ls8", mfloat },
2882 {"fmovel", 4, two(0xF000, 0x4000), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2883 {"fmovel", 4, two(0xF000, 0x6000), two(0xF1C0, 0xFC7F), "IiF7bs", cfloat },
2884 /* Move the FP control registers. */
2885 {"fmovel", 4, two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8ps", cfloat },
2886 {"fmovel", 4, two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Iibss8", cfloat },
2887 {"fmovep", 4, two(0xF000, 0x4C00), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2888 {"fmovep", 4, two(0xF000, 0x6C00), two(0xF1C0, 0xFC00), "IiF7~pkC", mfloat },
2889 {"fmovep", 4, two(0xF000, 0x7C00), two(0xF1C0, 0xFC0F), "IiF7~pDk", mfloat },
2890 {"fmoves", 4, two(0xF000, 0x4400), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
2891 {"fmoves", 4, two(0xF000, 0x6400), two(0xF1C0, 0xFC7F), "IiF7$f", mfloat },
2892 {"fmoves", 4, two(0xF000, 0x4400), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2893 {"fmoves", 4, two(0xF000, 0x6400), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
2894 {"fmovew", 4, two(0xF000, 0x5000), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
2895 {"fmovew", 4, two(0xF000, 0x7000), two(0xF1C0, 0xFC7F), "IiF7$w", mfloat },
2896 {"fmovew", 4, two(0xF000, 0x5000), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2897 {"fmovew", 4, two(0xF000, 0x7000), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
2898 {"fmovex", 4, two(0xF000, 0x0000), two(0xF1FF, 0xE07F), "IiF8F7", mfloat },
2899 {"fmovex", 4, two(0xF000, 0x4800), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
2900 {"fmovex", 4, two(0xF000, 0x6800), two(0xF1C0, 0xFC7F), "IiF7~x", mfloat },
2902 {"fsmoveb", 4, two(0xF000, 0x5840), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
2903 {"fsmoveb", 4, two(0xF000, 0x5840), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2904 {"fsmoveb", 4, two(0xF000, 0x7840), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
2905 {"fsmoved", 4, two(0xF000, 0x0040), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2906 {"fsmoved", 4, two(0xF000, 0x5440), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
2907 {"fsmoved", 4, two(0xF000, 0x5440), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2908 {"fsmoved", 4, two(0xF000, 0x7440), two(0xF1C0, 0xFC7F), "IiF7ws", cfloat },
2909 {"fsmovel", 4, two(0xF000, 0x4040), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
2910 {"fsmovel", 4, two(0xF000, 0x4040), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2911 {"fsmovel", 4, two(0xF000, 0x6040), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
2912 {"fsmoves", 4, two(0xF000, 0x4440), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
2913 {"fsmoves", 4, two(0xF000, 0x4440), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2914 {"fsmoves", 4, two(0xF000, 0x6440), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
2915 {"fsmovew", 4, two(0xF000, 0x5040), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
2916 {"fsmovew", 4, two(0xF000, 0x5040), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2917 {"fsmovew", 4, two(0xF000, 0x7040), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
2918 {"fsmovex", 4, two(0xF000, 0x0040), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
2919 {"fsmovex", 4, two(0xF000, 0x4840), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
2920 {"fsmovep", 4, two(0xF000, 0x4C40), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
2922 {"fdmoveb", 4, two(0xF000, 0x5844), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
2923 {"fdmoveb", 4, two(0xF000, 0x5844), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2924 {"fdmoveb", 4, two(0xF000, 0x7844), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
2925 {"fdmoved", 4, two(0xF000, 0x0044), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2926 {"fdmoved", 4, two(0xF000, 0x5444), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
2927 {"fdmoved", 4, two(0xF000, 0x5444), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2928 {"fdmoved", 4, two(0xF000, 0x7444), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
2929 {"fdmovel", 4, two(0xF000, 0x4044), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
2930 {"fdmovel", 4, two(0xF000, 0x4044), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2931 {"fdmovel", 4, two(0xF000, 0x6044), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
2932 {"fdmoves", 4, two(0xF000, 0x4444), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
2933 {"fdmoves", 4, two(0xF000, 0x4444), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2934 {"fdmoves", 4, two(0xF000, 0x6444), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
2935 {"fdmovew", 4, two(0xF000, 0x5044), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
2936 {"fdmovew", 4, two(0xF000, 0x5044), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2937 {"fdmovew", 4, two(0xF000, 0x7044), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat },
2938 {"fdmovex", 4, two(0xF000, 0x0044), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
2939 {"fdmovex", 4, two(0xF000, 0x4844), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
2940 {"fdmovep", 4, two(0xF000, 0x4C44), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
2942 {"fmovecrx", 4, two(0xF000, 0x5C00), two(0xF1FF, 0xFC00), "Ii#CF7", mfloat },
2944 {"fmovemd", 4, two(0xF000, 0xD000), two(0xFFC0, 0xFF00), "Iizsl3", cfloat },
2945 {"fmovemd", 4, two(0xF000, 0xD000), two(0xFFC0, 0xFF00), "Iizs#3", cfloat },
2946 {"fmovemd", 4, two(0xF000, 0xF000), two(0xFFC0, 0xFF00), "Ii#3ys", cfloat },
2947 {"fmovemd", 4, two(0xF000, 0xF000), two(0xFFC0, 0xFF00), "Iil3ys", cfloat },
2949 {"fmovemx", 4, two(0xF000, 0xF800), two(0xF1C0, 0xFF8F), "IiDk&s", mfloat },
2950 {"fmovemx", 4, two(0xF020, 0xE800), two(0xF1F8, 0xFF8F), "IiDk-s", mfloat },
2951 {"fmovemx", 4, two(0xF000, 0xD800), two(0xF1C0, 0xFF8F), "Ii&sDk", mfloat },
2952 {"fmovemx", 4, two(0xF018, 0xD800), two(0xF1F8, 0xFF8F), "Ii+sDk", mfloat },
2953 {"fmovemx", 4, two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Idl3&s", mfloat },
2954 {"fmovemx", 4, two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Id#3&s", mfloat },
2955 {"fmovemx", 4, two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id&sl3", mfloat },
2956 {"fmovemx", 4, two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id&s#3", mfloat },
2957 {"fmovemx", 4, two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "IdL3-s", mfloat },
2958 {"fmovemx", 4, two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "Id#3-s", mfloat },
2959 {"fmovemx", 4, two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+sl3", mfloat },
2960 {"fmovemx", 4, two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+s#3", mfloat },
2962 {"fmoveml", 4, two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8%s", mfloat },
2963 {"fmoveml", 4, two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "IiL8~s", mfloat },
2964 /* FIXME: In the next instruction, we should only permit %dn if the
2965 target is a single register. We should only permit %an if the
2966 target is a single %fpiar. */
2967 {"fmoveml", 4, two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Ii*lL8", mfloat },
2969 {"fmovem", 4, two(0xF000, 0xD000), two(0xFFC0, 0xFF00), "IizsL3", cfloat },
2970 {"fmovem", 4, two(0xF000, 0xD000), two(0xFFC0, 0xFF00), "Iizs#3", cfloat },
2971 {"fmovem", 4, two(0xF000, 0xF000), two(0xFFC0, 0xFF00), "Ii#3ys", cfloat },
2972 {"fmovem", 4, two(0xF000, 0xF000), two(0xFFC0, 0xFF00), "IiL3ys", cfloat },
2974 {"fmovem", 4, two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "IdL3-s", mfloat },
2975 {"fmovem", 4, two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Idl3&s", mfloat },
2976 {"fmovem", 4, two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+sl3", mfloat },
2977 {"fmovem", 4, two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id&sl3", mfloat },
2978 {"fmovem", 4, two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "Id#3-s", mfloat },
2979 {"fmovem", 4, two(0xF020, 0xE800), two(0xF1F8, 0xFF8F), "IiDk-s", mfloat },
2980 {"fmovem", 4, two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Id#3&s", mfloat },
2981 {"fmovem", 4, two(0xF000, 0xF800), two(0xF1C0, 0xFF8F), "IiDk&s", mfloat },
2982 {"fmovem", 4, two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+s#3", mfloat },
2983 {"fmovem", 4, two(0xF018, 0xD800), two(0xF1F8, 0xFF8F), "Ii+sDk", mfloat },
2984 {"fmovem", 4, two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id&s#3", mfloat },
2985 {"fmovem", 4, two(0xF000, 0xD800), two(0xF1C0, 0xFF8F), "Ii&sDk", mfloat },
2986 {"fmovem", 4, two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8%s", mfloat },
2987 {"fmovem", 4, two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Ii*ss8", mfloat },
2988 {"fmovem", 4, two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "IiL8~s", mfloat },
2989 {"fmovem", 4, two(0xF000, 0x8000), two(0xF2C0, 0xE3FF), "Ii*sL8", mfloat },
2991 {"fmulb", 4, two(0xF000, 0x5823), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
2992 {"fmulb", 4, two(0xF000, 0x5823), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2993 {"fmuld", 4, two(0xF000, 0x0023), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
2994 {"fmuld", 4, two(0xF000, 0x5423), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
2995 {"fmuld", 4, two(0xF000, 0x5423), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
2996 {"fmull", 4, two(0xF000, 0x4023), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
2997 {"fmull", 4, two(0xF000, 0x4023), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
2998 {"fmulp", 4, two(0xF000, 0x4C23), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
2999 {"fmuls", 4, two(0xF000, 0x4423), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3000 {"fmuls", 4, two(0xF000, 0x4423), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3001 {"fmulw", 4, two(0xF000, 0x5023), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3002 {"fmulw", 4, two(0xF000, 0x5023), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3003 {"fmulx", 4, two(0xF000, 0x0023), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3004 {"fmulx", 4, two(0xF000, 0x4823), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3006 {"fsmulb", 4, two(0xF000, 0x5863), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
3007 {"fsmulb", 4, two(0xF000, 0x5863), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3008 {"fsmuld", 4, two(0xF000, 0x0063), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
3009 {"fsmuld", 4, two(0xF000, 0x5463), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
3010 {"fsmuld", 4, two(0xF000, 0x5463), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
3011 {"fsmull", 4, two(0xF000, 0x4063), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
3012 {"fsmull", 4, two(0xF000, 0x4063), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3013 {"fsmulp", 4, two(0xF000, 0x4C63), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
3014 {"fsmuls", 4, two(0xF000, 0x4463), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
3015 {"fsmuls", 4, two(0xF000, 0x4463), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3016 {"fsmulw", 4, two(0xF000, 0x5063), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
3017 {"fsmulw", 4, two(0xF000, 0x5063), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3018 {"fsmulx", 4, two(0xF000, 0x0063), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
3019 {"fsmulx", 4, two(0xF000, 0x4863), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
3021 {"fdmulb", 4, two(0xF000, 0x5867), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
3022 {"fdmulb", 4, two(0xF000, 0x5867), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3023 {"fdmuld", 4, two(0xF000, 0x0067), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
3024 {"fdmuld", 4, two(0xF000, 0x5467), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
3025 {"fdmuld", 4, two(0xF000, 0x5467), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
3026 {"fdmull", 4, two(0xF000, 0x4067), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
3027 {"fdmull", 4, two(0xF000, 0x4067), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3028 {"fdmulp", 4, two(0xF000, 0x4C67), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
3029 {"fdmuls", 4, two(0xF000, 0x4467), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
3030 {"fdmuls", 4, two(0xF000, 0x4467), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3031 {"fdmulw", 4, two(0xF000, 0x5067), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
3032 {"fdmulw", 4, two(0xF000, 0x5067), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3033 {"fdmulx", 4, two(0xF000, 0x0067), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
3034 {"fdmulx", 4, two(0xF000, 0x4867), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
3036 {"fnegb", 4, two(0xF000, 0x581A), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3037 {"fnegb", 4, two(0xF000, 0x581A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3038 {"fnegd", 4, two(0xF000, 0x001A), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
3039 {"fnegd", 4, two(0xF000, 0x001A), two(0xF1C0, 0xE07F), "IiFt", cfloat },
3040 {"fnegd", 4, two(0xF000, 0x541A), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3041 {"fnegd", 4, two(0xF000, 0x541A), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
3042 {"fnegl", 4, two(0xF000, 0x401A), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3043 {"fnegl", 4, two(0xF000, 0x401A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3044 {"fnegp", 4, two(0xF000, 0x4C1A), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3045 {"fnegs", 4, two(0xF000, 0x441A), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3046 {"fnegs", 4, two(0xF000, 0x441A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3047 {"fnegw", 4, two(0xF000, 0x501A), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3048 {"fnegw", 4, two(0xF000, 0x501A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3049 {"fnegx", 4, two(0xF000, 0x001A), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3050 {"fnegx", 4, two(0xF000, 0x481A), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3051 {"fnegx", 4, two(0xF000, 0x001A), two(0xF1C0, 0xE07F), "IiFt", mfloat },
3053 {"fsnegb", 4, two(0xF000, 0x585A), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
3054 {"fsnegb", 4, two(0xF000, 0x585A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3055 {"fsnegd", 4, two(0xF000, 0x005A), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
3056 {"fsnegd", 4, two(0xF000, 0x005A), two(0xF1C0, 0xE07F), "IiFt", cfloat },
3057 {"fsnegd", 4, two(0xF000, 0x545A), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
3058 {"fsnegd", 4, two(0xF000, 0x545A), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
3059 {"fsnegl", 4, two(0xF000, 0x405A), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
3060 {"fsnegl", 4, two(0xF000, 0x405A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3061 {"fsnegp", 4, two(0xF000, 0x4C5A), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
3062 {"fsnegs", 4, two(0xF000, 0x445A), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
3063 {"fsnegs", 4, two(0xF000, 0x445A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3064 {"fsnegw", 4, two(0xF000, 0x505A), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
3065 {"fsnegw", 4, two(0xF000, 0x505A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3066 {"fsnegx", 4, two(0xF000, 0x005A), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
3067 {"fsnegx", 4, two(0xF000, 0x485A), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
3068 {"fsnegx", 4, two(0xF000, 0x005A), two(0xF1C0, 0xE07F), "IiFt", m68040up },
3070 {"fdnegb", 4, two(0xF000, 0x585E), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
3071 {"fdnegb", 4, two(0xF000, 0x585E), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3072 {"fdnegd", 4, two(0xF000, 0x005E), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
3073 {"fdnegd", 4, two(0xF000, 0x005E), two(0xF1C0, 0xE07F), "IiFt", cfloat },
3074 {"fdnegd", 4, two(0xF000, 0x545E), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
3075 {"fdnegd", 4, two(0xF000, 0x545E), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
3076 {"fdnegl", 4, two(0xF000, 0x405E), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
3077 {"fdnegl", 4, two(0xF000, 0x405E), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3078 {"fdnegp", 4, two(0xF000, 0x4C5E), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
3079 {"fdnegs", 4, two(0xF000, 0x445E), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
3080 {"fdnegs", 4, two(0xF000, 0x445E), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3081 {"fdnegw", 4, two(0xF000, 0x505E), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
3082 {"fdnegw", 4, two(0xF000, 0x505E), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3083 {"fdnegx", 4, two(0xF000, 0x005E), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
3084 {"fdnegx", 4, two(0xF000, 0x485E), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
3085 {"fdnegx", 4, two(0xF000, 0x005E), two(0xF1C0, 0xE07F), "IiFt", m68040up },
3087 {"fnop", 4, two(0xF280, 0x0000), two(0xFFFF, 0xFFFF), "Ii", mfloat | cfloat },
3089 {"fremb", 4, two(0xF000, 0x5825), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3090 {"fremd", 4, two(0xF000, 0x5425), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3091 {"freml", 4, two(0xF000, 0x4025), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3092 {"fremp", 4, two(0xF000, 0x4C25), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3093 {"frems", 4, two(0xF000, 0x4425), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3094 {"fremw", 4, two(0xF000, 0x5025), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3095 {"fremx", 4, two(0xF000, 0x0025), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3096 {"fremx", 4, two(0xF000, 0x4825), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3098 {"frestore", 2, one(0xF140), one(0xF1C0), "Id<s", mfloat },
3099 {"frestore", 2, one(0xF140), one(0xF1C0), "Idys", cfloat },
3101 {"fsave", 2, one(0xF100), one(0xF1C0), "Id>s", mfloat },
3102 {"fsave", 2, one(0xF100), one(0xF1C0), "Idzs", cfloat },
3104 {"fscaleb", 4, two(0xF000, 0x5826), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3105 {"fscaled", 4, two(0xF000, 0x5426), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3106 {"fscalel", 4, two(0xF000, 0x4026), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3107 {"fscalep", 4, two(0xF000, 0x4C26), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3108 {"fscales", 4, two(0xF000, 0x4426), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3109 {"fscalew", 4, two(0xF000, 0x5026), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3110 {"fscalex", 4, two(0xF000, 0x0026), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3111 {"fscalex", 4, two(0xF000, 0x4826), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3113 /* $ is necessary to prevent the assembler from using PC-relative.
3114 If @ were used, "label: fseq label" could produce "ftrapeq", 2,
3115 because "label" became "pc@label". */
3116 {"fseq", 4, two(0xF040, 0x0001), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3117 {"fsf", 4, two(0xF040, 0x0000), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3118 {"fsge", 4, two(0xF040, 0x0013), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3119 {"fsgl", 4, two(0xF040, 0x0016), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3120 {"fsgle", 4, two(0xF040, 0x0017), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3121 {"fsgt", 4, two(0xF040, 0x0012), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3122 {"fsle", 4, two(0xF040, 0x0015), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3123 {"fslt", 4, two(0xF040, 0x0014), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3124 {"fsne", 4, two(0xF040, 0x000E), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3125 {"fsnge", 4, two(0xF040, 0x001C), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3126 {"fsngl", 4, two(0xF040, 0x0019), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3127 {"fsngle", 4, two(0xF040, 0x0018), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3128 {"fsngt", 4, two(0xF040, 0x001D), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3129 {"fsnle", 4, two(0xF040, 0x001A), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3130 {"fsnlt", 4, two(0xF040, 0x001B), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3131 {"fsoge", 4, two(0xF040, 0x0003), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3132 {"fsogl", 4, two(0xF040, 0x0006), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3133 {"fsogt", 4, two(0xF040, 0x0002), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3134 {"fsole", 4, two(0xF040, 0x0005), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3135 {"fsolt", 4, two(0xF040, 0x0004), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3136 {"fsor", 4, two(0xF040, 0x0007), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3137 {"fsseq", 4, two(0xF040, 0x0011), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3138 {"fssf", 4, two(0xF040, 0x0010), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3139 {"fssne", 4, two(0xF040, 0x001E), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3140 {"fsst", 4, two(0xF040, 0x001F), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3141 {"fst", 4, two(0xF040, 0x000F), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3142 {"fsueq", 4, two(0xF040, 0x0009), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3143 {"fsuge", 4, two(0xF040, 0x000B), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3144 {"fsugt", 4, two(0xF040, 0x000A), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3145 {"fsule", 4, two(0xF040, 0x000D), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3146 {"fsult", 4, two(0xF040, 0x000C), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3147 {"fsun", 4, two(0xF040, 0x0008), two(0xF1C0, 0xFFFF), "Ii$s", mfloat },
3149 {"fsgldivb", 4, two(0xF000, 0x5824), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3150 {"fsgldivd", 4, two(0xF000, 0x5424), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3151 {"fsgldivl", 4, two(0xF000, 0x4024), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3152 {"fsgldivp", 4, two(0xF000, 0x4C24), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3153 {"fsgldivs", 4, two(0xF000, 0x4424), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3154 {"fsgldivw", 4, two(0xF000, 0x5024), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3155 {"fsgldivx", 4, two(0xF000, 0x0024), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3156 {"fsgldivx", 4, two(0xF000, 0x4824), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3157 {"fsgldivx", 4, two(0xF000, 0x0024), two(0xF1C0, 0xE07F), "IiFt", mfloat },
3159 {"fsglmulb", 4, two(0xF000, 0x5827), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3160 {"fsglmuld", 4, two(0xF000, 0x5427), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3161 {"fsglmull", 4, two(0xF000, 0x4027), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3162 {"fsglmulp", 4, two(0xF000, 0x4C27), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3163 {"fsglmuls", 4, two(0xF000, 0x4427), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3164 {"fsglmulw", 4, two(0xF000, 0x5027), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3165 {"fsglmulx", 4, two(0xF000, 0x0027), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3166 {"fsglmulx", 4, two(0xF000, 0x4827), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3167 {"fsglmulx", 4, two(0xF000, 0x0027), two(0xF1C0, 0xE07F), "IiFt", mfloat },
3169 {"fsinb", 4, two(0xF000, 0x580E), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3170 {"fsind", 4, two(0xF000, 0x540E), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3171 {"fsinl", 4, two(0xF000, 0x400E), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3172 {"fsinp", 4, two(0xF000, 0x4C0E), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3173 {"fsins", 4, two(0xF000, 0x440E), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3174 {"fsinw", 4, two(0xF000, 0x500E), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3175 {"fsinx", 4, two(0xF000, 0x000E), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3176 {"fsinx", 4, two(0xF000, 0x480E), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3177 {"fsinx", 4, two(0xF000, 0x000E), two(0xF1C0, 0xE07F), "IiFt", mfloat },
3179 {"fsincosb", 4, two(0xF000, 0x5830), two(0xF1C0, 0xFC78), "Ii;bF3F7", mfloat },
3180 {"fsincosd", 4, two(0xF000, 0x5430), two(0xF1C0, 0xFC78), "Ii;FF3F7", mfloat },
3181 {"fsincosl", 4, two(0xF000, 0x4030), two(0xF1C0, 0xFC78), "Ii;lF3F7", mfloat },
3182 {"fsincosp", 4, two(0xF000, 0x4C30), two(0xF1C0, 0xFC78), "Ii;pF3F7", mfloat },
3183 {"fsincoss", 4, two(0xF000, 0x4430), two(0xF1C0, 0xFC78), "Ii;fF3F7", mfloat },
3184 {"fsincosw", 4, two(0xF000, 0x5030), two(0xF1C0, 0xFC78), "Ii;wF3F7", mfloat },
3185 {"fsincosx", 4, two(0xF000, 0x0030), two(0xF1C0, 0xE078), "IiF8F3F7", mfloat },
3186 {"fsincosx", 4, two(0xF000, 0x4830), two(0xF1C0, 0xFC78), "Ii;xF3F7", mfloat },
3188 {"fsinhb", 4, two(0xF000, 0x5802), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3189 {"fsinhd", 4, two(0xF000, 0x5402), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3190 {"fsinhl", 4, two(0xF000, 0x4002), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3191 {"fsinhp", 4, two(0xF000, 0x4C02), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3192 {"fsinhs", 4, two(0xF000, 0x4402), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3193 {"fsinhw", 4, two(0xF000, 0x5002), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3194 {"fsinhx", 4, two(0xF000, 0x0002), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3195 {"fsinhx", 4, two(0xF000, 0x4802), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3196 {"fsinhx", 4, two(0xF000, 0x0002), two(0xF1C0, 0xE07F), "IiFt", mfloat },
3198 {"fsqrtb", 4, two(0xF000, 0x5804), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3199 {"fsqrtb", 4, two(0xF000, 0x5804), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3200 {"fsqrtd", 4, two(0xF000, 0x0004), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
3201 {"fsqrtd", 4, two(0xF000, 0x0004), two(0xF1C0, 0xE07F), "IiFt", cfloat },
3202 {"fsqrtd", 4, two(0xF000, 0x5404), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3203 {"fsqrtd", 4, two(0xF000, 0x5404), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
3204 {"fsqrtl", 4, two(0xF000, 0x4004), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3205 {"fsqrtl", 4, two(0xF000, 0x4004), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3206 {"fsqrtp", 4, two(0xF000, 0x4C04), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3207 {"fsqrts", 4, two(0xF000, 0x4404), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3208 {"fsqrts", 4, two(0xF000, 0x4404), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3209 {"fsqrtw", 4, two(0xF000, 0x5004), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3210 {"fsqrtw", 4, two(0xF000, 0x5004), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3211 {"fsqrtx", 4, two(0xF000, 0x0004), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3212 {"fsqrtx", 4, two(0xF000, 0x4804), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3213 {"fsqrtx", 4, two(0xF000, 0x0004), two(0xF1C0, 0xE07F), "IiFt", mfloat },
3215 {"fssqrtb", 4, two(0xF000, 0x5841), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
3216 {"fssqrtb", 4, two(0xF000, 0x5841), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3217 {"fssqrtd", 4, two(0xF000, 0x0041), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
3218 {"fssqrtd", 4, two(0xF000, 0x0041), two(0xF1C0, 0xE07F), "IiFt", cfloat },
3219 {"fssqrtd", 4, two(0xF000, 0x5441), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
3220 {"fssqrtd", 4, two(0xF000, 0x5441), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
3221 {"fssqrtl", 4, two(0xF000, 0x4041), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
3222 {"fssqrtl", 4, two(0xF000, 0x4041), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3223 {"fssqrtp", 4, two(0xF000, 0x4C41), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
3224 {"fssqrts", 4, two(0xF000, 0x4441), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
3225 {"fssqrts", 4, two(0xF000, 0x4441), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3226 {"fssqrtw", 4, two(0xF000, 0x5041), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
3227 {"fssqrtw", 4, two(0xF000, 0x5041), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3228 {"fssqrtx", 4, two(0xF000, 0x0041), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
3229 {"fssqrtx", 4, two(0xF000, 0x4841), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
3230 {"fssqrtx", 4, two(0xF000, 0x0041), two(0xF1C0, 0xE07F), "IiFt", m68040up },
3232 {"fdsqrtb", 4, two(0xF000, 0x5845), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
3233 {"fdsqrtb", 4, two(0xF000, 0x5845), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3234 {"fdsqrtd", 4, two(0xF000, 0x0045), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
3235 {"fdsqrtd", 4, two(0xF000, 0x0045), two(0xF1C0, 0xE07F), "IiFt", cfloat },
3236 {"fdsqrtd", 4, two(0xF000, 0x5445), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
3237 {"fdsqrtl", 4, two(0xF000, 0x4045), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
3238 {"fdsqrtl", 4, two(0xF000, 0x4045), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3239 {"fdsqrtp", 4, two(0xF000, 0x4C45), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
3240 {"fdsqrts", 4, two(0xF000, 0x4445), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
3241 {"fdsqrts", 4, two(0xF000, 0x4445), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3242 {"fdsqrtw", 4, two(0xF000, 0x5045), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
3243 {"fdsqrtw", 4, two(0xF000, 0x5045), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3244 {"fdsqrtx", 4, two(0xF000, 0x0045), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
3245 {"fdsqrtx", 4, two(0xF000, 0x4845), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
3246 {"fdsqrtx", 4, two(0xF000, 0x0045), two(0xF1C0, 0xE07F), "IiFt", m68040up },
3248 {"fsubb", 4, two(0xF000, 0x5828), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3249 {"fsubb", 4, two(0xF000, 0x5828), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3250 {"fsubd", 4, two(0xF000, 0x0028), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
3251 {"fsubd", 4, two(0xF000, 0x5428), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3252 {"fsubd", 4, two(0xF000, 0x5428), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
3253 {"fsubl", 4, two(0xF000, 0x4028), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3254 {"fsubl", 4, two(0xF000, 0x4028), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3255 {"fsubp", 4, two(0xF000, 0x4C28), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3256 {"fsubs", 4, two(0xF000, 0x4428), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3257 {"fsubs", 4, two(0xF000, 0x4428), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3258 {"fsubw", 4, two(0xF000, 0x5028), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3259 {"fsubw", 4, two(0xF000, 0x5028), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3260 {"fsubx", 4, two(0xF000, 0x0028), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3261 {"fsubx", 4, two(0xF000, 0x4828), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3262 {"fsubx", 4, two(0xF000, 0x0028), two(0xF1C0, 0xE07F), "IiFt", mfloat },
3264 {"fssubb", 4, two(0xF000, 0x5828), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3265 {"fssubb", 4, two(0xF000, 0x5868), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
3266 {"fssubd", 4, two(0xF000, 0x0068), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
3267 {"fssubd", 4, two(0xF000, 0x5468), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
3268 {"fssubd", 4, two(0xF000, 0x5468), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
3269 {"fssubl", 4, two(0xF000, 0x4068), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
3270 {"fssubl", 4, two(0xF000, 0x4068), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3271 {"fssubp", 4, two(0xF000, 0x4C68), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
3272 {"fssubs", 4, two(0xF000, 0x4468), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
3273 {"fssubs", 4, two(0xF000, 0x4468), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3274 {"fssubw", 4, two(0xF000, 0x5068), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
3275 {"fssubw", 4, two(0xF000, 0x5068), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3276 {"fssubx", 4, two(0xF000, 0x0068), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
3277 {"fssubx", 4, two(0xF000, 0x4868), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
3278 {"fssubx", 4, two(0xF000, 0x0068), two(0xF1C0, 0xE07F), "IiFt", m68040up },
3280 {"fdsubb", 4, two(0xF000, 0x586A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3281 {"fdsubb", 4, two(0xF000, 0x586c), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
3282 {"fdsubd", 4, two(0xF000, 0x006A), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
3283 {"fdsubd", 4, two(0xF000, 0x546A), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
3284 {"fdsubd", 4, two(0xF000, 0x546c), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
3285 {"fdsubl", 4, two(0xF000, 0x406A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3286 {"fdsubl", 4, two(0xF000, 0x406c), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
3287 {"fdsubp", 4, two(0xF000, 0x4C6c), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
3288 {"fdsubs", 4, two(0xF000, 0x446A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3289 {"fdsubs", 4, two(0xF000, 0x446c), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
3290 {"fdsubw", 4, two(0xF000, 0x506A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
3291 {"fdsubw", 4, two(0xF000, 0x506c), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
3292 {"fdsubx", 4, two(0xF000, 0x006c), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
3293 {"fdsubx", 4, two(0xF000, 0x486c), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
3294 {"fdsubx", 4, two(0xF000, 0x006c), two(0xF1C0, 0xE07F), "IiFt", m68040up },
3296 {"ftanb", 4, two(0xF000, 0x580F), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3297 {"ftand", 4, two(0xF000, 0x540F), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3298 {"ftanl", 4, two(0xF000, 0x400F), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3299 {"ftanp", 4, two(0xF000, 0x4C0F), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3300 {"ftans", 4, two(0xF000, 0x440F), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3301 {"ftanw", 4, two(0xF000, 0x500F), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3302 {"ftanx", 4, two(0xF000, 0x000F), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3303 {"ftanx", 4, two(0xF000, 0x480F), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3304 {"ftanx", 4, two(0xF000, 0x000F), two(0xF1C0, 0xE07F), "IiFt", mfloat },
3306 {"ftanhb", 4, two(0xF000, 0x5809), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3307 {"ftanhd", 4, two(0xF000, 0x5409), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3308 {"ftanhl", 4, two(0xF000, 0x4009), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3309 {"ftanhp", 4, two(0xF000, 0x4C09), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3310 {"ftanhs", 4, two(0xF000, 0x4409), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3311 {"ftanhw", 4, two(0xF000, 0x5009), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3312 {"ftanhx", 4, two(0xF000, 0x0009), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3313 {"ftanhx", 4, two(0xF000, 0x4809), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3314 {"ftanhx", 4, two(0xF000, 0x0009), two(0xF1C0, 0xE07F), "IiFt", mfloat },
3316 {"ftentoxb", 4, two(0xF000, 0x5812), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3317 {"ftentoxd", 4, two(0xF000, 0x5412), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3318 {"ftentoxl", 4, two(0xF000, 0x4012), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3319 {"ftentoxp", 4, two(0xF000, 0x4C12), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3320 {"ftentoxs", 4, two(0xF000, 0x4412), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3321 {"ftentoxw", 4, two(0xF000, 0x5012), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3322 {"ftentoxx", 4, two(0xF000, 0x0012), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3323 {"ftentoxx", 4, two(0xF000, 0x4812), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3324 {"ftentoxx", 4, two(0xF000, 0x0012), two(0xF1C0, 0xE07F), "IiFt", mfloat },
3326 {"ftrapeq", 4, two(0xF07C, 0x0001), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3327 {"ftrapf", 4, two(0xF07C, 0x0000), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3328 {"ftrapge", 4, two(0xF07C, 0x0013), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3329 {"ftrapgl", 4, two(0xF07C, 0x0016), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3330 {"ftrapgle", 4, two(0xF07C, 0x0017), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3331 {"ftrapgt", 4, two(0xF07C, 0x0012), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3332 {"ftraple", 4, two(0xF07C, 0x0015), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3333 {"ftraplt", 4, two(0xF07C, 0x0014), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3334 {"ftrapne", 4, two(0xF07C, 0x000E), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3335 {"ftrapnge", 4, two(0xF07C, 0x001C), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3336 {"ftrapngl", 4, two(0xF07C, 0x0019), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3337 {"ftrapngle", 4,two(0xF07C, 0x0018), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3338 {"ftrapngt", 4, two(0xF07C, 0x001D), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3339 {"ftrapnle", 4, two(0xF07C, 0x001A), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3340 {"ftrapnlt", 4, two(0xF07C, 0x001B), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3341 {"ftrapoge", 4, two(0xF07C, 0x0003), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3342 {"ftrapogl", 4, two(0xF07C, 0x0006), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3343 {"ftrapogt", 4, two(0xF07C, 0x0002), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3344 {"ftrapole", 4, two(0xF07C, 0x0005), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3345 {"ftrapolt", 4, two(0xF07C, 0x0004), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3346 {"ftrapor", 4, two(0xF07C, 0x0007), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3347 {"ftrapseq", 4, two(0xF07C, 0x0011), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3348 {"ftrapsf", 4, two(0xF07C, 0x0010), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3349 {"ftrapsne", 4, two(0xF07C, 0x001E), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3350 {"ftrapst", 4, two(0xF07C, 0x001F), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3351 {"ftrapt", 4, two(0xF07C, 0x000F), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3352 {"ftrapueq", 4, two(0xF07C, 0x0009), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3353 {"ftrapuge", 4, two(0xF07C, 0x000B), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3354 {"ftrapugt", 4, two(0xF07C, 0x000A), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3355 {"ftrapule", 4, two(0xF07C, 0x000D), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3356 {"ftrapult", 4, two(0xF07C, 0x000C), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3357 {"ftrapun", 4, two(0xF07C, 0x0008), two(0xF1FF, 0xFFFF), "Ii", mfloat },
3359 {"ftrapeqw", 4, two(0xF07A, 0x0001), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3360 {"ftrapfw", 4, two(0xF07A, 0x0000), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3361 {"ftrapgew", 4, two(0xF07A, 0x0013), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3362 {"ftrapglw", 4, two(0xF07A, 0x0016), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3363 {"ftrapglew", 4,two(0xF07A, 0x0017), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3364 {"ftrapgtw", 4, two(0xF07A, 0x0012), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3365 {"ftraplew", 4, two(0xF07A, 0x0015), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3366 {"ftrapltw", 4, two(0xF07A, 0x0014), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3367 {"ftrapnew", 4, two(0xF07A, 0x000E), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3368 {"ftrapngew", 4,two(0xF07A, 0x001C), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3369 {"ftrapnglw", 4,two(0xF07A, 0x0019), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3370 {"ftrapnglew", 4,two(0xF07A, 0x0018), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3371 {"ftrapngtw", 4,two(0xF07A, 0x001D), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3372 {"ftrapnlew", 4,two(0xF07A, 0x001A), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3373 {"ftrapnltw", 4,two(0xF07A, 0x001B), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3374 {"ftrapogew", 4,two(0xF07A, 0x0003), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3375 {"ftrapoglw", 4,two(0xF07A, 0x0006), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3376 {"ftrapogtw", 4,two(0xF07A, 0x0002), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3377 {"ftrapolew", 4,two(0xF07A, 0x0005), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3378 {"ftrapoltw", 4,two(0xF07A, 0x0004), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3379 {"ftraporw", 4, two(0xF07A, 0x0007), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3380 {"ftrapseqw", 4,two(0xF07A, 0x0011), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3381 {"ftrapsfw", 4, two(0xF07A, 0x0010), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3382 {"ftrapsnew", 4,two(0xF07A, 0x001E), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3383 {"ftrapstw", 4, two(0xF07A, 0x001F), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3384 {"ftraptw", 4, two(0xF07A, 0x000F), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3385 {"ftrapueqw", 4,two(0xF07A, 0x0009), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3386 {"ftrapugew", 4,two(0xF07A, 0x000B), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3387 {"ftrapugtw", 4,two(0xF07A, 0x000A), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3388 {"ftrapulew", 4,two(0xF07A, 0x000D), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3389 {"ftrapultw", 4,two(0xF07A, 0x000C), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3390 {"ftrapunw", 4, two(0xF07A, 0x0008), two(0xF1FF, 0xFFFF), "Ii^w", mfloat },
3392 {"ftrapeql", 4, two(0xF07B, 0x0001), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3393 {"ftrapfl", 4, two(0xF07B, 0x0000), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3394 {"ftrapgel", 4, two(0xF07B, 0x0013), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3395 {"ftrapgll", 4, two(0xF07B, 0x0016), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3396 {"ftrapglel", 4,two(0xF07B, 0x0017), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3397 {"ftrapgtl", 4, two(0xF07B, 0x0012), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3398 {"ftraplel", 4, two(0xF07B, 0x0015), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3399 {"ftrapltl", 4, two(0xF07B, 0x0014), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3400 {"ftrapnel", 4, two(0xF07B, 0x000E), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3401 {"ftrapngel", 4,two(0xF07B, 0x001C), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3402 {"ftrapngll", 4,two(0xF07B, 0x0019), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3403 {"ftrapnglel", 4,two(0xF07B, 0x0018), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3404 {"ftrapngtl", 4,two(0xF07B, 0x001D), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3405 {"ftrapnlel", 4,two(0xF07B, 0x001A), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3406 {"ftrapnltl", 4,two(0xF07B, 0x001B), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3407 {"ftrapogel", 4,two(0xF07B, 0x0003), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3408 {"ftrapogll", 4,two(0xF07B, 0x0006), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3409 {"ftrapogtl", 4,two(0xF07B, 0x0002), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3410 {"ftrapolel", 4,two(0xF07B, 0x0005), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3411 {"ftrapoltl", 4,two(0xF07B, 0x0004), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3412 {"ftraporl", 4, two(0xF07B, 0x0007), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3413 {"ftrapseql", 4,two(0xF07B, 0x0011), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3414 {"ftrapsfl", 4, two(0xF07B, 0x0010), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3415 {"ftrapsnel", 4,two(0xF07B, 0x001E), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3416 {"ftrapstl", 4, two(0xF07B, 0x001F), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3417 {"ftraptl", 4, two(0xF07B, 0x000F), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3418 {"ftrapueql", 4,two(0xF07B, 0x0009), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3419 {"ftrapugel", 4,two(0xF07B, 0x000B), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3420 {"ftrapugtl", 4,two(0xF07B, 0x000A), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3421 {"ftrapulel", 4,two(0xF07B, 0x000D), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3422 {"ftrapultl", 4,two(0xF07B, 0x000C), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3423 {"ftrapunl", 4, two(0xF07B, 0x0008), two(0xF1FF, 0xFFFF), "Ii^l", mfloat },
3425 {"ftstb", 4, two(0xF000, 0x583A), two(0xF1C0, 0xFC7F), "Ii;b", mfloat },
3426 {"ftstb", 4, two(0xF000, 0x583A), two(0xF1C0, 0xFC7F), "Iibs", cfloat },
3427 {"ftstd", 4, two(0xF000, 0x003A), two(0xF1C0, 0xE07F), "IiF8", cfloat },
3428 {"ftstd", 4, two(0xF000, 0x543A), two(0xF1C0, 0xFC7F), "Ii;F", mfloat },
3429 {"ftstd", 4, two(0xF000, 0x543A), two(0xF1C0, 0xFC7F), "Iibs", cfloat },
3430 {"ftstl", 4, two(0xF000, 0x403A), two(0xF1C0, 0xFC7F), "Ii;l", mfloat },
3431 {"ftstl", 4, two(0xF000, 0x403A), two(0xF1C0, 0xFC7F), "Iibs", cfloat },
3432 {"ftstp", 4, two(0xF000, 0x4C3A), two(0xF1C0, 0xFC7F), "Ii;p", mfloat },
3433 {"ftsts", 4, two(0xF000, 0x443A), two(0xF1C0, 0xFC7F), "Ii;f", mfloat },
3434 {"ftsts", 4, two(0xF000, 0x443A), two(0xF1C0, 0xFC7F), "Iibs", cfloat },
3435 {"ftstw", 4, two(0xF000, 0x503A), two(0xF1C0, 0xFC7F), "Ii;w", mfloat },
3436 {"ftstw", 4, two(0xF000, 0x503A), two(0xF1C0, 0xFC7F), "Iibs", cfloat },
3437 {"ftstx", 4, two(0xF000, 0x003A), two(0xF1C0, 0xE07F), "IiF8", mfloat },
3438 {"ftstx", 4, two(0xF000, 0x483A), two(0xF1C0, 0xFC7F), "Ii;x", mfloat },
3440 {"ftwotoxb", 4, two(0xF000, 0x5811), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat },
3441 {"ftwotoxd", 4, two(0xF000, 0x5411), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat },
3442 {"ftwotoxl", 4, two(0xF000, 0x4011), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
3443 {"ftwotoxp", 4, two(0xF000, 0x4C11), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
3444 {"ftwotoxs", 4, two(0xF000, 0x4411), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat },
3445 {"ftwotoxw", 4, two(0xF000, 0x5011), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat },
3446 {"ftwotoxx", 4, two(0xF000, 0x0011), two(0xF1C0, 0xE07F), "IiF8F7", mfloat },
3447 {"ftwotoxx", 4, two(0xF000, 0x4811), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
3448 {"ftwotoxx", 4, two(0xF000, 0x0011), two(0xF1C0, 0xE07F), "IiFt", mfloat },
3450 {"halt", 2, one(0045310), one(0177777), "", m68060 | mcfisa_a },
3452 {"illegal", 2, one(0045374), one(0177777), "", m68000up | mcfisa_a },
3453 {"intouch", 2, one(0xf428), one(0xfff8), "As", mcfisa_b },
3455 {"jmp", 2, one(0047300), one(0177700), "!s", m68000up | mcfisa_a },
3457 {"jra", 2, one(0060000), one(0177400), "Bg", m68000up | mcfisa_a },
3458 {"jra", 2, one(0047300), one(0177700), "!s", m68000up | mcfisa_a },
3460 {"jsr", 2, one(0047200), one(0177700), "!s", m68000up | mcfisa_a },
3462 {"jbsr", 2, one(0060400), one(0177400), "Bg", m68000up | mcfisa_a },
3463 {"jbsr", 2, one(0047200), one(0177700), "!s", m68000up | mcfisa_a },
3465 {"lea", 2, one(0040700), one(0170700), "!sAd", m68000up | mcfisa_a },
3467 {"lpstop", 6, two(0174000,0000700),two(0177777,0177777),"#w", cpu32|m68060 },
3469 {"linkw", 4, one(0047120), one(0177770), "As#w", m68000up | mcfisa_a },
3470 {"linkl", 6, one(0044010), one(0177770), "As#l", m68020up | cpu32 },
3471 {"link", 4, one(0047120), one(0177770), "As#W", m68000up | mcfisa_a },
3472 {"link", 6, one(0044010), one(0177770), "As#l", m68020up | cpu32 },
3474 {"lslb", 2, one(0160410), one(0170770), "QdDs", m68000up },
3475 {"lslb", 2, one(0160450), one(0170770), "DdDs", m68000up },
3476 {"lslw", 2, one(0160510), one(0170770), "QdDs", m68000up },
3477 {"lslw", 2, one(0160550), one(0170770), "DdDs", m68000up },
3478 {"lslw", 2, one(0161700), one(0177700), "~s", m68000up },
3479 {"lsll", 2, one(0160610), one(0170770), "QdDs", m68000up | mcfisa_a },
3480 {"lsll", 2, one(0160650), one(0170770), "DdDs", m68000up | mcfisa_a },
3482 {"lsrb", 2, one(0160010), one(0170770), "QdDs", m68000up },
3483 {"lsrb", 2, one(0160050), one(0170770), "DdDs", m68000up },
3484 {"lsrw", 2, one(0160110), one(0170770), "QdDs", m68000up },
3485 {"lsrw", 2, one(0160150), one(0170770), "DdDs", m68000up },
3486 {"lsrw", 2, one(0161300), one(0177700), "~s", m68000up },
3487 {"lsrl", 2, one(0160210), one(0170770), "QdDs", m68000up | mcfisa_a },
3488 {"lsrl", 2, one(0160250), one(0170770), "DdDs", m68000up | mcfisa_a },
3490 {"macw", 4, two(0xa080, 0x0000), two(0xf180, 0x0910), "uNuoiI4/Rn", mcfmac },
3491 {"macw", 4, two(0xa080, 0x0200), two(0xf180, 0x0910), "uNuoMh4/Rn", mcfmac },
3492 {"macw", 4, two(0xa080, 0x0000), two(0xf180, 0x0f10), "uNuo4/Rn", mcfmac },
3493 {"macw", 4, two(0xa000, 0x0000), two(0xf1b0, 0x0900), "uMumiI", mcfmac },
3494 {"macw", 4, two(0xa000, 0x0200), two(0xf1b0, 0x0900), "uMumMh", mcfmac },
3495 {"macw", 4, two(0xa000, 0x0000), two(0xf1b0, 0x0f00), "uMum", mcfmac },
3497 {"macw", 4, two(0xa000, 0x0000), two(0xf100, 0x0900), "uNuoiI4/RneG", mcfemac },/* Ry,Rx,SF,<ea>,accX. */
3498 {"macw", 4, two(0xa000, 0x0200), two(0xf100, 0x0900), "uNuoMh4/RneG", mcfemac },/* Ry,Rx,+1/-1,<ea>,accX. */
3499 {"macw", 4, two(0xa000, 0x0000), two(0xf100, 0x0f00), "uNuo4/RneG", mcfemac },/* Ry,Rx,<ea>,accX. */
3500 {"macw", 4, two(0xa000, 0x0000), two(0xf130, 0x0900), "uMumiIeH", mcfemac },/* Ry,Rx,SF,accX. */
3501 {"macw", 4, two(0xa000, 0x0200), two(0xf130, 0x0900), "uMumMheH", mcfemac },/* Ry,Rx,+1/-1,accX. */
3502 {"macw", 4, two(0xa000, 0x0000), two(0xf130, 0x0f00), "uMumeH", mcfemac }, /* Ry,Rx,accX. */
3504 {"macl", 4, two(0xa080, 0x0800), two(0xf180, 0x0910), "RNRoiI4/Rn", mcfmac },
3505 {"macl", 4, two(0xa080, 0x0a00), two(0xf180, 0x0910), "RNRoMh4/Rn", mcfmac },
3506 {"macl", 4, two(0xa080, 0x0800), two(0xf180, 0x0f10), "RNRo4/Rn", mcfmac },
3507 {"macl", 4, two(0xa000, 0x0800), two(0xf1b0, 0x0b00), "RMRmiI", mcfmac },
3508 {"macl", 4, two(0xa000, 0x0a00), two(0xf1b0, 0x0b00), "RMRmMh", mcfmac },
3509 {"macl", 4, two(0xa000, 0x0800), two(0xf1b0, 0x0800), "RMRm", mcfmac },
3511 {"macl", 4, two(0xa000, 0x0800), two(0xf100, 0x0900), "R3R1iI4/RneG", mcfemac },
3512 {"macl", 4, two(0xa000, 0x0a00), two(0xf100, 0x0900), "R3R1Mh4/RneG", mcfemac },
3513 {"macl", 4, two(0xa000, 0x0800), two(0xf100, 0x0f00), "R3R14/RneG", mcfemac },
3514 {"macl", 4, two(0xa000, 0x0800), two(0xf130, 0x0900), "RMRmiIeH", mcfemac },
3515 {"macl", 4, two(0xa000, 0x0a00), two(0xf130, 0x0900), "RMRmMheH", mcfemac },
3516 {"macl", 4, two(0xa000, 0x0800), two(0xf130, 0x0f00), "RMRmeH", mcfemac },
3518 /* NOTE: The mcf5200 family programmer's reference manual does not
3519 indicate the byte form of the movea instruction is invalid (as it
3520 is on 68000 family cpus). However, experiments on the 5202 yeild
3521 unexpected results. The value is copied, but it is not sign extended
3522 (as is done with movea.w) and the top three bytes in the address
3523 register are not disturbed. I don't know if this is the intended
3524 behavior --- it could be a hole in instruction decoding (Motorola
3525 decided not to trap all invalid instructions for performance reasons)
3526 --- but I suspect that it is not.
3528 I reported this to Motorola ISD Technical Communications Support,
3529 which replied that other coldfire assemblers reject movea.b. For
3530 this reason I've decided to not allow moveab.
3532 jtc@cygnus.com - 97/01/24. */
3534 {"moveal", 2, one(0020100), one(0170700), "*lAd", m68000up | mcfisa_a },
3535 {"moveaw", 2, one(0030100), one(0170700), "*wAd", m68000up | mcfisa_a },
3537 {"movclrl", 2, one(0xA1C0), one(0xf9f0), "eFRs", mcfemac },
3539 {"movec", 4, one(0047173), one(0177777), "R1Jj", m68010up | mcfisa_a },
3540 {"movec", 4, one(0047173), one(0177777), "R1#j", m68010up | mcfisa_a },
3541 {"movec", 4, one(0047172), one(0177777), "JjR1", m68010up },
3542 {"movec", 4, one(0047172), one(0177777), "#jR1", m68010up },
3544 {"movemw", 4, one(0044200), one(0177700), "Lw&s", m68000up },
3545 {"movemw", 4, one(0044240), one(0177770), "lw-s", m68000up },
3546 {"movemw", 4, one(0044200), one(0177700), "#w>s", m68000up },
3547 {"movemw", 4, one(0046200), one(0177700), "<sLw", m68000up },
3548 {"movemw", 4, one(0046200), one(0177700), "<s#w", m68000up },
3549 {"moveml", 4, one(0044300), one(0177700), "Lw&s", m68000up },
3550 {"moveml", 4, one(0044340), one(0177770), "lw-s", m68000up },
3551 {"moveml", 4, one(0044300), one(0177700), "#w>s", m68000up },
3552 {"moveml", 4, one(0046300), one(0177700), "<sLw", m68000up },
3553 {"moveml", 4, one(0046300), one(0177700), "<s#w", m68000up },
3554 /* FIXME: need specifier for mode 2 and 5 to simplify below insn patterns. */
3555 {"moveml", 4, one(0044320), one(0177770), "Lwas", mcfisa_a },
3556 {"moveml", 4, one(0044320), one(0177770), "#was", mcfisa_a },
3557 {"moveml", 4, one(0044350), one(0177770), "Lwds", mcfisa_a },
3558 {"moveml", 4, one(0044350), one(0177770), "#wds", mcfisa_a },
3559 {"moveml", 4, one(0046320), one(0177770), "asLw", mcfisa_a },
3560 {"moveml", 4, one(0046320), one(0177770), "as#w", mcfisa_a },
3561 {"moveml", 4, one(0046350), one(0177770), "dsLw", mcfisa_a },
3562 {"moveml", 4, one(0046350), one(0177770), "ds#w", mcfisa_a },
3564 {"movepw", 2, one(0000410), one(0170770), "dsDd", m68000up },
3565 {"movepw", 2, one(0000610), one(0170770), "Ddds", m68000up },
3566 {"movepl", 2, one(0000510), one(0170770), "dsDd", m68000up },
3567 {"movepl", 2, one(0000710), one(0170770), "Ddds", m68000up },
3569 {"moveq", 2, one(0070000), one(0170400), "MsDd", m68000up | mcfisa_a },
3570 {"moveq", 2, one(0070000), one(0170400), "#BDd", m68000up | mcfisa_a },
3572 /* The move opcode can generate the movea and moveq instructions. */
3573 {"moveb", 2, one(0010000), one(0170000), ";b$d", m68000up },
3574 {"moveb", 2, one(0010000), one(0170070), "Ds$d", mcfisa_a },
3575 {"moveb", 2, one(0010020), one(0170070), "as$d", mcfisa_a },
3576 {"moveb", 2, one(0010030), one(0170070), "+s$d", mcfisa_a },
3577 {"moveb", 2, one(0010040), one(0170070), "-s$d", mcfisa_a },
3578 {"moveb", 2, one(0010000), one(0170000), "nsqd", mcfisa_a },
3579 {"moveb", 2, one(0010000), one(0170700), "obDd", mcfisa_a },
3580 {"moveb", 2, one(0010200), one(0170700), "obad", mcfisa_a },
3581 {"moveb", 2, one(0010300), one(0170700), "ob+d", mcfisa_a },
3582 {"moveb", 2, one(0010400), one(0170700), "ob-d", mcfisa_a },
3583 {"moveb", 2, one(0010000), one(0170000), "obnd", mcfisa_b },
3585 {"movew", 2, one(0030000), one(0170000), "*w%d", m68000up },
3586 {"movew", 2, one(0030000), one(0170000), "ms%d", mcfisa_a },
3587 {"movew", 2, one(0030000), one(0170000), "nspd", mcfisa_a },
3588 {"movew", 2, one(0030000), one(0170000), "owmd", mcfisa_a },
3589 {"movew", 2, one(0030000), one(0170000), "ownd", mcfisa_b },
3590 {"movew", 2, one(0040300), one(0177700), "Ss$s", m68000up },
3591 {"movew", 2, one(0040300), one(0177770), "SsDs", mcfisa_a },
3592 {"movew", 2, one(0041300), one(0177700), "Cs$s", m68010up },
3593 {"movew", 2, one(0041300), one(0177770), "CsDs", mcfisa_a },
3594 {"movew", 2, one(0042300), one(0177700), ";wCd", m68000up },
3595 {"movew", 2, one(0042300), one(0177700), "DsCd", mcfisa_a },
3596 {"movew", 4, one(0042374), one(0177777), "#wCd", mcfisa_a },
3597 {"movew", 2, one(0043300), one(0177700), ";wSd", m68000up },
3598 {"movew", 2, one(0043300), one(0177700), "DsSd", mcfisa_a },
3599 {"movew", 4, one(0043374), one(0177777), "#wSd", mcfisa_a },
3601 {"movel", 2, one(0070000), one(0170400), "MsDd", m68000up | mcfisa_a },
3602 {"movel", 2, one(0020000), one(0170000), "*l%d", m68000up },
3603 {"movel", 2, one(0020000), one(0170000), "ms%d", mcfisa_a },
3604 {"movel", 2, one(0020000), one(0170000), "nspd", mcfisa_a },
3605 {"movel", 2, one(0020000), one(0170000), "olmd", mcfisa_a },
3606 {"movel", 2, one(0020000), one(0170000), "olnd", mcfisa_b },
3607 {"movel", 2, one(0047140), one(0177770), "AsUd", m68000up | mcfusp },
3608 {"movel", 2, one(0047150), one(0177770), "UdAs", m68000up | mcfusp },
3609 {"movel", 2, one(0120600), one(0177760), "EsRs", mcfmac },
3610 {"movel", 2, one(0120400), one(0177760), "RsEs", mcfmac },
3611 {"movel", 6, one(0120474), one(0177777), "#lEs", mcfmac },
3612 {"movel", 2, one(0124600), one(0177760), "GsRs", mcfmac },
3613 {"movel", 2, one(0124400), one(0177760), "RsGs", mcfmac },
3614 {"movel", 6, one(0124474), one(0177777), "#lGs", mcfmac },
3615 {"movel", 2, one(0126600), one(0177760), "HsRs", mcfmac },
3616 {"movel", 2, one(0126400), one(0177760), "RsHs", mcfmac },
3617 {"movel", 6, one(0126474), one(0177777), "#lHs", mcfmac },
3618 {"movel", 2, one(0124700), one(0177777), "GsCs", mcfmac },
3620 {"movel", 2, one(0xa180), one(0xf9f0), "eFRs", mcfemac }, /* ACCx,Rx. */
3621 {"movel", 2, one(0xab80), one(0xfbf0), "g]Rs", mcfemac }, /* ACCEXTx,Rx. */
3622 {"movel", 2, one(0xa980), one(0xfff0), "G-Rs", mcfemac }, /* macsr,Rx. */
3623 {"movel", 2, one(0xad80), one(0xfff0), "H-Rs", mcfemac }, /* mask,Rx. */
3624 {"movel", 2, one(0xa110), one(0xf9fc), "efeF", mcfemac }, /* ACCy,ACCx. */
3625 {"movel", 2, one(0xa9c0), one(0xffff), "G-C-", mcfemac }, /* macsr,ccr. */
3626 {"movel", 2, one(0xa100), one(0xf9f0), "RseF", mcfemac }, /* Rx,ACCx. */
3627 {"movel", 6, one(0xa13c), one(0xf9ff), "#leF", mcfemac }, /* #,ACCx. */
3628 {"movel", 2, one(0xab00), one(0xfbc0), "Rsg]", mcfemac }, /* Rx,ACCEXTx. */
3629 {"movel", 6, one(0xab3c), one(0xfbff), "#lg]", mcfemac }, /* #,ACCEXTx. */
3630 {"movel", 2, one(0xa900), one(0xffc0), "RsG-", mcfemac }, /* Rx,macsr. */
3631 {"movel", 6, one(0xa93c), one(0xffff), "#lG-", mcfemac }, /* #,macsr. */
3632 {"movel", 2, one(0xad00), one(0xffc0), "RsH-", mcfemac }, /* Rx,mask. */
3633 {"movel", 6, one(0xad3c), one(0xffff), "#lH-", mcfemac }, /* #,mask. */
3635 {"move", 2, one(0030000), one(0170000), "*w%d", m68000up },
3636 {"move", 2, one(0030000), one(0170000), "ms%d", mcfisa_a },
3637 {"move", 2, one(0030000), one(0170000), "nspd", mcfisa_a },
3638 {"move", 2, one(0030000), one(0170000), "owmd", mcfisa_a },
3639 {"move", 2, one(0030000), one(0170000), "ownd", mcfisa_b },
3640 {"move", 2, one(0040300), one(0177700), "Ss$s", m68000up },
3641 {"move", 2, one(0040300), one(0177770), "SsDs", mcfisa_a },
3642 {"move", 2, one(0041300), one(0177700), "Cs$s", m68010up },
3643 {"move", 2, one(0041300), one(0177770), "CsDs", mcfisa_a },
3644 {"move", 2, one(0042300), one(0177700), ";wCd", m68000up },
3645 {"move", 2, one(0042300), one(0177700), "DsCd", mcfisa_a },
3646 {"move", 4, one(0042374), one(0177777), "#wCd", mcfisa_a },
3647 {"move", 2, one(0043300), one(0177700), ";wSd", m68000up },
3648 {"move", 2, one(0043300), one(0177700), "DsSd", mcfisa_a },
3649 {"move", 4, one(0043374), one(0177777), "#wSd", mcfisa_a },
3651 {"move", 2, one(0047140), one(0177770), "AsUd", m68000up },
3652 {"move", 2, one(0047150), one(0177770), "UdAs", m68000up },
3654 {"mov3ql", 2, one(0120500), one(0170700), "xd%s", mcfisa_b },
3655 {"mvsb", 2, one(0070400), one(0170700), "*bDd", mcfisa_b },
3656 {"mvsw", 2, one(0070500), one(0170700), "*wDd", mcfisa_b },
3657 {"mvzb", 2, one(0070600), one(0170700), "*bDd", mcfisa_b },
3658 {"mvzw", 2, one(0070700), one(0170700), "*wDd", mcfisa_b },
3660 {"movesb", 4, two(0007000, 0), two(0177700, 07777), "~sR1", m68010up },
3661 {"movesb", 4, two(0007000, 04000), two(0177700, 07777), "R1~s", m68010up },
3662 {"movesw", 4, two(0007100, 0), two(0177700, 07777), "~sR1", m68010up },
3663 {"movesw", 4, two(0007100, 04000), two(0177700, 07777), "R1~s", m68010up },
3664 {"movesl", 4, two(0007200, 0), two(0177700, 07777), "~sR1", m68010up },
3665 {"movesl", 4, two(0007200, 04000), two(0177700, 07777), "R1~s", m68010up },
3667 {"move16", 4, two(0xf620, 0x8000), two(0xfff8, 0x8fff), "+s+1", m68040up },
3668 {"move16", 2, one(0xf600), one(0xfff8), "+s_L", m68040up },
3669 {"move16", 2, one(0xf608), one(0xfff8), "_L+s", m68040up },
3670 {"move16", 2, one(0xf610), one(0xfff8), "as_L", m68040up },
3671 {"move16", 2, one(0xf618), one(0xfff8), "_Las", m68040up },
3673 {"msacw", 4, two(0xa080, 0x0100), two(0xf180, 0x0910), "uNuoiI4/Rn", mcfmac },
3674 {"msacw", 4, two(0xa080, 0x0300), two(0xf180, 0x0910), "uNuoMh4/Rn", mcfmac },
3675 {"msacw", 4, two(0xa080, 0x0100), two(0xf180, 0x0f10), "uNuo4/Rn", mcfmac },
3676 {"msacw", 4, two(0xa000, 0x0100), two(0xf1b0, 0x0900), "uMumiI", mcfmac },
3677 {"msacw", 4, two(0xa000, 0x0300), two(0xf1b0, 0x0900), "uMumMh", mcfmac },
3678 {"msacw", 4, two(0xa000, 0x0100), two(0xf1b0, 0x0f00), "uMum", mcfmac },
3680 {"msacw", 4, two(0xa000, 0x0100), two(0xf100, 0x0900), "uMumiI4/RneG", mcfemac },/* Ry,Rx,SF,<ea>,accX. */
3681 {"msacw", 4, two(0xa000, 0x0300), two(0xf100, 0x0900), "uMumMh4/RneG", mcfemac },/* Ry,Rx,+1/-1,<ea>,accX. */
3682 {"msacw", 4, two(0xa000, 0x0100), two(0xf100, 0x0f00), "uMum4/RneG", mcfemac },/* Ry,Rx,<ea>,accX. */
3683 {"msacw", 4, two(0xa000, 0x0100), two(0xf130, 0x0900), "uMumiIeH", mcfemac },/* Ry,Rx,SF,accX. */
3684 {"msacw", 4, two(0xa000, 0x0300), two(0xf130, 0x0900), "uMumMheH", mcfemac },/* Ry,Rx,+1/-1,accX. */
3685 {"msacw", 4, two(0xa000, 0x0100), two(0xf130, 0x0f00), "uMumeH", mcfemac }, /* Ry,Rx,accX. */
3687 {"msacl", 4, two(0xa080, 0x0900), two(0xf180, 0x0910), "RNRoiI4/Rn", mcfmac },
3688 {"msacl", 4, two(0xa080, 0x0b00), two(0xf180, 0x0910), "RNRoMh4/Rn", mcfmac },
3689 {"msacl", 4, two(0xa080, 0x0900), two(0xf180, 0x0f10), "RNRo4/Rn", mcfmac },
3690 {"msacl", 4, two(0xa000, 0x0900), two(0xf1b0, 0x0b00), "RMRmiI", mcfmac },
3691 {"msacl", 4, two(0xa000, 0x0b00), two(0xf1b0, 0x0b00), "RMRmMh", mcfmac },
3692 {"msacl", 4, two(0xa000, 0x0900), two(0xf1b0, 0x0800), "RMRm", mcfmac },
3694 {"msacl", 4, two(0xa000, 0x0900), two(0xf100, 0x0900), "R3R1iI4/RneG", mcfemac },
3695 {"msacl", 4, two(0xa000, 0x0b00), two(0xf100, 0x0900), "R3R1Mh4/RneG", mcfemac },
3696 {"msacl", 4, two(0xa000, 0x0900), two(0xf100, 0x0f00), "R3R14/RneG", mcfemac },
3697 {"msacl", 4, two(0xa000, 0x0900), two(0xf130, 0x0900), "RMRmiIeH", mcfemac },
3698 {"msacl", 4, two(0xa000, 0x0b00), two(0xf130, 0x0900), "RMRmMheH", mcfemac },
3699 {"msacl", 4, two(0xa000, 0x0900), two(0xf130, 0x0f00), "RMRmeH", mcfemac },
3701 {"mulsw", 2, one(0140700), one(0170700), ";wDd", m68000up|mcfisa_a },
3702 {"mulsl", 4, two(0046000,004000), two(0177700,0107770), ";lD1", m68020up|cpu32 },
3703 {"mulsl", 4, two(0046000,004000), two(0177700,0107770), "qsD1", mcfisa_a },
3704 {"mulsl", 4, two(0046000,006000), two(0177700,0107770), ";lD3D1",m68020up|cpu32 },
3706 {"muluw", 2, one(0140300), one(0170700), ";wDd", m68000up|mcfisa_a },
3707 {"mulul", 4, two(0046000,000000), two(0177700,0107770), ";lD1", m68020up|cpu32 },
3708 {"mulul", 4, two(0046000,000000), two(0177700,0107770), "qsD1", mcfisa_a },
3709 {"mulul", 4, two(0046000,002000), two(0177700,0107770), ";lD3D1",m68020up|cpu32 },
3711 {"nbcd", 2, one(0044000), one(0177700), "$s", m68000up },
3713 {"negb", 2, one(0042000), one(0177700), "$s", m68000up },
3714 {"negw", 2, one(0042100), one(0177700), "$s", m68000up },
3715 {"negl", 2, one(0042200), one(0177700), "$s", m68000up },
3716 {"negl", 2, one(0042200), one(0177700), "Ds", mcfisa_a},
3718 {"negxb", 2, one(0040000), one(0177700), "$s", m68000up },
3719 {"negxw", 2, one(0040100), one(0177700), "$s", m68000up },
3720 {"negxl", 2, one(0040200), one(0177700), "$s", m68000up },
3721 {"negxl", 2, one(0040200), one(0177700), "Ds", mcfisa_a},
3723 {"nop", 2, one(0047161), one(0177777), "", m68000up | mcfisa_a},
3725 {"notb", 2, one(0043000), one(0177700), "$s", m68000up },
3726 {"notw", 2, one(0043100), one(0177700), "$s", m68000up },
3727 {"notl", 2, one(0043200), one(0177700), "$s", m68000up },
3728 {"notl", 2, one(0043200), one(0177700), "Ds", mcfisa_a},
3730 {"orib", 4, one(0000000), one(0177700), "#b$s", m68000up },
3731 {"orib", 4, one(0000074), one(0177777), "#bCs", m68000up },
3732 {"oriw", 4, one(0000100), one(0177700), "#w$s", m68000up },
3733 {"oriw", 4, one(0000174), one(0177777), "#wSs", m68000up },
3734 {"oril", 6, one(0000200), one(0177700), "#l$s", m68000up },
3735 {"oril", 6, one(0000200), one(0177700), "#lDs", mcfisa_a },
3736 {"ori", 4, one(0000074), one(0177777), "#bCs", m68000up },
3737 {"ori", 4, one(0000100), one(0177700), "#w$s", m68000up },
3738 {"ori", 4, one(0000174), one(0177777), "#wSs", m68000up },
3740 /* The or opcode can generate the ori instruction. */
3741 {"orb", 4, one(0000000), one(0177700), "#b$s", m68000up },
3742 {"orb", 4, one(0000074), one(0177777), "#bCs", m68000up },
3743 {"orb", 2, one(0100000), one(0170700), ";bDd", m68000up },
3744 {"orb", 2, one(0100400), one(0170700), "Dd~s", m68000up },
3745 {"orw", 4, one(0000100), one(0177700), "#w$s", m68000up },
3746 {"orw", 4, one(0000174), one(0177777), "#wSs", m68000up },
3747 {"orw", 2, one(0100100), one(0170700), ";wDd", m68000up },
3748 {"orw", 2, one(0100500), one(0170700), "Dd~s", m68000up },
3749 {"orl", 6, one(0000200), one(0177700), "#l$s", m68000up },
3750 {"orl", 6, one(0000200), one(0177700), "#lDs", mcfisa_a },
3751 {"orl", 2, one(0100200), one(0170700), ";lDd", m68000up | mcfisa_a },
3752 {"orl", 2, one(0100600), one(0170700), "Dd~s", m68000up | mcfisa_a },
3753 {"or", 4, one(0000074), one(0177777), "#bCs", m68000up },
3754 {"or", 4, one(0000100), one(0177700), "#w$s", m68000up },
3755 {"or", 4, one(0000174), one(0177777), "#wSs", m68000up },
3756 {"or", 2, one(0100100), one(0170700), ";wDd", m68000up },
3757 {"or", 2, one(0100500), one(0170700), "Dd~s", m68000up },
3759 {"pack", 4, one(0100500), one(0170770), "DsDd#w", m68020up },
3760 {"pack", 4, one(0100510), one(0170770), "-s-d#w", m68020up },
3762 {"pbac", 2, one(0xf087), one(0xffbf), "Bc", m68851 },
3763 {"pbacw", 2, one(0xf087), one(0xffff), "BW", m68851 },
3764 {"pbas", 2, one(0xf086), one(0xffbf), "Bc", m68851 },
3765 {"pbasw", 2, one(0xf086), one(0xffff), "BW", m68851 },
3766 {"pbbc", 2, one(0xf081), one(0xffbf), "Bc", m68851 },
3767 {"pbbcw", 2, one(0xf081), one(0xffff), "BW", m68851 },
3768 {"pbbs", 2, one(0xf080), one(0xffbf), "Bc", m68851 },
3769 {"pbbsw", 2, one(0xf080), one(0xffff), "BW", m68851 },
3770 {"pbcc", 2, one(0xf08f), one(0xffbf), "Bc", m68851 },
3771 {"pbccw", 2, one(0xf08f), one(0xffff), "BW", m68851 },
3772 {"pbcs", 2, one(0xf08e), one(0xffbf), "Bc", m68851 },
3773 {"pbcsw", 2, one(0xf08e), one(0xffff), "BW", m68851 },
3774 {"pbgc", 2, one(0xf08d), one(0xffbf), "Bc", m68851 },
3775 {"pbgcw", 2, one(0xf08d), one(0xffff), "BW", m68851 },
3776 {"pbgs", 2, one(0xf08c), one(0xffbf), "Bc", m68851 },
3777 {"pbgsw", 2, one(0xf08c), one(0xffff), "BW", m68851 },
3778 {"pbic", 2, one(0xf08b), one(0xffbf), "Bc", m68851 },
3779 {"pbicw", 2, one(0xf08b), one(0xffff), "BW", m68851 },
3780 {"pbis", 2, one(0xf08a), one(0xffbf), "Bc", m68851 },
3781 {"pbisw", 2, one(0xf08a), one(0xffff), "BW", m68851 },
3782 {"pblc", 2, one(0xf083), one(0xffbf), "Bc", m68851 },
3783 {"pblcw", 2, one(0xf083), one(0xffff), "BW", m68851 },
3784 {"pbls", 2, one(0xf082), one(0xffbf), "Bc", m68851 },
3785 {"pblsw", 2, one(0xf082), one(0xffff), "BW", m68851 },
3786 {"pbsc", 2, one(0xf085), one(0xffbf), "Bc", m68851 },
3787 {"pbscw", 2, one(0xf085), one(0xffff), "BW", m68851 },
3788 {"pbss", 2, one(0xf084), one(0xffbf), "Bc", m68851 },
3789 {"pbssw", 2, one(0xf084), one(0xffff), "BW", m68851 },
3790 {"pbwc", 2, one(0xf089), one(0xffbf), "Bc", m68851 },
3791 {"pbwcw", 2, one(0xf089), one(0xffff), "BW", m68851 },
3792 {"pbws", 2, one(0xf088), one(0xffbf), "Bc", m68851 },
3793 {"pbwsw", 2, one(0xf088), one(0xffff), "BW", m68851 },
3795 {"pdbac", 4, two(0xf048, 0x0007), two(0xfff8, 0xffff), "DsBw", m68851 },
3796 {"pdbas", 4, two(0xf048, 0x0006), two(0xfff8, 0xffff), "DsBw", m68851 },
3797 {"pdbbc", 4, two(0xf048, 0x0001), two(0xfff8, 0xffff), "DsBw", m68851 },
3798 {"pdbbs", 4, two(0xf048, 0x0000), two(0xfff8, 0xffff), "DsBw", m68851 },
3799 {"pdbcc", 4, two(0xf048, 0x000f), two(0xfff8, 0xffff), "DsBw", m68851 },
3800 {"pdbcs", 4, two(0xf048, 0x000e), two(0xfff8, 0xffff), "DsBw", m68851 },
3801 {"pdbgc", 4, two(0xf048, 0x000d), two(0xfff8, 0xffff), "DsBw", m68851 },
3802 {"pdbgs", 4, two(0xf048, 0x000c), two(0xfff8, 0xffff), "DsBw", m68851 },
3803 {"pdbic", 4, two(0xf048, 0x000b), two(0xfff8, 0xffff), "DsBw", m68851 },
3804 {"pdbis", 4, two(0xf048, 0x000a), two(0xfff8, 0xffff), "DsBw", m68851 },
3805 {"pdblc", 4, two(0xf048, 0x0003), two(0xfff8, 0xffff), "DsBw", m68851 },
3806 {"pdbls", 4, two(0xf048, 0x0002), two(0xfff8, 0xffff), "DsBw", m68851 },
3807 {"pdbsc", 4, two(0xf048, 0x0005), two(0xfff8, 0xffff), "DsBw", m68851 },
3808 {"pdbss", 4, two(0xf048, 0x0004), two(0xfff8, 0xffff), "DsBw", m68851 },
3809 {"pdbwc", 4, two(0xf048, 0x0009), two(0xfff8, 0xffff), "DsBw", m68851 },
3810 {"pdbws", 4, two(0xf048, 0x0008), two(0xfff8, 0xffff), "DsBw", m68851 },
3812 {"pea", 2, one(0044100), one(0177700), "!s", m68000up|mcfisa_a },
3814 {"pflusha", 2, one(0xf518), one(0xfff8), "", m68040up },
3815 {"pflusha", 4, two(0xf000,0x2400), two(0xffff,0xffff), "", m68030 | m68851 },
3817 {"pflush", 4, two(0xf000,0x3010), two(0xffc0,0xfe10), "T3T9", m68030|m68851 },
3818 {"pflush", 4, two(0xf000,0x3810), two(0xffc0,0xfe10), "T3T9&s", m68030|m68851 },
3819 {"pflush", 4, two(0xf000,0x3008), two(0xffc0,0xfe18), "D3T9", m68030|m68851 },
3820 {"pflush", 4, two(0xf000,0x3808), two(0xffc0,0xfe18), "D3T9&s", m68030|m68851 },
3821 {"pflush", 4, two(0xf000,0x3000), two(0xffc0,0xfe1e), "f3T9", m68030|m68851 },
3822 {"pflush", 4, two(0xf000,0x3800), two(0xffc0,0xfe1e), "f3T9&s", m68030|m68851 },
3823 {"pflush", 2, one(0xf508), one(0xfff8), "as", m68040up },
3824 {"pflush", 2, one(0xf508), one(0xfff8), "As", m68040up },
3826 {"pflushan", 2, one(0xf510), one(0xfff8), "", m68040up },
3827 {"pflushn", 2, one(0xf500), one(0xfff8), "as", m68040up },
3828 {"pflushn", 2, one(0xf500), one(0xfff8), "As", m68040up },
3830 {"pflushr", 4, two(0xf000, 0xa000), two(0xffc0, 0xffff), "|s", m68851 },
3832 {"pflushs", 4, two(0xf000, 0x3410), two(0xfff8, 0xfe10), "T3T9", m68851 },
3833 {"pflushs", 4, two(0xf000, 0x3c10), two(0xfff8, 0xfe10), "T3T9&s", m68851 },
3834 {"pflushs", 4, two(0xf000, 0x3408), two(0xfff8, 0xfe18), "D3T9", m68851 },
3835 {"pflushs", 4, two(0xf000, 0x3c08), two(0xfff8, 0xfe18), "D3T9&s", m68851 },
3836 {"pflushs", 4, two(0xf000, 0x3400), two(0xfff8, 0xfe1e), "f3T9", m68851 },
3837 {"pflushs", 4, two(0xf000, 0x3c00), two(0xfff8, 0xfe1e), "f3T9&s", m68851 },
3839 {"ploadr", 4, two(0xf000,0x2210), two(0xffc0,0xfff0), "T3&s", m68030|m68851 },
3840 {"ploadr", 4, two(0xf000,0x2208), two(0xffc0,0xfff8), "D3&s", m68030|m68851 },
3841 {"ploadr", 4, two(0xf000,0x2200), two(0xffc0,0xfffe), "f3&s", m68030|m68851 },
3842 {"ploadw", 4, two(0xf000,0x2010), two(0xffc0,0xfff0), "T3&s", m68030|m68851 },
3843 {"ploadw", 4, two(0xf000,0x2008), two(0xffc0,0xfff8), "D3&s", m68030|m68851 },
3844 {"ploadw", 4, two(0xf000,0x2000), two(0xffc0,0xfffe), "f3&s", m68030|m68851 },
3846 {"plpar", 2, one(0xf5c8), one(0xfff8), "as", m68060 },
3847 {"plpaw", 2, one(0xf588), one(0xfff8), "as", m68060 },
3849 {"pmove", 4, two(0xf000,0x4000), two(0xffc0,0xffff), "*l08", m68030|m68851 },
3850 {"pmove", 4, two(0xf000,0x5c00), two(0xffc0,0xffff), "*w18", m68851 },
3851 {"pmove", 4, two(0xf000,0x4000), two(0xffc0,0xe3ff), "*b28", m68851 },
3852 {"pmove", 4, two(0xf000,0x4200), two(0xffc0,0xffff), "08%s", m68030|m68851 },
3853 {"pmove", 4, two(0xf000,0x5e00), two(0xffc0,0xffff), "18%s", m68851 },
3854 {"pmove", 4, two(0xf000,0x4200), two(0xffc0,0xe3ff), "28%s", m68851 },
3855 {"pmove", 4, two(0xf000,0x4000), two(0xffc0,0xe3ff), "|sW8", m68030|m68851 },
3856 {"pmove", 4, two(0xf000,0x4200), two(0xffc0,0xe3ff), "W8~s", m68030|m68851 },
3857 {"pmove", 4, two(0xf000,0x6200), two(0xffc0,0xe3e3), "*wX3", m68851 },
3858 {"pmove", 4, two(0xf000,0x6000), two(0xffc0,0xe3e3), "X3%s", m68851 },
3859 {"pmove", 4, two(0xf000,0x6000), two(0xffc0,0xffff), "*wY8", m68030|m68851 },
3860 {"pmove", 4, two(0xf000,0x6200), two(0xffc0,0xffff), "Y8%s", m68030|m68851 },
3861 {"pmove", 4, two(0xf000,0x6600), two(0xffc0,0xffff), "Z8%s", m68851 },
3862 {"pmove", 4, two(0xf000,0x0800), two(0xffc0,0xfbff), "*l38", m68030 },
3863 {"pmove", 4, two(0xf000,0x0a00), two(0xffc0,0xfbff), "38%s", m68030 },
3865 {"pmovefd", 4, two(0xf000, 0x4100), two(0xffc0, 0xe3ff), "*l08", m68030 },
3866 {"pmovefd", 4, two(0xf000, 0x4100), two(0xffc0, 0xe3ff), "|sW8", m68030 },
3867 {"pmovefd", 4, two(0xf000, 0x0900), two(0xffc0, 0xfbff), "*l38", m68030 },
3869 {"prestore", 2, one(0xf140), one(0xffc0), "<s", m68851 },
3871 {"psave", 2, one(0xf100), one(0xffc0), ">s", m68851 },
3873 {"psac", 4, two(0xf040, 0x0007), two(0xffc0, 0xffff), "$s", m68851 },
3874 {"psas", 4, two(0xf040, 0x0006), two(0xffc0, 0xffff), "$s", m68851 },
3875 {"psbc", 4, two(0xf040, 0x0001), two(0xffc0, 0xffff), "$s", m68851 },
3876 {"psbs", 4, two(0xf040, 0x0000), two(0xffc0, 0xffff), "$s", m68851 },
3877 {"pscc", 4, two(0xf040, 0x000f), two(0xffc0, 0xffff), "$s", m68851 },
3878 {"pscs", 4, two(0xf040, 0x000e), two(0xffc0, 0xffff), "$s", m68851 },
3879 {"psgc", 4, two(0xf040, 0x000d), two(0xffc0, 0xffff), "$s", m68851 },
3880 {"psgs", 4, two(0xf040, 0x000c), two(0xffc0, 0xffff), "$s", m68851 },
3881 {"psic", 4, two(0xf040, 0x000b), two(0xffc0, 0xffff), "$s", m68851 },
3882 {"psis", 4, two(0xf040, 0x000a), two(0xffc0, 0xffff), "$s", m68851 },
3883 {"pslc", 4, two(0xf040, 0x0003), two(0xffc0, 0xffff), "$s", m68851 },
3884 {"psls", 4, two(0xf040, 0x0002), two(0xffc0, 0xffff), "$s", m68851 },
3885 {"pssc", 4, two(0xf040, 0x0005), two(0xffc0, 0xffff), "$s", m68851 },
3886 {"psss", 4, two(0xf040, 0x0004), two(0xffc0, 0xffff), "$s", m68851 },
3887 {"pswc", 4, two(0xf040, 0x0009), two(0xffc0, 0xffff), "$s", m68851 },
3888 {"psws", 4, two(0xf040, 0x0008), two(0xffc0, 0xffff), "$s", m68851 },
3890 {"ptestr", 4, two(0xf000,0x8210), two(0xffc0, 0xe3f0), "T3&st8", m68030|m68851 },
3891 {"ptestr", 4, two(0xf000,0x8310), two(0xffc0,0xe310), "T3&st8A9", m68030|m68851 },
3892 {"ptestr", 4, two(0xf000,0x8208), two(0xffc0,0xe3f8), "D3&st8", m68030|m68851 },
3893 {"ptestr", 4, two(0xf000,0x8308), two(0xffc0,0xe318), "D3&st8A9", m68030|m68851 },
3894 {"ptestr", 4, two(0xf000,0x8200), two(0xffc0,0xe3fe), "f3&st8", m68030|m68851 },
3895 {"ptestr", 4, two(0xf000,0x8300), two(0xffc0,0xe31e), "f3&st8A9", m68030|m68851 },
3896 {"ptestr", 2, one(0xf568), one(0xfff8), "as", m68040 },
3898 {"ptestw", 4, two(0xf000,0x8010), two(0xffc0,0xe3f0), "T3&st8", m68030|m68851 },
3899 {"ptestw", 4, two(0xf000,0x8110), two(0xffc0,0xe310), "T3&st8A9", m68030|m68851 },
3900 {"ptestw", 4, two(0xf000,0x8008), two(0xffc0,0xe3f8), "D3&st8", m68030|m68851 },
3901 {"ptestw", 4, two(0xf000,0x8108), two(0xffc0,0xe318), "D3&st8A9", m68030|m68851 },
3902 {"ptestw", 4, two(0xf000,0x8000), two(0xffc0,0xe3fe), "f3&st8", m68030|m68851 },
3903 {"ptestw", 4, two(0xf000,0x8100), two(0xffc0,0xe31e), "f3&st8A9", m68030|m68851 },
3904 {"ptestw", 2, one(0xf548), one(0xfff8), "as", m68040 },
3906 {"ptrapacw", 6, two(0xf07a, 0x0007), two(0xffff, 0xffff), "#w", m68851 },
3907 {"ptrapacl", 6, two(0xf07b, 0x0007), two(0xffff, 0xffff), "#l", m68851 },
3908 {"ptrapac", 4, two(0xf07c, 0x0007), two(0xffff, 0xffff), "", m68851 },
3910 {"ptrapasw", 6, two(0xf07a, 0x0006), two(0xffff, 0xffff), "#w", m68851 },
3911 {"ptrapasl", 6, two(0xf07b, 0x0006), two(0xffff, 0xffff), "#l", m68851 },
3912 {"ptrapas", 4, two(0xf07c, 0x0006), two(0xffff, 0xffff), "", m68851 },
3914 {"ptrapbcw", 6, two(0xf07a, 0x0001), two(0xffff, 0xffff), "#w", m68851 },
3915 {"ptrapbcl", 6, two(0xf07b, 0x0001), two(0xffff, 0xffff), "#l", m68851 },
3916 {"ptrapbc", 4, two(0xf07c, 0x0001), two(0xffff, 0xffff), "", m68851 },
3918 {"ptrapbsw", 6, two(0xf07a, 0x0000), two(0xffff, 0xffff), "#w", m68851 },
3919 {"ptrapbsl", 6, two(0xf07b, 0x0000), two(0xffff, 0xffff), "#l", m68851 },
3920 {"ptrapbs", 4, two(0xf07c, 0x0000), two(0xffff, 0xffff), "", m68851 },
3922 {"ptrapccw", 6, two(0xf07a, 0x000f), two(0xffff, 0xffff), "#w", m68851 },
3923 {"ptrapccl", 6, two(0xf07b, 0x000f), two(0xffff, 0xffff), "#l", m68851 },
3924 {"ptrapcc", 4, two(0xf07c, 0x000f), two(0xffff, 0xffff), "", m68851 },
3926 {"ptrapcsw", 6, two(0xf07a, 0x000e), two(0xffff, 0xffff), "#w", m68851 },
3927 {"ptrapcsl", 6, two(0xf07b, 0x000e), two(0xffff, 0xffff), "#l", m68851 },
3928 {"ptrapcs", 4, two(0xf07c, 0x000e), two(0xffff, 0xffff), "", m68851 },
3930 {"ptrapgcw", 6, two(0xf07a, 0x000d), two(0xffff, 0xffff), "#w", m68851 },
3931 {"ptrapgcl", 6, two(0xf07b, 0x000d), two(0xffff, 0xffff), "#l", m68851 },
3932 {"ptrapgc", 4, two(0xf07c, 0x000d), two(0xffff, 0xffff), "", m68851 },
3934 {"ptrapgsw", 6, two(0xf07a, 0x000c), two(0xffff, 0xffff), "#w", m68851 },
3935 {"ptrapgsl", 6, two(0xf07b, 0x000c), two(0xffff, 0xffff), "#l", m68851 },
3936 {"ptrapgs", 4, two(0xf07c, 0x000c), two(0xffff, 0xffff), "", m68851 },
3938 {"ptrapicw", 6, two(0xf07a, 0x000b), two(0xffff, 0xffff), "#w", m68851 },
3939 {"ptrapicl", 6, two(0xf07b, 0x000b), two(0xffff, 0xffff), "#l", m68851 },
3940 {"ptrapic", 4, two(0xf07c, 0x000b), two(0xffff, 0xffff), "", m68851 },
3942 {"ptrapisw", 6, two(0xf07a, 0x000a), two(0xffff, 0xffff), "#w", m68851 },
3943 {"ptrapisl", 6, two(0xf07b, 0x000a), two(0xffff, 0xffff), "#l", m68851 },
3944 {"ptrapis", 4, two(0xf07c, 0x000a), two(0xffff, 0xffff), "", m68851 },
3946 {"ptraplcw", 6, two(0xf07a, 0x0003), two(0xffff, 0xffff), "#w", m68851 },
3947 {"ptraplcl", 6, two(0xf07b, 0x0003), two(0xffff, 0xffff), "#l", m68851 },
3948 {"ptraplc", 4, two(0xf07c, 0x0003), two(0xffff, 0xffff), "", m68851 },
3950 {"ptraplsw", 6, two(0xf07a, 0x0002), two(0xffff, 0xffff), "#w", m68851 },
3951 {"ptraplsl", 6, two(0xf07b, 0x0002), two(0xffff, 0xffff), "#l", m68851 },
3952 {"ptrapls", 4, two(0xf07c, 0x0002), two(0xffff, 0xffff), "", m68851 },
3954 {"ptrapscw", 6, two(0xf07a, 0x0005), two(0xffff, 0xffff), "#w", m68851 },
3955 {"ptrapscl", 6, two(0xf07b, 0x0005), two(0xffff, 0xffff), "#l", m68851 },
3956 {"ptrapsc", 4, two(0xf07c, 0x0005), two(0xffff, 0xffff), "", m68851 },
3958 {"ptrapssw", 6, two(0xf07a, 0x0004), two(0xffff, 0xffff), "#w", m68851 },
3959 {"ptrapssl", 6, two(0xf07b, 0x0004), two(0xffff, 0xffff), "#l", m68851 },
3960 {"ptrapss", 4, two(0xf07c, 0x0004), two(0xffff, 0xffff), "", m68851 },
3962 {"ptrapwcw", 6, two(0xf07a, 0x0009), two(0xffff, 0xffff), "#w", m68851 },
3963 {"ptrapwcl", 6, two(0xf07b, 0x0009), two(0xffff, 0xffff), "#l", m68851 },
3964 {"ptrapwc", 4, two(0xf07c, 0x0009), two(0xffff, 0xffff), "", m68851 },
3966 {"ptrapwsw", 6, two(0xf07a, 0x0008), two(0xffff, 0xffff), "#w", m68851 },
3967 {"ptrapwsl", 6, two(0xf07b, 0x0008), two(0xffff, 0xffff), "#l", m68851 },
3968 {"ptrapws", 4, two(0xf07c, 0x0008), two(0xffff, 0xffff), "", m68851 },
3970 {"pulse", 2, one(0045314), one(0177777), "", m68060 | mcfisa_a },
3972 {"pvalid", 4, two(0xf000, 0x2800), two(0xffc0, 0xffff), "Vs&s", m68851 },
3973 {"pvalid", 4, two(0xf000, 0x2c00), two(0xffc0, 0xfff8), "A3&s", m68851 },
3975 /* FIXME: don't allow Dw==Dx. */
3976 {"remsl", 4, two(0x4c40, 0x0800), two(0xffc0, 0x8ff8), "qsD3D1", mcfhwdiv },
3977 {"remul", 4, two(0x4c40, 0x0000), two(0xffc0, 0x8ff8), "qsD3D1", mcfhwdiv },
3979 {"reset", 2, one(0047160), one(0177777), "", m68000up },
3981 {"rolb", 2, one(0160430), one(0170770), "QdDs", m68000up },
3982 {"rolb", 2, one(0160470), one(0170770), "DdDs", m68000up },
3983 {"rolw", 2, one(0160530), one(0170770), "QdDs", m68000up },
3984 {"rolw", 2, one(0160570), one(0170770), "DdDs", m68000up },
3985 {"rolw", 2, one(0163700), one(0177700), "~s", m68000up },
3986 {"roll", 2, one(0160630), one(0170770), "QdDs", m68000up },
3987 {"roll", 2, one(0160670), one(0170770), "DdDs", m68000up },
3989 {"rorb", 2, one(0160030), one(0170770), "QdDs", m68000up },
3990 {"rorb", 2, one(0160070), one(0170770), "DdDs", m68000up },
3991 {"rorw", 2, one(0160130), one(0170770), "QdDs", m68000up },
3992 {"rorw", 2, one(0160170), one(0170770), "DdDs", m68000up },
3993 {"rorw", 2, one(0163300), one(0177700), "~s", m68000up },
3994 {"rorl", 2, one(0160230), one(0170770), "QdDs", m68000up },
3995 {"rorl", 2, one(0160270), one(0170770), "DdDs", m68000up },
3997 {"roxlb", 2, one(0160420), one(0170770), "QdDs", m68000up },
3998 {"roxlb", 2, one(0160460), one(0170770), "DdDs", m68000up },
3999 {"roxlw", 2, one(0160520), one(0170770), "QdDs", m68000up },
4000 {"roxlw", 2, one(0160560), one(0170770), "DdDs", m68000up },
4001 {"roxlw", 2, one(0162700), one(0177700), "~s", m68000up },
4002 {"roxll", 2, one(0160620), one(0170770), "QdDs", m68000up },
4003 {"roxll", 2, one(0160660), one(0170770), "DdDs", m68000up },
4005 {"roxrb", 2, one(0160020), one(0170770), "QdDs", m68000up },
4006 {"roxrb", 2, one(0160060), one(0170770), "DdDs", m68000up },
4007 {"roxrw", 2, one(0160120), one(0170770), "QdDs", m68000up },
4008 {"roxrw", 2, one(0160160), one(0170770), "DdDs", m68000up },
4009 {"roxrw", 2, one(0162300), one(0177700), "~s", m68000up },
4010 {"roxrl", 2, one(0160220), one(0170770), "QdDs", m68000up },
4011 {"roxrl", 2, one(0160260), one(0170770), "DdDs", m68000up },
4013 {"rtd", 4, one(0047164), one(0177777), "#w", m68010up },
4015 {"rte", 2, one(0047163), one(0177777), "", m68000up | mcfisa_a },
4017 {"rtm", 2, one(0003300), one(0177760), "Rs", m68020 },
4019 {"rtr", 2, one(0047167), one(0177777), "", m68000up },
4021 {"rts", 2, one(0047165), one(0177777), "", m68000up | mcfisa_a },
4023 {"satsl", 2, one(0046200), one(0177770), "Ds", mcfisa_b },
4025 {"sbcd", 2, one(0100400), one(0170770), "DsDd", m68000up },
4026 {"sbcd", 2, one(0100410), one(0170770), "-s-d", m68000up },
4028 {"scc", 2, one(0052300), one(0177700), "$s", m68000up },
4029 {"scc", 2, one(0052300), one(0177700), "Ds", mcfisa_a },
4030 {"scs", 2, one(0052700), one(0177700), "$s", m68000up },
4031 {"scs", 2, one(0052700), one(0177700), "Ds", mcfisa_a },
4032 {"seq", 2, one(0053700), one(0177700), "$s", m68000up },
4033 {"seq", 2, one(0053700), one(0177700), "Ds", mcfisa_a },
4034 {"sf", 2, one(0050700), one(0177700), "$s", m68000up },
4035 {"sf", 2, one(0050700), one(0177700), "Ds", mcfisa_a },
4036 {"sge", 2, one(0056300), one(0177700), "$s", m68000up },
4037 {"sge", 2, one(0056300), one(0177700), "Ds", mcfisa_a },
4038 {"sgt", 2, one(0057300), one(0177700), "$s", m68000up },
4039 {"sgt", 2, one(0057300), one(0177700), "Ds", mcfisa_a },
4040 {"shi", 2, one(0051300), one(0177700), "$s", m68000up },
4041 {"shi", 2, one(0051300), one(0177700), "Ds", mcfisa_a },
4042 {"sle", 2, one(0057700), one(0177700), "$s", m68000up },
4043 {"sle", 2, one(0057700), one(0177700), "Ds", mcfisa_a },
4044 {"sls", 2, one(0051700), one(0177700), "$s", m68000up },
4045 {"sls", 2, one(0051700), one(0177700), "Ds", mcfisa_a },
4046 {"slt", 2, one(0056700), one(0177700), "$s", m68000up },
4047 {"slt", 2, one(0056700), one(0177700), "Ds", mcfisa_a },
4048 {"smi", 2, one(0055700), one(0177700), "$s", m68000up },
4049 {"smi", 2, one(0055700), one(0177700), "Ds", mcfisa_a },
4050 {"sne", 2, one(0053300), one(0177700), "$s", m68000up },
4051 {"sne", 2, one(0053300), one(0177700), "Ds", mcfisa_a },
4052 {"spl", 2, one(0055300), one(0177700), "$s", m68000up },
4053 {"spl", 2, one(0055300), one(0177700), "Ds", mcfisa_a },
4054 {"st", 2, one(0050300), one(0177700), "$s", m68000up },
4055 {"st", 2, one(0050300), one(0177700), "Ds", mcfisa_a },
4056 {"svc", 2, one(0054300), one(0177700), "$s", m68000up },
4057 {"svc", 2, one(0054300), one(0177700), "Ds", mcfisa_a },
4058 {"svs", 2, one(0054700), one(0177700), "$s", m68000up },
4059 {"svs", 2, one(0054700), one(0177700), "Ds", mcfisa_a },
4061 {"stop", 4, one(0047162), one(0177777), "#w", m68000up | mcfisa_a },
4063 {"strldsr", 4, two(0040347,0043374), two(0177777,0177777), "#w", mcfisa_aa},
4065 {"subal", 2, one(0110700), one(0170700), "*lAd", m68000up | mcfisa_a },
4066 {"subaw", 2, one(0110300), one(0170700), "*wAd", m68000up },
4068 {"subib", 4, one(0002000), one(0177700), "#b$s", m68000up },
4069 {"subiw", 4, one(0002100), one(0177700), "#w$s", m68000up },
4070 {"subil", 6, one(0002200), one(0177700), "#l$s", m68000up },
4071 {"subil", 6, one(0002200), one(0177700), "#lDs", mcfisa_a },
4073 {"subqb", 2, one(0050400), one(0170700), "Qd%s", m68000up },
4074 {"subqw", 2, one(0050500), one(0170700), "Qd%s", m68000up },
4075 {"subql", 2, one(0050600), one(0170700), "Qd%s", m68000up | mcfisa_a },
4077 /* The sub opcode can generate the suba, subi, and subq instructions. */
4078 {"subb", 2, one(0050400), one(0170700), "Qd%s", m68000up },
4079 {"subb", 4, one(0002000), one(0177700), "#b$s", m68000up },
4080 {"subb", 2, one(0110000), one(0170700), ";bDd", m68000up },
4081 {"subb", 2, one(0110400), one(0170700), "Dd~s", m68000up },
4082 {"subw", 2, one(0050500), one(0170700), "Qd%s", m68000up },
4083 {"subw", 4, one(0002100), one(0177700), "#w$s", m68000up },
4084 {"subw", 2, one(0110300), one(0170700), "*wAd", m68000up },
4085 {"subw", 2, one(0110100), one(0170700), "*wDd", m68000up },
4086 {"subw", 2, one(0110500), one(0170700), "Dd~s", m68000up },
4087 {"subl", 2, one(0050600), one(0170700), "Qd%s", m68000up | mcfisa_a },
4088 {"subl", 6, one(0002200), one(0177700), "#l$s", m68000up },
4089 {"subl", 6, one(0002200), one(0177700), "#lDs", mcfisa_a },
4090 {"subl", 2, one(0110700), one(0170700), "*lAd", m68000up | mcfisa_a },
4091 {"subl", 2, one(0110200), one(0170700), "*lDd", m68000up | mcfisa_a },
4092 {"subl", 2, one(0110600), one(0170700), "Dd~s", m68000up | mcfisa_a },
4094 {"subxb", 2, one(0110400), one(0170770), "DsDd", m68000up },
4095 {"subxb", 2, one(0110410), one(0170770), "-s-d", m68000up },
4096 {"subxw", 2, one(0110500), one(0170770), "DsDd", m68000up },
4097 {"subxw", 2, one(0110510), one(0170770), "-s-d", m68000up },
4098 {"subxl", 2, one(0110600), one(0170770), "DsDd", m68000up | mcfisa_a },
4099 {"subxl", 2, one(0110610), one(0170770), "-s-d", m68000up },
4101 {"swap", 2, one(0044100), one(0177770), "Ds", m68000up | mcfisa_a },
4103 /* swbeg and swbegl are magic constants used on sysV68. The compiler
4104 generates them before a switch table. They tell the debugger and
4105 disassembler that a switch table follows. The parameter is the
4106 number of elements in the table. swbeg means that the entries in
4107 the table are word (2 byte) sized, and swbegl means that the
4108 entries in the table are longword (4 byte) sized. */
4109 {"swbeg", 4, one(0045374), one(0177777), "#w", m68000up | mcfisa_a },
4110 {"swbegl", 6, one(0045375), one(0177777), "#l", m68000up | mcfisa_a },
4112 {"tas", 2, one(0045300), one(0177700), "$s", m68000up | mcfisa_b},
4114 #define TBL1(name,insn_size,signed,round,size) \
4115 {name, insn_size, two(0174000, (signed<<11)|(!round<<10)|(size<<6)|0000400), \
4116 two(0177700,0107777), "!sD1", cpu32 }, \
4117 {name, insn_size, two(0174000, (signed<<11)|(!round<<10)|(size<<6)), \
4118 two(0177770,0107770), "DsD3D1", cpu32 }
4119 #define TBL(name1, name2, name3, s, r) \
4120 TBL1(name1, 4, s, r, 0), TBL1(name2, 4, s, r, 1), TBL1(name3, 4, s, r, 2)
4121 TBL("tblsb", "tblsw", "tblsl", 2, 1),
4122 TBL("tblsnb", "tblsnw", "tblsnl", 2, 0),
4123 TBL("tblub", "tbluw", "tblul", 0, 1),
4124 TBL("tblunb", "tblunw", "tblunl", 0, 0),
4126 {"trap", 2, one(0047100), one(0177760), "Ts", m68000up | mcfisa_a },
4128 {"trapcc", 2, one(0052374), one(0177777), "", m68020up | cpu32 },
4129 {"trapcs", 2, one(0052774), one(0177777), "", m68020up | cpu32 },
4130 {"trapeq", 2, one(0053774), one(0177777), "", m68020up | cpu32 },
4131 {"trapf", 2, one(0050774), one(0177777), "", m68020up | cpu32 | mcfisa_a },
4132 {"trapge", 2, one(0056374), one(0177777), "", m68020up | cpu32 },
4133 {"trapgt", 2, one(0057374), one(0177777), "", m68020up | cpu32 },
4134 {"traphi", 2, one(0051374), one(0177777), "", m68020up | cpu32 },
4135 {"traple", 2, one(0057774), one(0177777), "", m68020up | cpu32 },
4136 {"trapls", 2, one(0051774), one(0177777), "", m68020up | cpu32 },
4137 {"traplt", 2, one(0056774), one(0177777), "", m68020up | cpu32 },
4138 {"trapmi", 2, one(0055774), one(0177777), "", m68020up | cpu32 },
4139 {"trapne", 2, one(0053374), one(0177777), "", m68020up | cpu32 },
4140 {"trappl", 2, one(0055374), one(0177777), "", m68020up | cpu32 },
4141 {"trapt", 2, one(0050374), one(0177777), "", m68020up | cpu32 },
4142 {"trapvc", 2, one(0054374), one(0177777), "", m68020up | cpu32 },
4143 {"trapvs", 2, one(0054774), one(0177777), "", m68020up | cpu32 },
4145 {"trapccw", 4, one(0052372), one(0177777), "#w", m68020up|cpu32 },
4146 {"trapcsw", 4, one(0052772), one(0177777), "#w", m68020up|cpu32 },
4147 {"trapeqw", 4, one(0053772), one(0177777), "#w", m68020up|cpu32 },
4148 {"trapfw", 4, one(0050772), one(0177777), "#w", m68020up|cpu32|mcfisa_a},
4149 {"trapgew", 4, one(0056372), one(0177777), "#w", m68020up|cpu32 },
4150 {"trapgtw", 4, one(0057372), one(0177777), "#w", m68020up|cpu32 },
4151 {"traphiw", 4, one(0051372), one(0177777), "#w", m68020up|cpu32 },
4152 {"traplew", 4, one(0057772), one(0177777), "#w", m68020up|cpu32 },
4153 {"traplsw", 4, one(0051772), one(0177777), "#w", m68020up|cpu32 },
4154 {"trapltw", 4, one(0056772), one(0177777), "#w", m68020up|cpu32 },
4155 {"trapmiw", 4, one(0055772), one(0177777), "#w", m68020up|cpu32 },
4156 {"trapnew", 4, one(0053372), one(0177777), "#w", m68020up|cpu32 },
4157 {"trapplw", 4, one(0055372), one(0177777), "#w", m68020up|cpu32 },
4158 {"traptw", 4, one(0050372), one(0177777), "#w", m68020up|cpu32 },
4159 {"trapvcw", 4, one(0054372), one(0177777), "#w", m68020up|cpu32 },
4160 {"trapvsw", 4, one(0054772), one(0177777), "#w", m68020up|cpu32 },
4162 {"trapccl", 6, one(0052373), one(0177777), "#l", m68020up|cpu32 },
4163 {"trapcsl", 6, one(0052773), one(0177777), "#l", m68020up|cpu32 },
4164 {"trapeql", 6, one(0053773), one(0177777), "#l", m68020up|cpu32 },
4165 {"trapfl", 6, one(0050773), one(0177777), "#l", m68020up|cpu32|mcfisa_a},
4166 {"trapgel", 6, one(0056373), one(0177777), "#l", m68020up|cpu32 },
4167 {"trapgtl", 6, one(0057373), one(0177777), "#l", m68020up|cpu32 },
4168 {"traphil", 6, one(0051373), one(0177777), "#l", m68020up|cpu32 },
4169 {"traplel", 6, one(0057773), one(0177777), "#l", m68020up|cpu32 },
4170 {"traplsl", 6, one(0051773), one(0177777), "#l", m68020up|cpu32 },
4171 {"trapltl", 6, one(0056773), one(0177777), "#l", m68020up|cpu32 },
4172 {"trapmil", 6, one(0055773), one(0177777), "#l", m68020up|cpu32 },
4173 {"trapnel", 6, one(0053373), one(0177777), "#l", m68020up|cpu32 },
4174 {"trappll", 6, one(0055373), one(0177777), "#l", m68020up|cpu32 },
4175 {"traptl", 6, one(0050373), one(0177777), "#l", m68020up|cpu32 },
4176 {"trapvcl", 6, one(0054373), one(0177777), "#l", m68020up|cpu32 },
4177 {"trapvsl", 6, one(0054773), one(0177777), "#l", m68020up|cpu32 },
4179 {"trapv", 2, one(0047166), one(0177777), "", m68000up },
4181 {"tstb", 2, one(0045000), one(0177700), ";b", m68020up|cpu32|mcfisa_a },
4182 {"tstb", 2, one(0045000), one(0177700), "$b", m68000up },
4183 {"tstw", 2, one(0045100), one(0177700), "*w", m68020up|cpu32|mcfisa_a },
4184 {"tstw", 2, one(0045100), one(0177700), "$w", m68000up },
4185 {"tstl", 2, one(0045200), one(0177700), "*l", m68020up|cpu32|mcfisa_a },
4186 {"tstl", 2, one(0045200), one(0177700), "$l", m68000up },
4188 {"unlk", 2, one(0047130), one(0177770), "As", m68000up | mcfisa_a },
4190 {"unpk", 4, one(0100600), one(0170770), "DsDd#w", m68020up },
4191 {"unpk", 4, one(0100610), one(0170770), "-s-d#w", m68020up },
4193 {"wddatab", 2, one(0175400), one(0177700), "~s", mcfisa_a },
4194 {"wddataw", 2, one(0175500), one(0177700), "~s", mcfisa_a },
4195 {"wddatal", 2, one(0175600), one(0177700), "~s", mcfisa_a },
4197 {"wdebug", 4, two(0175720, 03), two(0177770, 0xffff), "as", mcfisa_a },
4198 {"wdebug", 4, two(0175750, 03), two(0177770, 0xffff), "ds", mcfisa_a },
4201 const int m68k_numopcodes = sizeof m68k_opcodes / sizeof m68k_opcodes[0];
4203 /* These aliases used to be in the above table, each one duplicating
4204 all of the entries for its primary exactly. This table was
4205 constructed by mechanical processing of the opcode table, with a
4206 small number of tweaks done by hand. There are probably a lot more
4207 aliases above that could be moved down here, except for very minor
4208 differences. */
4210 const struct m68k_opcode_alias m68k_opcode_aliases[] =
4212 { "add", "addw", },
4213 { "adda", "addaw", },
4214 { "addi", "addiw", },
4215 { "addq", "addqw", },
4216 { "addx", "addxw", },
4217 { "asl", "aslw", },
4218 { "asr", "asrw", },
4219 { "bhi", "bhiw", },
4220 { "bls", "blsw", },
4221 { "bcc", "bccw", },
4222 { "bcs", "bcsw", },
4223 { "bne", "bnew", },
4224 { "beq", "beqw", },
4225 { "bvc", "bvcw", },
4226 { "bvs", "bvsw", },
4227 { "bpl", "bplw", },
4228 { "bmi", "bmiw", },
4229 { "bge", "bgew", },
4230 { "blt", "bltw", },
4231 { "bgt", "bgtw", },
4232 { "ble", "blew", },
4233 { "bra", "braw", },
4234 { "bsr", "bsrw", },
4235 { "bhib", "bhis", },
4236 { "blsb", "blss", },
4237 { "bccb", "bccs", },
4238 { "bcsb", "bcss", },
4239 { "bneb", "bnes", },
4240 { "beqb", "beqs", },
4241 { "bvcb", "bvcs", },
4242 { "bvsb", "bvss", },
4243 { "bplb", "bpls", },
4244 { "bmib", "bmis", },
4245 { "bgeb", "bges", },
4246 { "bltb", "blts", },
4247 { "bgtb", "bgts", },
4248 { "bleb", "bles", },
4249 { "brab", "bras", },
4250 { "bsrb", "bsrs", },
4251 { "bhs", "bccw" },
4252 { "bhss", "bccs" },
4253 { "bhsb", "bccs" },
4254 { "bhsw", "bccw" },
4255 { "bhsl", "bccl" },
4256 { "blo", "bcsw" },
4257 { "blos", "bcss" },
4258 { "blob", "bcss" },
4259 { "blow", "bcsw" },
4260 { "blol", "bcsl" },
4261 { "br", "braw", },
4262 { "brs", "bras", },
4263 { "brb", "bras", },
4264 { "brw", "braw", },
4265 { "brl", "bral", },
4266 { "jfnlt", "bcc", }, /* Apparently a sun alias. */
4267 { "jfngt", "ble", }, /* Apparently a sun alias. */
4268 { "jfeq", "beqs", }, /* Apparently a sun alias. */
4269 { "bchgb", "bchg", },
4270 { "bchgl", "bchg", },
4271 { "bclrb", "bclr", },
4272 { "bclrl", "bclr", },
4273 { "bsetb", "bset", },
4274 { "bsetl", "bset", },
4275 { "btstb", "btst", },
4276 { "btstl", "btst", },
4277 { "cas2", "cas2w", },
4278 { "cas", "casw", },
4279 { "chk2", "chk2w", },
4280 { "chk", "chkw", },
4281 { "clr", "clrw", },
4282 { "cmp2", "cmp2w", },
4283 { "cmpa", "cmpaw", },
4284 { "cmpi", "cmpiw", },
4285 { "cmpm", "cmpmw", },
4286 { "cmp", "cmpw", },
4287 { "dbccw", "dbcc", },
4288 { "dbcsw", "dbcs", },
4289 { "dbeqw", "dbeq", },
4290 { "dbfw", "dbf", },
4291 { "dbgew", "dbge", },
4292 { "dbgtw", "dbgt", },
4293 { "dbhiw", "dbhi", },
4294 { "dblew", "dble", },
4295 { "dblsw", "dbls", },
4296 { "dbltw", "dblt", },
4297 { "dbmiw", "dbmi", },
4298 { "dbnew", "dbne", },
4299 { "dbplw", "dbpl", },
4300 { "dbtw", "dbt", },
4301 { "dbvcw", "dbvc", },
4302 { "dbvsw", "dbvs", },
4303 { "dbhs", "dbcc", },
4304 { "dbhsw", "dbcc", },
4305 { "dbra", "dbf", },
4306 { "dbraw", "dbf", },
4307 { "tdivsl", "divsl", },
4308 { "divs", "divsw", },
4309 { "divu", "divuw", },
4310 { "ext", "extw", },
4311 { "extbw", "extw", },
4312 { "extwl", "extl", },
4313 { "fbneq", "fbne", },
4314 { "fbsneq", "fbsne", },
4315 { "fdbneq", "fdbne", },
4316 { "fdbsneq", "fdbsne", },
4317 { "fmovecr", "fmovecrx", },
4318 { "fmovm", "fmovem", },
4319 { "fsneq", "fsne", },
4320 { "fssneq", "fssne", },
4321 { "ftrapneq", "ftrapne", },
4322 { "ftrapsneq", "ftrapsne", },
4323 { "fjneq", "fjne", },
4324 { "fjsneq", "fjsne", },
4325 { "jmpl", "jmp", },
4326 { "jmps", "jmp", },
4327 { "jsrl", "jsr", },
4328 { "jsrs", "jsr", },
4329 { "leal", "lea", },
4330 { "lsl", "lslw", },
4331 { "lsr", "lsrw", },
4332 { "mac", "macw" },
4333 { "movea", "moveaw", },
4334 { "movem", "movemw", },
4335 { "movml", "moveml", },
4336 { "movmw", "movemw", },
4337 { "movm", "movemw", },
4338 { "movep", "movepw", },
4339 { "movpw", "movepw", },
4340 { "moves", "movesw" },
4341 { "muls", "mulsw", },
4342 { "mulu", "muluw", },
4343 { "msac", "msacw" },
4344 { "nbcdb", "nbcd" },
4345 { "neg", "negw", },
4346 { "negx", "negxw", },
4347 { "not", "notw", },
4348 { "peal", "pea", },
4349 { "rol", "rolw", },
4350 { "ror", "rorw", },
4351 { "roxl", "roxlw", },
4352 { "roxr", "roxrw", },
4353 { "sats", "satsl", },
4354 { "sbcdb", "sbcd", },
4355 { "sccb", "scc", },
4356 { "scsb", "scs", },
4357 { "seqb", "seq", },
4358 { "sfb", "sf", },
4359 { "sgeb", "sge", },
4360 { "sgtb", "sgt", },
4361 { "shib", "shi", },
4362 { "sleb", "sle", },
4363 { "slsb", "sls", },
4364 { "sltb", "slt", },
4365 { "smib", "smi", },
4366 { "sneb", "sne", },
4367 { "splb", "spl", },
4368 { "stb", "st", },
4369 { "svcb", "svc", },
4370 { "svsb", "svs", },
4371 { "sfge", "sge", },
4372 { "sfgt", "sgt", },
4373 { "sfle", "sle", },
4374 { "sflt", "slt", },
4375 { "sfneq", "sne", },
4376 { "suba", "subaw", },
4377 { "subi", "subiw", },
4378 { "subq", "subqw", },
4379 { "sub", "subw", },
4380 { "subx", "subxw", },
4381 { "swapw", "swap", },
4382 { "tasb", "tas", },
4383 { "tpcc", "trapcc", },
4384 { "tcc", "trapcc", },
4385 { "tst", "tstw", },
4386 { "jbra", "jra", },
4387 { "jbhi", "jhi", },
4388 { "jbls", "jls", },
4389 { "jbcc", "jcc", },
4390 { "jbcs", "jcs", },
4391 { "jbne", "jne", },
4392 { "jbeq", "jeq", },
4393 { "jbvc", "jvc", },
4394 { "jbvs", "jvs", },
4395 { "jbpl", "jpl", },
4396 { "jbmi", "jmi", },
4397 { "jbge", "jge", },
4398 { "jblt", "jlt", },
4399 { "jbgt", "jgt", },
4400 { "jble", "jle", },
4401 { "movql", "moveq", },
4402 { "moveql", "moveq", },
4403 { "movl", "movel", },
4404 { "movq", "moveq", },
4405 { "moval", "moveal", },
4406 { "movaw", "moveaw", },
4407 { "movb", "moveb", },
4408 { "movc", "movec", },
4409 { "movecl", "movec", },
4410 { "movpl", "movepl", },
4411 { "movw", "movew", },
4412 { "movsb", "movesb", },
4413 { "movsl", "movesl", },
4414 { "movsw", "movesw", },
4415 { "mov3q", "mov3ql", },
4417 { "tdivul", "divul", }, /* For m68k-svr4. */
4418 { "fmovb", "fmoveb", },
4419 { "fsmovb", "fsmoveb", },
4420 { "fdmovb", "fdmoveb", },
4421 { "fmovd", "fmoved", },
4422 { "fsmovd", "fsmoved", },
4423 { "fmovl", "fmovel", },
4424 { "fsmovl", "fsmovel", },
4425 { "fdmovl", "fdmovel", },
4426 { "fmovp", "fmovep", },
4427 { "fsmovp", "fsmovep", },
4428 { "fdmovp", "fdmovep", },
4429 { "fmovs", "fmoves", },
4430 { "fsmovs", "fsmoves", },
4431 { "fdmovs", "fdmoves", },
4432 { "fmovw", "fmovew", },
4433 { "fsmovw", "fsmovew", },
4434 { "fdmovw", "fdmovew", },
4435 { "fmovx", "fmovex", },
4436 { "fsmovx", "fsmovex", },
4437 { "fdmovx", "fdmovex", },
4438 { "fmovcr", "fmovecr", },
4439 { "fmovcrx", "fmovecrx", },
4440 { "ftestb", "ftstb", },
4441 { "ftestd", "ftstd", },
4442 { "ftestl", "ftstl", },
4443 { "ftestp", "ftstp", },
4444 { "ftests", "ftsts", },
4445 { "ftestw", "ftstw", },
4446 { "ftestx", "ftstx", },
4448 { "bitrevl", "bitrev", },
4449 { "byterevl", "byterev", },
4450 { "ff1l", "ff1", },
4454 const int m68k_numaliases =
4455 sizeof m68k_opcode_aliases / sizeof m68k_opcode_aliases[0];
4456 /* **** End of m68k-opc.c */
4457 /* **** floatformat.c from sourceware.org CVS 2005-08-14. */
4458 /* IEEE floating point support routines, for GDB, the GNU Debugger.
4459 Copyright (C) 1991, 1994, 1999, 2000, 2003 Free Software Foundation, Inc.
4461 This file is part of GDB.
4463 This program is free software; you can redistribute it and/or modify
4464 it under the terms of the GNU General Public License as published by
4465 the Free Software Foundation; either version 2 of the License, or
4466 (at your option) any later version.
4468 This program is distributed in the hope that it will be useful,
4469 but WITHOUT ANY WARRANTY; without even the implied warranty of
4470 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4471 GNU General Public License for more details.
4473 You should have received a copy of the GNU General Public License
4474 along with this program; if not, write to the Free Software
4475 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
4477 /* This is needed to pick up the NAN macro on some systems. */
4478 //#define _GNU_SOURCE
4480 #ifndef INFINITY
4481 #ifdef HUGE_VAL
4482 #define INFINITY HUGE_VAL
4483 #else
4484 #define INFINITY (1.0 / 0.0)
4485 #endif
4486 #endif
4488 #ifndef NAN
4489 #define NAN (0.0 / 0.0)
4490 #endif
4492 static unsigned long get_field (const unsigned char *,
4493 enum floatformat_byteorders,
4494 unsigned int,
4495 unsigned int,
4496 unsigned int);
4497 static int floatformat_always_valid (const struct floatformat *fmt,
4498 const char *from);
4500 static int
4501 floatformat_always_valid (const struct floatformat *fmt ATTRIBUTE_UNUSED,
4502 const char *from ATTRIBUTE_UNUSED)
4504 return 1;
4507 /* The odds that CHAR_BIT will be anything but 8 are low enough that I'm not
4508 going to bother with trying to muck around with whether it is defined in
4509 a system header, what we do if not, etc. */
4510 #define FLOATFORMAT_CHAR_BIT 8
4512 /* floatformats for IEEE single and double, big and little endian. */
4513 const struct floatformat floatformat_ieee_single_big =
4515 floatformat_big, 32, 0, 1, 8, 127, 255, 9, 23,
4516 floatformat_intbit_no,
4517 "floatformat_ieee_single_big",
4518 floatformat_always_valid
4520 const struct floatformat floatformat_ieee_single_little =
4522 floatformat_little, 32, 0, 1, 8, 127, 255, 9, 23,
4523 floatformat_intbit_no,
4524 "floatformat_ieee_single_little",
4525 floatformat_always_valid
4527 const struct floatformat floatformat_ieee_double_big =
4529 floatformat_big, 64, 0, 1, 11, 1023, 2047, 12, 52,
4530 floatformat_intbit_no,
4531 "floatformat_ieee_double_big",
4532 floatformat_always_valid
4534 const struct floatformat floatformat_ieee_double_little =
4536 floatformat_little, 64, 0, 1, 11, 1023, 2047, 12, 52,
4537 floatformat_intbit_no,
4538 "floatformat_ieee_double_little",
4539 floatformat_always_valid
4542 /* floatformat for IEEE double, little endian byte order, with big endian word
4543 ordering, as on the ARM. */
4545 const struct floatformat floatformat_ieee_double_littlebyte_bigword =
4547 floatformat_littlebyte_bigword, 64, 0, 1, 11, 1023, 2047, 12, 52,
4548 floatformat_intbit_no,
4549 "floatformat_ieee_double_littlebyte_bigword",
4550 floatformat_always_valid
4553 static int floatformat_i387_ext_is_valid (const struct floatformat *fmt, const char *from);
4555 static int
4556 floatformat_i387_ext_is_valid (const struct floatformat *fmt, const char *from)
4558 /* In the i387 double-extended format, if the exponent is all ones,
4559 then the integer bit must be set. If the exponent is neither 0
4560 nor ~0, the intbit must also be set. Only if the exponent is
4561 zero can it be zero, and then it must be zero. */
4562 unsigned long exponent, int_bit;
4563 const unsigned char *ufrom = (const unsigned char *) from;
4565 exponent = get_field (ufrom, fmt->byteorder, fmt->totalsize,
4566 fmt->exp_start, fmt->exp_len);
4567 int_bit = get_field (ufrom, fmt->byteorder, fmt->totalsize,
4568 fmt->man_start, 1);
4570 if ((exponent == 0) != (int_bit == 0))
4571 return 0;
4572 else
4573 return 1;
4576 const struct floatformat floatformat_i387_ext =
4578 floatformat_little, 80, 0, 1, 15, 0x3fff, 0x7fff, 16, 64,
4579 floatformat_intbit_yes,
4580 "floatformat_i387_ext",
4581 floatformat_i387_ext_is_valid
4583 const struct floatformat floatformat_m68881_ext =
4585 /* Note that the bits from 16 to 31 are unused. */
4586 floatformat_big, 96, 0, 1, 15, 0x3fff, 0x7fff, 32, 64,
4587 floatformat_intbit_yes,
4588 "floatformat_m68881_ext",
4589 floatformat_always_valid
4591 const struct floatformat floatformat_i960_ext =
4593 /* Note that the bits from 0 to 15 are unused. */
4594 floatformat_little, 96, 16, 17, 15, 0x3fff, 0x7fff, 32, 64,
4595 floatformat_intbit_yes,
4596 "floatformat_i960_ext",
4597 floatformat_always_valid
4599 const struct floatformat floatformat_m88110_ext =
4601 floatformat_big, 80, 0, 1, 15, 0x3fff, 0x7fff, 16, 64,
4602 floatformat_intbit_yes,
4603 "floatformat_m88110_ext",
4604 floatformat_always_valid
4606 const struct floatformat floatformat_m88110_harris_ext =
4608 /* Harris uses raw format 128 bytes long, but the number is just an ieee
4609 double, and the last 64 bits are wasted. */
4610 floatformat_big,128, 0, 1, 11, 0x3ff, 0x7ff, 12, 52,
4611 floatformat_intbit_no,
4612 "floatformat_m88110_ext_harris",
4613 floatformat_always_valid
4615 const struct floatformat floatformat_arm_ext_big =
4617 /* Bits 1 to 16 are unused. */
4618 floatformat_big, 96, 0, 17, 15, 0x3fff, 0x7fff, 32, 64,
4619 floatformat_intbit_yes,
4620 "floatformat_arm_ext_big",
4621 floatformat_always_valid
4623 const struct floatformat floatformat_arm_ext_littlebyte_bigword =
4625 /* Bits 1 to 16 are unused. */
4626 floatformat_littlebyte_bigword, 96, 0, 17, 15, 0x3fff, 0x7fff, 32, 64,
4627 floatformat_intbit_yes,
4628 "floatformat_arm_ext_littlebyte_bigword",
4629 floatformat_always_valid
4631 const struct floatformat floatformat_ia64_spill_big =
4633 floatformat_big, 128, 0, 1, 17, 65535, 0x1ffff, 18, 64,
4634 floatformat_intbit_yes,
4635 "floatformat_ia64_spill_big",
4636 floatformat_always_valid
4638 const struct floatformat floatformat_ia64_spill_little =
4640 floatformat_little, 128, 0, 1, 17, 65535, 0x1ffff, 18, 64,
4641 floatformat_intbit_yes,
4642 "floatformat_ia64_spill_little",
4643 floatformat_always_valid
4645 const struct floatformat floatformat_ia64_quad_big =
4647 floatformat_big, 128, 0, 1, 15, 16383, 0x7fff, 16, 112,
4648 floatformat_intbit_no,
4649 "floatformat_ia64_quad_big",
4650 floatformat_always_valid
4652 const struct floatformat floatformat_ia64_quad_little =
4654 floatformat_little, 128, 0, 1, 15, 16383, 0x7fff, 16, 112,
4655 floatformat_intbit_no,
4656 "floatformat_ia64_quad_little",
4657 floatformat_always_valid
4660 /* Extract a field which starts at START and is LEN bits long. DATA and
4661 TOTAL_LEN are the thing we are extracting it from, in byteorder ORDER. */
4662 static unsigned long
4663 get_field (const unsigned char *data, enum floatformat_byteorders order,
4664 unsigned int total_len, unsigned int start, unsigned int len)
4666 unsigned long result;
4667 unsigned int cur_byte;
4668 int cur_bitshift;
4670 /* Start at the least significant part of the field. */
4671 cur_byte = (start + len) / FLOATFORMAT_CHAR_BIT;
4672 if (order == floatformat_little)
4673 cur_byte = (total_len / FLOATFORMAT_CHAR_BIT) - cur_byte - 1;
4674 cur_bitshift =
4675 ((start + len) % FLOATFORMAT_CHAR_BIT) - FLOATFORMAT_CHAR_BIT;
4676 result = *(data + cur_byte) >> (-cur_bitshift);
4677 cur_bitshift += FLOATFORMAT_CHAR_BIT;
4678 if (order == floatformat_little)
4679 ++cur_byte;
4680 else
4681 --cur_byte;
4683 /* Move towards the most significant part of the field. */
4684 while ((unsigned int) cur_bitshift < len)
4686 if (len - cur_bitshift < FLOATFORMAT_CHAR_BIT)
4687 /* This is the last byte; zero out the bits which are not part of
4688 this field. */
4689 result |=
4690 (*(data + cur_byte) & ((1 << (len - cur_bitshift)) - 1))
4691 << cur_bitshift;
4692 else
4693 result |= *(data + cur_byte) << cur_bitshift;
4694 cur_bitshift += FLOATFORMAT_CHAR_BIT;
4695 if (order == floatformat_little)
4696 ++cur_byte;
4697 else
4698 --cur_byte;
4700 return result;
4703 #ifndef min
4704 #define min(a, b) ((a) < (b) ? (a) : (b))
4705 #endif
4707 /* Convert from FMT to a double.
4708 FROM is the address of the extended float.
4709 Store the double in *TO. */
4711 void
4712 floatformat_to_double (const struct floatformat *fmt,
4713 const char *from, double *to)
4715 const unsigned char *ufrom = (const unsigned char *)from;
4716 double dto;
4717 long exponent;
4718 unsigned long mant;
4719 unsigned int mant_bits, mant_off;
4720 int mant_bits_left;
4721 int special_exponent; /* It's a NaN, denorm or zero */
4723 exponent = get_field (ufrom, fmt->byteorder, fmt->totalsize,
4724 fmt->exp_start, fmt->exp_len);
4726 /* If the exponent indicates a NaN, we don't have information to
4727 decide what to do. So we handle it like IEEE, except that we
4728 don't try to preserve the type of NaN. FIXME. */
4729 if ((unsigned long) exponent == fmt->exp_nan)
4731 int nan;
4733 mant_off = fmt->man_start;
4734 mant_bits_left = fmt->man_len;
4735 nan = 0;
4736 while (mant_bits_left > 0)
4738 mant_bits = min (mant_bits_left, 32);
4740 if (get_field (ufrom, fmt->byteorder, fmt->totalsize,
4741 mant_off, mant_bits) != 0)
4743 /* This is a NaN. */
4744 nan = 1;
4745 break;
4748 mant_off += mant_bits;
4749 mant_bits_left -= mant_bits;
4752 /* On certain systems (such as GNU/Linux), the use of the
4753 INFINITY macro below may generate a warning that can not be
4754 silenced due to a bug in GCC (PR preprocessor/11931). The
4755 preprocessor fails to recognise the __extension__ keyword in
4756 conjunction with the GNU/C99 extension for hexadecimal
4757 floating point constants and will issue a warning when
4758 compiling with -pedantic. */
4759 if (nan)
4760 dto = NAN;
4761 else
4762 dto = INFINITY;
4764 if (get_field (ufrom, fmt->byteorder, fmt->totalsize, fmt->sign_start, 1))
4765 dto = -dto;
4767 *to = dto;
4769 return;
4772 mant_bits_left = fmt->man_len;
4773 mant_off = fmt->man_start;
4774 dto = 0.0;
4776 special_exponent = exponent == 0 || (unsigned long) exponent == fmt->exp_nan;
4778 /* Don't bias zero's, denorms or NaNs. */
4779 if (!special_exponent)
4780 exponent -= fmt->exp_bias;
4782 /* Build the result algebraically. Might go infinite, underflow, etc;
4783 who cares. */
4785 /* If this format uses a hidden bit, explicitly add it in now. Otherwise,
4786 increment the exponent by one to account for the integer bit. */
4788 if (!special_exponent)
4790 if (fmt->intbit == floatformat_intbit_no)
4791 dto = ldexp (1.0, exponent);
4792 else
4793 exponent++;
4796 while (mant_bits_left > 0)
4798 mant_bits = min (mant_bits_left, 32);
4800 mant = get_field (ufrom, fmt->byteorder, fmt->totalsize,
4801 mant_off, mant_bits);
4803 /* Handle denormalized numbers. FIXME: What should we do for
4804 non-IEEE formats? */
4805 if (exponent == 0 && mant != 0)
4806 dto += ldexp ((double)mant,
4807 (- fmt->exp_bias
4808 - mant_bits
4809 - (mant_off - fmt->man_start)
4810 + 1));
4811 else
4812 dto += ldexp ((double)mant, exponent - mant_bits);
4813 if (exponent != 0)
4814 exponent -= mant_bits;
4815 mant_off += mant_bits;
4816 mant_bits_left -= mant_bits;
4819 /* Negate it if negative. */
4820 if (get_field (ufrom, fmt->byteorder, fmt->totalsize, fmt->sign_start, 1))
4821 dto = -dto;
4822 *to = dto;
4825 static void put_field (unsigned char *, enum floatformat_byteorders,
4826 unsigned int,
4827 unsigned int,
4828 unsigned int,
4829 unsigned long);
4831 /* Set a field which starts at START and is LEN bits long. DATA and
4832 TOTAL_LEN are the thing we are extracting it from, in byteorder ORDER. */
4833 static void
4834 put_field (unsigned char *data, enum floatformat_byteorders order,
4835 unsigned int total_len, unsigned int start, unsigned int len,
4836 unsigned long stuff_to_put)
4838 unsigned int cur_byte;
4839 int cur_bitshift;
4841 /* Start at the least significant part of the field. */
4842 cur_byte = (start + len) / FLOATFORMAT_CHAR_BIT;
4843 if (order == floatformat_little)
4844 cur_byte = (total_len / FLOATFORMAT_CHAR_BIT) - cur_byte - 1;
4845 cur_bitshift =
4846 ((start + len) % FLOATFORMAT_CHAR_BIT) - FLOATFORMAT_CHAR_BIT;
4847 *(data + cur_byte) &=
4848 ~(((1 << ((start + len) % FLOATFORMAT_CHAR_BIT)) - 1) << (-cur_bitshift));
4849 *(data + cur_byte) |=
4850 (stuff_to_put & ((1 << FLOATFORMAT_CHAR_BIT) - 1)) << (-cur_bitshift);
4851 cur_bitshift += FLOATFORMAT_CHAR_BIT;
4852 if (order == floatformat_little)
4853 ++cur_byte;
4854 else
4855 --cur_byte;
4857 /* Move towards the most significant part of the field. */
4858 while ((unsigned int) cur_bitshift < len)
4860 if (len - cur_bitshift < FLOATFORMAT_CHAR_BIT)
4862 /* This is the last byte. */
4863 *(data + cur_byte) &=
4864 ~((1 << (len - cur_bitshift)) - 1);
4865 *(data + cur_byte) |= (stuff_to_put >> cur_bitshift);
4867 else
4868 *(data + cur_byte) = ((stuff_to_put >> cur_bitshift)
4869 & ((1 << FLOATFORMAT_CHAR_BIT) - 1));
4870 cur_bitshift += FLOATFORMAT_CHAR_BIT;
4871 if (order == floatformat_little)
4872 ++cur_byte;
4873 else
4874 --cur_byte;
4878 /* The converse: convert the double *FROM to an extended float
4879 and store where TO points. Neither FROM nor TO have any alignment
4880 restrictions. */
4882 void
4883 floatformat_from_double (const struct floatformat *fmt,
4884 const double *from, char *to)
4886 double dfrom;
4887 int exponent;
4888 double mant;
4889 unsigned int mant_bits, mant_off;
4890 int mant_bits_left;
4891 unsigned char *uto = (unsigned char *)to;
4893 dfrom = *from;
4894 memset (uto, 0, fmt->totalsize / FLOATFORMAT_CHAR_BIT);
4896 /* If negative, set the sign bit. */
4897 if (dfrom < 0)
4899 put_field (uto, fmt->byteorder, fmt->totalsize, fmt->sign_start, 1, 1);
4900 dfrom = -dfrom;
4903 if (dfrom == 0)
4905 /* 0.0. */
4906 return;
4909 if (dfrom != dfrom)
4911 /* NaN. */
4912 put_field (uto, fmt->byteorder, fmt->totalsize, fmt->exp_start,
4913 fmt->exp_len, fmt->exp_nan);
4914 /* Be sure it's not infinity, but NaN value is irrelevant. */
4915 put_field (uto, fmt->byteorder, fmt->totalsize, fmt->man_start,
4916 32, 1);
4917 return;
4920 if (dfrom + dfrom == dfrom)
4922 /* This can only happen for an infinite value (or zero, which we
4923 already handled above). */
4924 put_field (uto, fmt->byteorder, fmt->totalsize, fmt->exp_start,
4925 fmt->exp_len, fmt->exp_nan);
4926 return;
4929 mant = frexp (dfrom, &exponent);
4930 if (exponent + fmt->exp_bias - 1 > 0)
4931 put_field (uto, fmt->byteorder, fmt->totalsize, fmt->exp_start,
4932 fmt->exp_len, exponent + fmt->exp_bias - 1);
4933 else
4935 /* Handle a denormalized number. FIXME: What should we do for
4936 non-IEEE formats? */
4937 put_field (uto, fmt->byteorder, fmt->totalsize, fmt->exp_start,
4938 fmt->exp_len, 0);
4939 mant = ldexp (mant, exponent + fmt->exp_bias - 1);
4942 mant_bits_left = fmt->man_len;
4943 mant_off = fmt->man_start;
4944 while (mant_bits_left > 0)
4946 unsigned long mant_long;
4947 mant_bits = mant_bits_left < 32 ? mant_bits_left : 32;
4949 mant *= 4294967296.0;
4950 mant_long = (unsigned long)mant;
4951 mant -= mant_long;
4953 /* If the integer bit is implicit, and we are not creating a
4954 denormalized number, then we need to discard it. */
4955 if ((unsigned int) mant_bits_left == fmt->man_len
4956 && fmt->intbit == floatformat_intbit_no
4957 && exponent + fmt->exp_bias - 1 > 0)
4959 mant_long &= 0x7fffffff;
4960 mant_bits -= 1;
4962 else if (mant_bits < 32)
4964 /* The bits we want are in the most significant MANT_BITS bits of
4965 mant_long. Move them to the least significant. */
4966 mant_long >>= 32 - mant_bits;
4969 put_field (uto, fmt->byteorder, fmt->totalsize,
4970 mant_off, mant_bits, mant_long);
4971 mant_off += mant_bits;
4972 mant_bits_left -= mant_bits;
4976 /* Return non-zero iff the data at FROM is a valid number in format FMT. */
4979 floatformat_is_valid (const struct floatformat *fmt, const char *from)
4981 return fmt->is_valid (fmt, from);
4985 #ifdef IEEE_DEBUG
4987 /* This is to be run on a host which uses IEEE floating point. */
4989 void
4990 ieee_test (double n)
4992 double result;
4994 floatformat_to_double (&floatformat_ieee_double_little, (char *) &n,
4995 &result);
4996 if ((n != result && (! isnan (n) || ! isnan (result)))
4997 || (n < 0 && result >= 0)
4998 || (n >= 0 && result < 0))
4999 printf ("Differ(to): %.20g -> %.20g\n", n, result);
5001 floatformat_from_double (&floatformat_ieee_double_little, &n,
5002 (char *) &result);
5003 if ((n != result && (! isnan (n) || ! isnan (result)))
5004 || (n < 0 && result >= 0)
5005 || (n >= 0 && result < 0))
5006 printf ("Differ(from): %.20g -> %.20g\n", n, result);
5008 #if 0
5010 char exten[16];
5012 floatformat_from_double (&floatformat_m68881_ext, &n, exten);
5013 floatformat_to_double (&floatformat_m68881_ext, exten, &result);
5014 if (n != result)
5015 printf ("Differ(to+from): %.20g -> %.20g\n", n, result);
5017 #endif
5019 #if IEEE_DEBUG > 1
5020 /* This is to be run on a host which uses 68881 format. */
5022 long double ex = *(long double *)exten;
5023 if (ex != n)
5024 printf ("Differ(from vs. extended): %.20g\n", n);
5026 #endif
5030 main (void)
5032 ieee_test (0.0);
5033 ieee_test (0.5);
5034 ieee_test (256.0);
5035 ieee_test (0.12345);
5036 ieee_test (234235.78907234);
5037 ieee_test (-512.0);
5038 ieee_test (-0.004321);
5039 ieee_test (1.2E-70);
5040 ieee_test (1.2E-316);
5041 ieee_test (4.9406564584124654E-324);
5042 ieee_test (- 4.9406564584124654E-324);
5043 ieee_test (- 0.0);
5044 ieee_test (- INFINITY);
5045 ieee_test (- NAN);
5046 ieee_test (INFINITY);
5047 ieee_test (NAN);
5048 return 0;
5050 #endif
5051 /* **** End of floatformat.c */