pci-bridge: Turn PCIBridge into abstract QOM type
[qemu/rayw.git] / ioport.c
blob79b7f1ae3846ba2cb8c74774ed92c4f470b81eaa
1 /*
2 * QEMU System Emulator
4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
25 * splitted out ioport related stuffs from vl.c.
28 #include "exec/ioport.h"
29 #include "trace.h"
30 #include "exec/memory.h"
31 #include "exec/address-spaces.h"
33 //#define DEBUG_IOPORT
35 #ifdef DEBUG_IOPORT
36 # define LOG_IOPORT(...) qemu_log_mask(CPU_LOG_IOPORT, ## __VA_ARGS__)
37 #else
38 # define LOG_IOPORT(...) do { } while (0)
39 #endif
41 typedef struct MemoryRegionPortioList {
42 MemoryRegion mr;
43 void *portio_opaque;
44 MemoryRegionPortio ports[];
45 } MemoryRegionPortioList;
47 void cpu_outb(pio_addr_t addr, uint8_t val)
49 LOG_IOPORT("outb: %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
50 trace_cpu_out(addr, val);
51 address_space_write(&address_space_io, addr, &val, 1);
54 void cpu_outw(pio_addr_t addr, uint16_t val)
56 uint8_t buf[2];
58 LOG_IOPORT("outw: %04"FMT_pioaddr" %04"PRIx16"\n", addr, val);
59 trace_cpu_out(addr, val);
60 stw_p(buf, val);
61 address_space_write(&address_space_io, addr, buf, 2);
64 void cpu_outl(pio_addr_t addr, uint32_t val)
66 uint8_t buf[4];
68 LOG_IOPORT("outl: %04"FMT_pioaddr" %08"PRIx32"\n", addr, val);
69 trace_cpu_out(addr, val);
70 stl_p(buf, val);
71 address_space_write(&address_space_io, addr, buf, 4);
74 uint8_t cpu_inb(pio_addr_t addr)
76 uint8_t val;
78 address_space_read(&address_space_io, addr, &val, 1);
79 trace_cpu_in(addr, val);
80 LOG_IOPORT("inb : %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
81 return val;
84 uint16_t cpu_inw(pio_addr_t addr)
86 uint8_t buf[2];
87 uint16_t val;
89 address_space_read(&address_space_io, addr, buf, 2);
90 val = lduw_p(buf);
91 trace_cpu_in(addr, val);
92 LOG_IOPORT("inw : %04"FMT_pioaddr" %04"PRIx16"\n", addr, val);
93 return val;
96 uint32_t cpu_inl(pio_addr_t addr)
98 uint8_t buf[4];
99 uint32_t val;
101 address_space_read(&address_space_io, addr, buf, 4);
102 val = ldl_p(buf);
103 trace_cpu_in(addr, val);
104 LOG_IOPORT("inl : %04"FMT_pioaddr" %08"PRIx32"\n", addr, val);
105 return val;
108 void portio_list_init(PortioList *piolist,
109 Object *owner,
110 const MemoryRegionPortio *callbacks,
111 void *opaque, const char *name)
113 unsigned n = 0;
115 while (callbacks[n].size) {
116 ++n;
119 piolist->ports = callbacks;
120 piolist->nr = 0;
121 piolist->regions = g_new0(MemoryRegion *, n);
122 piolist->address_space = NULL;
123 piolist->opaque = opaque;
124 piolist->owner = owner;
125 piolist->name = name;
128 void portio_list_destroy(PortioList *piolist)
130 g_free(piolist->regions);
133 static const MemoryRegionPortio *find_portio(MemoryRegionPortioList *mrpio,
134 uint64_t offset, unsigned size,
135 bool write)
137 const MemoryRegionPortio *mrp;
139 for (mrp = mrpio->ports; mrp->size; ++mrp) {
140 if (offset >= mrp->offset && offset < mrp->offset + mrp->len &&
141 size == mrp->size &&
142 (write ? (bool)mrp->write : (bool)mrp->read)) {
143 return mrp;
146 return NULL;
149 static uint64_t portio_read(void *opaque, hwaddr addr, unsigned size)
151 MemoryRegionPortioList *mrpio = opaque;
152 const MemoryRegionPortio *mrp = find_portio(mrpio, addr, size, false);
153 uint64_t data;
155 data = ((uint64_t)1 << (size * 8)) - 1;
156 if (mrp) {
157 data = mrp->read(mrpio->portio_opaque, mrp->base + addr);
158 } else if (size == 2) {
159 mrp = find_portio(mrpio, addr, 1, false);
160 assert(mrp);
161 data = mrp->read(mrpio->portio_opaque, mrp->base + addr) |
162 (mrp->read(mrpio->portio_opaque, mrp->base + addr + 1) << 8);
164 return data;
167 static void portio_write(void *opaque, hwaddr addr, uint64_t data,
168 unsigned size)
170 MemoryRegionPortioList *mrpio = opaque;
171 const MemoryRegionPortio *mrp = find_portio(mrpio, addr, size, true);
173 if (mrp) {
174 mrp->write(mrpio->portio_opaque, mrp->base + addr, data);
175 } else if (size == 2) {
176 mrp = find_portio(mrpio, addr, 1, true);
177 assert(mrp);
178 mrp->write(mrpio->portio_opaque, mrp->base + addr, data & 0xff);
179 mrp->write(mrpio->portio_opaque, mrp->base + addr + 1, data >> 8);
183 static const MemoryRegionOps portio_ops = {
184 .read = portio_read,
185 .write = portio_write,
186 .endianness = DEVICE_LITTLE_ENDIAN,
187 .valid.unaligned = true,
188 .impl.unaligned = true,
191 static void portio_list_add_1(PortioList *piolist,
192 const MemoryRegionPortio *pio_init,
193 unsigned count, unsigned start,
194 unsigned off_low, unsigned off_high)
196 MemoryRegionPortioList *mrpio;
197 unsigned i;
199 /* Copy the sub-list and null-terminate it. */
200 mrpio = g_malloc0(sizeof(MemoryRegionPortioList) +
201 sizeof(MemoryRegionPortio) * (count + 1));
202 mrpio->portio_opaque = piolist->opaque;
203 memcpy(mrpio->ports, pio_init, sizeof(MemoryRegionPortio) * count);
204 memset(mrpio->ports + count, 0, sizeof(MemoryRegionPortio));
206 /* Adjust the offsets to all be zero-based for the region. */
207 for (i = 0; i < count; ++i) {
208 mrpio->ports[i].offset -= off_low;
209 mrpio->ports[i].base = start + off_low;
213 * Use an alias so that the callback is called with an absolute address,
214 * rather than an offset relative to to start + off_low.
216 memory_region_init_io(&mrpio->mr, piolist->owner, &portio_ops, mrpio,
217 piolist->name, off_high - off_low);
218 memory_region_add_subregion(piolist->address_space,
219 start + off_low, &mrpio->mr);
220 piolist->regions[piolist->nr] = &mrpio->mr;
221 ++piolist->nr;
224 void portio_list_add(PortioList *piolist,
225 MemoryRegion *address_space,
226 uint32_t start)
228 const MemoryRegionPortio *pio, *pio_start = piolist->ports;
229 unsigned int off_low, off_high, off_last, count;
231 piolist->address_space = address_space;
233 /* Handle the first entry specially. */
234 off_last = off_low = pio_start->offset;
235 off_high = off_low + pio_start->len;
236 count = 1;
238 for (pio = pio_start + 1; pio->size != 0; pio++, count++) {
239 /* All entries must be sorted by offset. */
240 assert(pio->offset >= off_last);
241 off_last = pio->offset;
243 /* If we see a hole, break the region. */
244 if (off_last > off_high) {
245 portio_list_add_1(piolist, pio_start, count, start, off_low,
246 off_high);
247 /* ... and start collecting anew. */
248 pio_start = pio;
249 off_low = off_last;
250 off_high = off_low + pio->len;
251 count = 0;
252 } else if (off_last + pio->len > off_high) {
253 off_high = off_last + pio->len;
257 /* There will always be an open sub-list. */
258 portio_list_add_1(piolist, pio_start, count, start, off_low, off_high);
261 void portio_list_del(PortioList *piolist)
263 MemoryRegionPortioList *mrpio;
264 unsigned i;
266 for (i = 0; i < piolist->nr; ++i) {
267 mrpio = container_of(piolist->regions[i], MemoryRegionPortioList, mr);
268 memory_region_del_subregion(piolist->address_space, &mrpio->mr);
269 memory_region_destroy(&mrpio->mr);
270 g_free(mrpio);
271 piolist->regions[i] = NULL;