arm/xilinx_zynq: Always instantiate the GEMs
[qemu/rayw.git] / target-cris / op_helper.c
blobb580513848bb873910dfa3a72e174bdaabdd9bf0
1 /*
2 * CRIS helper routines
4 * Copyright (c) 2007 AXIS Communications
5 * Written by Edgar E. Iglesias
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
21 #include "cpu.h"
22 #include "mmu.h"
23 #include "helper.h"
24 #include "qemu/host-utils.h"
26 //#define CRIS_OP_HELPER_DEBUG
29 #ifdef CRIS_OP_HELPER_DEBUG
30 #define D(x) x
31 #define D_LOG(...) qemu_log(__VA_ARGS__)
32 #else
33 #define D(x)
34 #define D_LOG(...) do { } while (0)
35 #endif
37 #if !defined(CONFIG_USER_ONLY)
38 #include "exec/softmmu_exec.h"
40 #define MMUSUFFIX _mmu
42 #define SHIFT 0
43 #include "exec/softmmu_template.h"
45 #define SHIFT 1
46 #include "exec/softmmu_template.h"
48 #define SHIFT 2
49 #include "exec/softmmu_template.h"
51 #define SHIFT 3
52 #include "exec/softmmu_template.h"
54 /* Try to fill the TLB and return an exception if error. If retaddr is
55 NULL, it means that the function was called in C code (i.e. not
56 from generated code or from helper.c) */
57 void tlb_fill(CPUCRISState *env, target_ulong addr, int is_write, int mmu_idx,
58 uintptr_t retaddr)
60 int ret;
62 D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__,
63 env->pc, env->pregs[PR_EDA], (void *)retaddr);
64 ret = cpu_cris_handle_mmu_fault(env, addr, is_write, mmu_idx);
65 if (unlikely(ret)) {
66 if (retaddr) {
67 /* now we have a real cpu fault */
68 if (cpu_restore_state(env, retaddr)) {
69 /* Evaluate flags after retranslation. */
70 helper_top_evaluate_flags(env);
73 cpu_loop_exit(env);
77 #endif
79 void helper_raise_exception(CPUCRISState *env, uint32_t index)
81 env->exception_index = index;
82 cpu_loop_exit(env);
85 void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid)
87 #if !defined(CONFIG_USER_ONLY)
88 pid &= 0xff;
89 if (pid != (env->pregs[PR_PID] & 0xff))
90 cris_mmu_flush_pid(env, env->pregs[PR_PID]);
91 #endif
94 void helper_spc_write(CPUCRISState *env, uint32_t new_spc)
96 #if !defined(CONFIG_USER_ONLY)
97 tlb_flush_page(env, env->pregs[PR_SPC]);
98 tlb_flush_page(env, new_spc);
99 #endif
102 void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2)
104 qemu_log("%s: a0=%x a1=%x\n", __func__, a0, a1);
107 /* Used by the tlb decoder. */
108 #define EXTRACT_FIELD(src, start, end) \
109 (((src) >> start) & ((1 << (end - start + 1)) - 1))
111 void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg)
113 uint32_t srs;
114 srs = env->pregs[PR_SRS];
115 srs &= 3;
116 env->sregs[srs][sreg] = env->regs[reg];
118 #if !defined(CONFIG_USER_ONLY)
119 if (srs == 1 || srs == 2) {
120 if (sreg == 6) {
121 /* Writes to tlb-hi write to mm_cause as a side
122 effect. */
123 env->sregs[SFR_RW_MM_TLB_HI] = env->regs[reg];
124 env->sregs[SFR_R_MM_CAUSE] = env->regs[reg];
126 else if (sreg == 5) {
127 uint32_t set;
128 uint32_t idx;
129 uint32_t lo, hi;
130 uint32_t vaddr;
131 int tlb_v;
133 idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
134 set >>= 4;
135 set &= 3;
137 idx &= 15;
138 /* We've just made a write to tlb_lo. */
139 lo = env->sregs[SFR_RW_MM_TLB_LO];
140 /* Writes are done via r_mm_cause. */
141 hi = env->sregs[SFR_R_MM_CAUSE];
143 vaddr = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].hi,
144 13, 31);
145 vaddr <<= TARGET_PAGE_BITS;
146 tlb_v = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].lo,
147 3, 3);
148 env->tlbsets[srs - 1][set][idx].lo = lo;
149 env->tlbsets[srs - 1][set][idx].hi = hi;
151 D_LOG("tlb flush vaddr=%x v=%d pc=%x\n",
152 vaddr, tlb_v, env->pc);
153 if (tlb_v) {
154 tlb_flush_page(env, vaddr);
158 #endif
161 void helper_movl_reg_sreg(CPUCRISState *env, uint32_t reg, uint32_t sreg)
163 uint32_t srs;
164 env->pregs[PR_SRS] &= 3;
165 srs = env->pregs[PR_SRS];
167 #if !defined(CONFIG_USER_ONLY)
168 if (srs == 1 || srs == 2)
170 uint32_t set;
171 uint32_t idx;
172 uint32_t lo, hi;
174 idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
175 set >>= 4;
176 set &= 3;
177 idx &= 15;
179 /* Update the mirror regs. */
180 hi = env->tlbsets[srs - 1][set][idx].hi;
181 lo = env->tlbsets[srs - 1][set][idx].lo;
182 env->sregs[SFR_RW_MM_TLB_HI] = hi;
183 env->sregs[SFR_RW_MM_TLB_LO] = lo;
185 #endif
186 env->regs[reg] = env->sregs[srs][sreg];
189 static void cris_ccs_rshift(CPUCRISState *env)
191 uint32_t ccs;
193 /* Apply the ccs shift. */
194 ccs = env->pregs[PR_CCS];
195 ccs = (ccs & 0xc0000000) | ((ccs & 0x0fffffff) >> 10);
196 if (ccs & U_FLAG)
198 /* Enter user mode. */
199 env->ksp = env->regs[R_SP];
200 env->regs[R_SP] = env->pregs[PR_USP];
203 env->pregs[PR_CCS] = ccs;
206 void helper_rfe(CPUCRISState *env)
208 int rflag = env->pregs[PR_CCS] & R_FLAG;
210 D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
211 env->pregs[PR_ERP], env->pregs[PR_PID],
212 env->pregs[PR_CCS],
213 env->btarget);
215 cris_ccs_rshift(env);
217 /* RFE sets the P_FLAG only if the R_FLAG is not set. */
218 if (!rflag)
219 env->pregs[PR_CCS] |= P_FLAG;
222 void helper_rfn(CPUCRISState *env)
224 int rflag = env->pregs[PR_CCS] & R_FLAG;
226 D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n",
227 env->pregs[PR_ERP], env->pregs[PR_PID],
228 env->pregs[PR_CCS],
229 env->btarget);
231 cris_ccs_rshift(env);
233 /* Set the P_FLAG only if the R_FLAG is not set. */
234 if (!rflag)
235 env->pregs[PR_CCS] |= P_FLAG;
237 /* Always set the M flag. */
238 env->pregs[PR_CCS] |= M_FLAG_V32;
241 uint32_t helper_lz(uint32_t t0)
243 return clz32(t0);
246 uint32_t helper_btst(CPUCRISState *env, uint32_t t0, uint32_t t1, uint32_t ccs)
248 /* FIXME: clean this up. */
250 /* des ref:
251 The N flag is set according to the selected bit in the dest reg.
252 The Z flag is set if the selected bit and all bits to the right are
253 zero.
254 The X flag is cleared.
255 Other flags are left untouched.
256 The destination reg is not affected.*/
257 unsigned int fz, sbit, bset, mask, masked_t0;
259 sbit = t1 & 31;
260 bset = !!(t0 & (1 << sbit));
261 mask = sbit == 31 ? -1 : (1 << (sbit + 1)) - 1;
262 masked_t0 = t0 & mask;
263 fz = !(masked_t0 | bset);
265 /* Clear the X, N and Z flags. */
266 ccs = ccs & ~(X_FLAG | N_FLAG | Z_FLAG);
267 if (env->pregs[PR_VR] < 32)
268 ccs &= ~(V_FLAG | C_FLAG);
269 /* Set the N and Z flags accordingly. */
270 ccs |= (bset << 3) | (fz << 2);
271 return ccs;
274 static inline uint32_t evaluate_flags_writeback(CPUCRISState *env,
275 uint32_t flags, uint32_t ccs)
277 unsigned int x, z, mask;
279 /* Extended arithmetics, leave the z flag alone. */
280 x = env->cc_x;
281 mask = env->cc_mask | X_FLAG;
282 if (x) {
283 z = flags & Z_FLAG;
284 mask = mask & ~z;
286 flags &= mask;
288 /* all insn clear the x-flag except setf or clrf. */
289 ccs &= ~mask;
290 ccs |= flags;
291 return ccs;
294 uint32_t helper_evaluate_flags_muls(CPUCRISState *env,
295 uint32_t ccs, uint32_t res, uint32_t mof)
297 uint32_t flags = 0;
298 int64_t tmp;
299 int dneg;
301 dneg = ((int32_t)res) < 0;
303 tmp = mof;
304 tmp <<= 32;
305 tmp |= res;
306 if (tmp == 0)
307 flags |= Z_FLAG;
308 else if (tmp < 0)
309 flags |= N_FLAG;
310 if ((dneg && mof != -1)
311 || (!dneg && mof != 0))
312 flags |= V_FLAG;
313 return evaluate_flags_writeback(env, flags, ccs);
316 uint32_t helper_evaluate_flags_mulu(CPUCRISState *env,
317 uint32_t ccs, uint32_t res, uint32_t mof)
319 uint32_t flags = 0;
320 uint64_t tmp;
322 tmp = mof;
323 tmp <<= 32;
324 tmp |= res;
325 if (tmp == 0)
326 flags |= Z_FLAG;
327 else if (tmp >> 63)
328 flags |= N_FLAG;
329 if (mof)
330 flags |= V_FLAG;
332 return evaluate_flags_writeback(env, flags, ccs);
335 uint32_t helper_evaluate_flags_mcp(CPUCRISState *env, uint32_t ccs,
336 uint32_t src, uint32_t dst, uint32_t res)
338 uint32_t flags = 0;
340 src = src & 0x80000000;
341 dst = dst & 0x80000000;
343 if ((res & 0x80000000L) != 0L)
345 flags |= N_FLAG;
346 if (!src && !dst)
347 flags |= V_FLAG;
348 else if (src & dst)
349 flags |= R_FLAG;
351 else
353 if (res == 0L)
354 flags |= Z_FLAG;
355 if (src & dst)
356 flags |= V_FLAG;
357 if (dst | src)
358 flags |= R_FLAG;
361 return evaluate_flags_writeback(env, flags, ccs);
364 uint32_t helper_evaluate_flags_alu_4(CPUCRISState *env, uint32_t ccs,
365 uint32_t src, uint32_t dst, uint32_t res)
367 uint32_t flags = 0;
369 src = src & 0x80000000;
370 dst = dst & 0x80000000;
372 if ((res & 0x80000000L) != 0L)
374 flags |= N_FLAG;
375 if (!src && !dst)
376 flags |= V_FLAG;
377 else if (src & dst)
378 flags |= C_FLAG;
380 else
382 if (res == 0L)
383 flags |= Z_FLAG;
384 if (src & dst)
385 flags |= V_FLAG;
386 if (dst | src)
387 flags |= C_FLAG;
390 return evaluate_flags_writeback(env, flags, ccs);
393 uint32_t helper_evaluate_flags_sub_4(CPUCRISState *env, uint32_t ccs,
394 uint32_t src, uint32_t dst, uint32_t res)
396 uint32_t flags = 0;
398 src = (~src) & 0x80000000;
399 dst = dst & 0x80000000;
401 if ((res & 0x80000000L) != 0L)
403 flags |= N_FLAG;
404 if (!src && !dst)
405 flags |= V_FLAG;
406 else if (src & dst)
407 flags |= C_FLAG;
409 else
411 if (res == 0L)
412 flags |= Z_FLAG;
413 if (src & dst)
414 flags |= V_FLAG;
415 if (dst | src)
416 flags |= C_FLAG;
419 flags ^= C_FLAG;
420 return evaluate_flags_writeback(env, flags, ccs);
423 uint32_t helper_evaluate_flags_move_4(CPUCRISState *env,
424 uint32_t ccs, uint32_t res)
426 uint32_t flags = 0;
428 if ((int32_t)res < 0)
429 flags |= N_FLAG;
430 else if (res == 0L)
431 flags |= Z_FLAG;
433 return evaluate_flags_writeback(env, flags, ccs);
435 uint32_t helper_evaluate_flags_move_2(CPUCRISState *env,
436 uint32_t ccs, uint32_t res)
438 uint32_t flags = 0;
440 if ((int16_t)res < 0L)
441 flags |= N_FLAG;
442 else if (res == 0)
443 flags |= Z_FLAG;
445 return evaluate_flags_writeback(env, flags, ccs);
448 /* TODO: This is expensive. We could split things up and only evaluate part of
449 CCR on a need to know basis. For now, we simply re-evaluate everything. */
450 void helper_evaluate_flags(CPUCRISState *env)
452 uint32_t src, dst, res;
453 uint32_t flags = 0;
455 src = env->cc_src;
456 dst = env->cc_dest;
457 res = env->cc_result;
459 if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
460 src = ~src;
462 /* Now, evaluate the flags. This stuff is based on
463 Per Zander's CRISv10 simulator. */
464 switch (env->cc_size)
466 case 1:
467 if ((res & 0x80L) != 0L)
469 flags |= N_FLAG;
470 if (((src & 0x80L) == 0L)
471 && ((dst & 0x80L) == 0L))
473 flags |= V_FLAG;
475 else if (((src & 0x80L) != 0L)
476 && ((dst & 0x80L) != 0L))
478 flags |= C_FLAG;
481 else
483 if ((res & 0xFFL) == 0L)
485 flags |= Z_FLAG;
487 if (((src & 0x80L) != 0L)
488 && ((dst & 0x80L) != 0L))
490 flags |= V_FLAG;
492 if ((dst & 0x80L) != 0L
493 || (src & 0x80L) != 0L)
495 flags |= C_FLAG;
498 break;
499 case 2:
500 if ((res & 0x8000L) != 0L)
502 flags |= N_FLAG;
503 if (((src & 0x8000L) == 0L)
504 && ((dst & 0x8000L) == 0L))
506 flags |= V_FLAG;
508 else if (((src & 0x8000L) != 0L)
509 && ((dst & 0x8000L) != 0L))
511 flags |= C_FLAG;
514 else
516 if ((res & 0xFFFFL) == 0L)
518 flags |= Z_FLAG;
520 if (((src & 0x8000L) != 0L)
521 && ((dst & 0x8000L) != 0L))
523 flags |= V_FLAG;
525 if ((dst & 0x8000L) != 0L
526 || (src & 0x8000L) != 0L)
528 flags |= C_FLAG;
531 break;
532 case 4:
533 if ((res & 0x80000000L) != 0L)
535 flags |= N_FLAG;
536 if (((src & 0x80000000L) == 0L)
537 && ((dst & 0x80000000L) == 0L))
539 flags |= V_FLAG;
541 else if (((src & 0x80000000L) != 0L) &&
542 ((dst & 0x80000000L) != 0L))
544 flags |= C_FLAG;
547 else
549 if (res == 0L)
550 flags |= Z_FLAG;
551 if (((src & 0x80000000L) != 0L)
552 && ((dst & 0x80000000L) != 0L))
553 flags |= V_FLAG;
554 if ((dst & 0x80000000L) != 0L
555 || (src & 0x80000000L) != 0L)
556 flags |= C_FLAG;
558 break;
559 default:
560 break;
563 if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
564 flags ^= C_FLAG;
566 env->pregs[PR_CCS] = evaluate_flags_writeback(env, flags,
567 env->pregs[PR_CCS]);
570 void helper_top_evaluate_flags(CPUCRISState *env)
572 switch (env->cc_op)
574 case CC_OP_MCP:
575 env->pregs[PR_CCS] = helper_evaluate_flags_mcp(env,
576 env->pregs[PR_CCS], env->cc_src,
577 env->cc_dest, env->cc_result);
578 break;
579 case CC_OP_MULS:
580 env->pregs[PR_CCS] = helper_evaluate_flags_muls(env,
581 env->pregs[PR_CCS], env->cc_result,
582 env->pregs[PR_MOF]);
583 break;
584 case CC_OP_MULU:
585 env->pregs[PR_CCS] = helper_evaluate_flags_mulu(env,
586 env->pregs[PR_CCS], env->cc_result,
587 env->pregs[PR_MOF]);
588 break;
589 case CC_OP_MOVE:
590 case CC_OP_AND:
591 case CC_OP_OR:
592 case CC_OP_XOR:
593 case CC_OP_ASR:
594 case CC_OP_LSR:
595 case CC_OP_LSL:
596 switch (env->cc_size)
598 case 4:
599 env->pregs[PR_CCS] =
600 helper_evaluate_flags_move_4(env,
601 env->pregs[PR_CCS],
602 env->cc_result);
603 break;
604 case 2:
605 env->pregs[PR_CCS] =
606 helper_evaluate_flags_move_2(env,
607 env->pregs[PR_CCS],
608 env->cc_result);
609 break;
610 default:
611 helper_evaluate_flags(env);
612 break;
614 break;
615 case CC_OP_FLAGS:
616 /* live. */
617 break;
618 case CC_OP_SUB:
619 case CC_OP_CMP:
620 if (env->cc_size == 4)
621 env->pregs[PR_CCS] =
622 helper_evaluate_flags_sub_4(env,
623 env->pregs[PR_CCS],
624 env->cc_src, env->cc_dest,
625 env->cc_result);
626 else
627 helper_evaluate_flags(env);
628 break;
629 default:
631 switch (env->cc_size)
633 case 4:
634 env->pregs[PR_CCS] =
635 helper_evaluate_flags_alu_4(env,
636 env->pregs[PR_CCS],
637 env->cc_src, env->cc_dest,
638 env->cc_result);
639 break;
640 default:
641 helper_evaluate_flags(env);
642 break;
645 break;