target/loongarch/internals.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * QEMU LoongArch CPU -- internal functions and types
   4  *
   5  * Copyright (c) 2021 Loongson Technology Corporation Limited
   6  */
   7
   8 #ifndef LOONGARCH_INTERNALS_H
   9 #define LOONGARCH_INTERNALS_H
  10
  11 #define FCMP_LT   0b0001  /* fp0 < fp1 */
  12 #define FCMP_EQ   0b0010  /* fp0 = fp1 */
  13 #define FCMP_UN   0b0100  /* unordered */
  14 #define FCMP_GT   0b1000  /* fp0 > fp1 */
  15
  16 #define TARGET_PHYS_MASK MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS)
  17 #define TARGET_VIRT_MASK MAKE_64BIT_MASK(0, TARGET_VIRT_ADDR_SPACE_BITS)
  18
  19 void loongarch_translate_init(void);
  20
  21 void loongarch_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
  22
  23 void G_NORETURN do_raise_exception(CPULoongArchState *env,
  24                                    uint32_t exception,
  25                                    uintptr_t pc);
  26
  27 const char *loongarch_exception_name(int32_t exception);
  28
  29 void restore_fp_status(CPULoongArchState *env);
  30
  31 extern const VMStateDescription vmstate_loongarch_cpu;
  32
  33 void loongarch_cpu_set_irq(void *opaque, int irq, int level);
  34
  35 void loongarch_constant_timer_cb(void *opaque);
  36 uint64_t cpu_loongarch_get_constant_timer_counter(LoongArchCPU *cpu);
  37 uint64_t cpu_loongarch_get_constant_timer_ticks(LoongArchCPU *cpu);
  38 void cpu_loongarch_store_constant_timer_config(LoongArchCPU *cpu,
  39                                                uint64_t value);
  40
  41 bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
  42                             MMUAccessType access_type, int mmu_idx,
  43                             bool probe, uintptr_t retaddr);
  44
  45 hwaddr loongarch_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
  46
  47 #endif