hw/block/nvme: add max_ioqpairs device parameter
[qemu/rayw.git] / hw / block / nvme.h
blob26c38bd913be8524327c4409f77b8ec6420ae0d4
1 #ifndef HW_NVME_H
2 #define HW_NVME_H
4 #include "block/nvme.h"
6 typedef struct NvmeParams {
7 char *serial;
8 uint32_t num_queues; /* deprecated since 5.1 */
9 uint32_t max_ioqpairs;
10 uint32_t cmb_size_mb;
11 } NvmeParams;
13 typedef struct NvmeAsyncEvent {
14 QSIMPLEQ_ENTRY(NvmeAsyncEvent) entry;
15 NvmeAerResult result;
16 } NvmeAsyncEvent;
18 typedef struct NvmeRequest {
19 struct NvmeSQueue *sq;
20 BlockAIOCB *aiocb;
21 uint16_t status;
22 bool has_sg;
23 NvmeCqe cqe;
24 BlockAcctCookie acct;
25 QEMUSGList qsg;
26 QEMUIOVector iov;
27 QTAILQ_ENTRY(NvmeRequest)entry;
28 } NvmeRequest;
30 typedef struct NvmeSQueue {
31 struct NvmeCtrl *ctrl;
32 uint16_t sqid;
33 uint16_t cqid;
34 uint32_t head;
35 uint32_t tail;
36 uint32_t size;
37 uint64_t dma_addr;
38 QEMUTimer *timer;
39 NvmeRequest *io_req;
40 QTAILQ_HEAD(, NvmeRequest) req_list;
41 QTAILQ_HEAD(, NvmeRequest) out_req_list;
42 QTAILQ_ENTRY(NvmeSQueue) entry;
43 } NvmeSQueue;
45 typedef struct NvmeCQueue {
46 struct NvmeCtrl *ctrl;
47 uint8_t phase;
48 uint16_t cqid;
49 uint16_t irq_enabled;
50 uint32_t head;
51 uint32_t tail;
52 uint32_t vector;
53 uint32_t size;
54 uint64_t dma_addr;
55 QEMUTimer *timer;
56 QTAILQ_HEAD(, NvmeSQueue) sq_list;
57 QTAILQ_HEAD(, NvmeRequest) req_list;
58 } NvmeCQueue;
60 typedef struct NvmeNamespace {
61 NvmeIdNs id_ns;
62 } NvmeNamespace;
64 #define TYPE_NVME "nvme"
65 #define NVME(obj) \
66 OBJECT_CHECK(NvmeCtrl, (obj), TYPE_NVME)
68 typedef struct NvmeCtrl {
69 PCIDevice parent_obj;
70 MemoryRegion iomem;
71 MemoryRegion ctrl_mem;
72 NvmeBar bar;
73 BlockConf conf;
74 NvmeParams params;
76 uint32_t page_size;
77 uint16_t page_bits;
78 uint16_t max_prp_ents;
79 uint16_t cqe_size;
80 uint16_t sqe_size;
81 uint32_t reg_size;
82 uint32_t num_namespaces;
83 uint32_t max_q_ents;
84 uint64_t ns_size;
85 uint32_t cmbsz;
86 uint32_t cmbloc;
87 uint8_t *cmbuf;
88 uint32_t irq_status;
89 uint64_t host_timestamp; /* Timestamp sent by the host */
90 uint64_t timestamp_set_qemu_clock_ms; /* QEMU clock time */
92 HostMemoryBackend *pmrdev;
94 NvmeNamespace *namespaces;
95 NvmeSQueue **sq;
96 NvmeCQueue **cq;
97 NvmeSQueue admin_sq;
98 NvmeCQueue admin_cq;
99 NvmeIdCtrl id_ctrl;
100 } NvmeCtrl;
102 #endif /* HW_NVME_H */