ide: fix ATAPI command permissions
[qemu/rayw.git] / cpu-exec.c
blob947e646ae4547967a658f1b0e97ec2e11d41c66a
1 /*
2 * emulator main execution loop
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "config.h"
20 #include "cpu.h"
21 #include "trace.h"
22 #include "disas/disas.h"
23 #include "tcg.h"
24 #include "qemu/atomic.h"
25 #include "sysemu/qtest.h"
26 #include "qemu/timer.h"
27 #include "exec/address-spaces.h"
28 #include "qemu/rcu.h"
29 #include "exec/tb-hash.h"
31 /* -icount align implementation. */
33 typedef struct SyncClocks {
34 int64_t diff_clk;
35 int64_t last_cpu_icount;
36 int64_t realtime_clock;
37 } SyncClocks;
39 #if !defined(CONFIG_USER_ONLY)
40 /* Allow the guest to have a max 3ms advance.
41 * The difference between the 2 clocks could therefore
42 * oscillate around 0.
44 #define VM_CLOCK_ADVANCE 3000000
45 #define THRESHOLD_REDUCE 1.5
46 #define MAX_DELAY_PRINT_RATE 2000000000LL
47 #define MAX_NB_PRINTS 100
49 static void align_clocks(SyncClocks *sc, const CPUState *cpu)
51 int64_t cpu_icount;
53 if (!icount_align_option) {
54 return;
57 cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
58 sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
59 sc->last_cpu_icount = cpu_icount;
61 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
62 #ifndef _WIN32
63 struct timespec sleep_delay, rem_delay;
64 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
65 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
66 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
67 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
68 } else {
69 sc->diff_clk = 0;
71 #else
72 Sleep(sc->diff_clk / SCALE_MS);
73 sc->diff_clk = 0;
74 #endif
78 static void print_delay(const SyncClocks *sc)
80 static float threshold_delay;
81 static int64_t last_realtime_clock;
82 static int nb_prints;
84 if (icount_align_option &&
85 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
86 nb_prints < MAX_NB_PRINTS) {
87 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
88 (-sc->diff_clk / (float)1000000000LL <
89 (threshold_delay - THRESHOLD_REDUCE))) {
90 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
91 printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
92 threshold_delay - 1,
93 threshold_delay);
94 nb_prints++;
95 last_realtime_clock = sc->realtime_clock;
100 static void init_delay_params(SyncClocks *sc,
101 const CPUState *cpu)
103 if (!icount_align_option) {
104 return;
106 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
107 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
108 sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
109 if (sc->diff_clk < max_delay) {
110 max_delay = sc->diff_clk;
112 if (sc->diff_clk > max_advance) {
113 max_advance = sc->diff_clk;
116 /* Print every 2s max if the guest is late. We limit the number
117 of printed messages to NB_PRINT_MAX(currently 100) */
118 print_delay(sc);
120 #else
121 static void align_clocks(SyncClocks *sc, const CPUState *cpu)
125 static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
128 #endif /* CONFIG USER ONLY */
130 /* Execute a TB, and fix up the CPU state afterwards if necessary */
131 static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr)
133 CPUArchState *env = cpu->env_ptr;
134 uintptr_t next_tb;
136 #if defined(DEBUG_DISAS)
137 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
138 #if defined(TARGET_I386)
139 log_cpu_state(cpu, CPU_DUMP_CCOP);
140 #elif defined(TARGET_M68K)
141 /* ??? Should not modify env state for dumping. */
142 cpu_m68k_flush_flags(env, env->cc_op);
143 env->cc_op = CC_OP_FLAGS;
144 env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4);
145 log_cpu_state(cpu, 0);
146 #else
147 log_cpu_state(cpu, 0);
148 #endif
150 #endif /* DEBUG_DISAS */
152 cpu->can_do_io = !use_icount;
153 next_tb = tcg_qemu_tb_exec(env, tb_ptr);
154 cpu->can_do_io = 1;
155 trace_exec_tb_exit((void *) (next_tb & ~TB_EXIT_MASK),
156 next_tb & TB_EXIT_MASK);
158 if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) {
159 /* We didn't start executing this TB (eg because the instruction
160 * counter hit zero); we must restore the guest PC to the address
161 * of the start of the TB.
163 CPUClass *cc = CPU_GET_CLASS(cpu);
164 TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
165 if (cc->synchronize_from_tb) {
166 cc->synchronize_from_tb(cpu, tb);
167 } else {
168 assert(cc->set_pc);
169 cc->set_pc(cpu, tb->pc);
172 if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) {
173 /* We were asked to stop executing TBs (probably a pending
174 * interrupt. We've now stopped, so clear the flag.
176 cpu->tcg_exit_req = 0;
178 return next_tb;
181 /* Execute the code without caching the generated code. An interpreter
182 could be used if available. */
183 static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
184 TranslationBlock *orig_tb)
186 TranslationBlock *tb;
188 /* Should never happen.
189 We only end up here when an existing TB is too long. */
190 if (max_cycles > CF_COUNT_MASK)
191 max_cycles = CF_COUNT_MASK;
193 tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags,
194 max_cycles | CF_NOCACHE);
195 tb->orig_tb = tcg_ctx.tb_ctx.tb_invalidated_flag ? NULL : orig_tb;
196 cpu->current_tb = tb;
197 /* execute the generated code */
198 trace_exec_tb_nocache(tb, tb->pc);
199 cpu_tb_exec(cpu, tb->tc_ptr);
200 cpu->current_tb = NULL;
201 tb_phys_invalidate(tb, -1);
202 tb_free(tb);
205 static TranslationBlock *tb_find_physical(CPUState *cpu,
206 target_ulong pc,
207 target_ulong cs_base,
208 uint64_t flags)
210 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
211 TranslationBlock *tb, **ptb1;
212 unsigned int h;
213 tb_page_addr_t phys_pc, phys_page1;
214 target_ulong virt_page2;
216 tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
218 /* find translated block using physical mappings */
219 phys_pc = get_page_addr_code(env, pc);
220 phys_page1 = phys_pc & TARGET_PAGE_MASK;
221 h = tb_phys_hash_func(phys_pc);
222 ptb1 = &tcg_ctx.tb_ctx.tb_phys_hash[h];
223 for(;;) {
224 tb = *ptb1;
225 if (!tb) {
226 return NULL;
228 if (tb->pc == pc &&
229 tb->page_addr[0] == phys_page1 &&
230 tb->cs_base == cs_base &&
231 tb->flags == flags) {
232 /* check next page if needed */
233 if (tb->page_addr[1] != -1) {
234 tb_page_addr_t phys_page2;
236 virt_page2 = (pc & TARGET_PAGE_MASK) +
237 TARGET_PAGE_SIZE;
238 phys_page2 = get_page_addr_code(env, virt_page2);
239 if (tb->page_addr[1] == phys_page2) {
240 break;
242 } else {
243 break;
246 ptb1 = &tb->phys_hash_next;
249 /* Move the TB to the head of the list */
250 *ptb1 = tb->phys_hash_next;
251 tb->phys_hash_next = tcg_ctx.tb_ctx.tb_phys_hash[h];
252 tcg_ctx.tb_ctx.tb_phys_hash[h] = tb;
253 return tb;
256 static TranslationBlock *tb_find_slow(CPUState *cpu,
257 target_ulong pc,
258 target_ulong cs_base,
259 uint64_t flags)
261 TranslationBlock *tb;
263 tb = tb_find_physical(cpu, pc, cs_base, flags);
264 if (tb) {
265 goto found;
268 #ifdef CONFIG_USER_ONLY
269 /* mmap_lock is needed by tb_gen_code, and mmap_lock must be
270 * taken outside tb_lock. Since we're momentarily dropping
271 * tb_lock, there's a chance that our desired tb has been
272 * translated.
274 tb_unlock();
275 mmap_lock();
276 tb_lock();
277 tb = tb_find_physical(cpu, pc, cs_base, flags);
278 if (tb) {
279 mmap_unlock();
280 goto found;
282 #endif
284 /* if no translated code available, then translate it now */
285 tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
287 #ifdef CONFIG_USER_ONLY
288 mmap_unlock();
289 #endif
291 found:
292 /* we add the TB in the virtual pc hash table */
293 cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb;
294 return tb;
297 static inline TranslationBlock *tb_find_fast(CPUState *cpu)
299 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
300 TranslationBlock *tb;
301 target_ulong cs_base, pc;
302 int flags;
304 /* we record a subset of the CPU state. It will
305 always be the same before a given translated block
306 is executed. */
307 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
308 tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)];
309 if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
310 tb->flags != flags)) {
311 tb = tb_find_slow(cpu, pc, cs_base, flags);
313 return tb;
316 static void cpu_handle_debug_exception(CPUState *cpu)
318 CPUClass *cc = CPU_GET_CLASS(cpu);
319 CPUWatchpoint *wp;
321 if (!cpu->watchpoint_hit) {
322 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
323 wp->flags &= ~BP_WATCHPOINT_HIT;
327 cc->debug_excp_handler(cpu);
330 /* main execution loop */
332 int cpu_exec(CPUState *cpu)
334 CPUClass *cc = CPU_GET_CLASS(cpu);
335 #ifdef TARGET_I386
336 X86CPU *x86_cpu = X86_CPU(cpu);
337 CPUArchState *env = &x86_cpu->env;
338 #endif
339 int ret, interrupt_request;
340 TranslationBlock *tb;
341 uint8_t *tc_ptr;
342 uintptr_t next_tb;
343 SyncClocks sc;
345 if (cpu->halted) {
346 if (!cpu_has_work(cpu)) {
347 return EXCP_HALTED;
350 cpu->halted = 0;
353 current_cpu = cpu;
354 atomic_mb_set(&tcg_current_cpu, cpu);
355 rcu_read_lock();
357 if (unlikely(atomic_mb_read(&exit_request))) {
358 cpu->exit_request = 1;
361 cc->cpu_exec_enter(cpu);
363 /* Calculate difference between guest clock and host clock.
364 * This delay includes the delay of the last cycle, so
365 * what we have to do is sleep until it is 0. As for the
366 * advance/delay we gain here, we try to fix it next time.
368 init_delay_params(&sc, cpu);
370 /* prepare setjmp context for exception handling */
371 for(;;) {
372 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
373 /* if an exception is pending, we execute it here */
374 if (cpu->exception_index >= 0) {
375 if (cpu->exception_index >= EXCP_INTERRUPT) {
376 /* exit request from the cpu execution loop */
377 ret = cpu->exception_index;
378 if (ret == EXCP_DEBUG) {
379 cpu_handle_debug_exception(cpu);
381 cpu->exception_index = -1;
382 break;
383 } else {
384 #if defined(CONFIG_USER_ONLY)
385 /* if user mode only, we simulate a fake exception
386 which will be handled outside the cpu execution
387 loop */
388 #if defined(TARGET_I386)
389 cc->do_interrupt(cpu);
390 #endif
391 ret = cpu->exception_index;
392 cpu->exception_index = -1;
393 break;
394 #else
395 cc->do_interrupt(cpu);
396 cpu->exception_index = -1;
397 #endif
401 next_tb = 0; /* force lookup of first TB */
402 for(;;) {
403 interrupt_request = cpu->interrupt_request;
404 if (unlikely(interrupt_request)) {
405 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
406 /* Mask out external interrupts for this step. */
407 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
409 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
410 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
411 cpu->exception_index = EXCP_DEBUG;
412 cpu_loop_exit(cpu);
414 if (interrupt_request & CPU_INTERRUPT_HALT) {
415 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
416 cpu->halted = 1;
417 cpu->exception_index = EXCP_HLT;
418 cpu_loop_exit(cpu);
420 #if defined(TARGET_I386)
421 if (interrupt_request & CPU_INTERRUPT_INIT) {
422 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);
423 do_cpu_init(x86_cpu);
424 cpu->exception_index = EXCP_HALTED;
425 cpu_loop_exit(cpu);
427 #else
428 if (interrupt_request & CPU_INTERRUPT_RESET) {
429 cpu_reset(cpu);
431 #endif
432 /* The target hook has 3 exit conditions:
433 False when the interrupt isn't processed,
434 True when it is, and we should restart on a new TB,
435 and via longjmp via cpu_loop_exit. */
436 if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
437 next_tb = 0;
439 /* Don't use the cached interrupt_request value,
440 do_interrupt may have updated the EXITTB flag. */
441 if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) {
442 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
443 /* ensure that no TB jump will be modified as
444 the program flow was changed */
445 next_tb = 0;
448 if (unlikely(cpu->exit_request)) {
449 cpu->exit_request = 0;
450 cpu->exception_index = EXCP_INTERRUPT;
451 cpu_loop_exit(cpu);
453 tb_lock();
454 tb = tb_find_fast(cpu);
455 /* Note: we do it here to avoid a gcc bug on Mac OS X when
456 doing it in tb_find_slow */
457 if (tcg_ctx.tb_ctx.tb_invalidated_flag) {
458 /* as some TB could have been invalidated because
459 of memory exceptions while generating the code, we
460 must recompute the hash index here */
461 next_tb = 0;
462 tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
464 if (qemu_loglevel_mask(CPU_LOG_EXEC)) {
465 qemu_log("Trace %p [" TARGET_FMT_lx "] %s\n",
466 tb->tc_ptr, tb->pc, lookup_symbol(tb->pc));
468 /* see if we can patch the calling TB. When the TB
469 spans two pages, we cannot safely do a direct
470 jump. */
471 if (next_tb != 0 && tb->page_addr[1] == -1) {
472 tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK),
473 next_tb & TB_EXIT_MASK, tb);
475 tb_unlock();
476 if (likely(!cpu->exit_request)) {
477 trace_exec_tb(tb, tb->pc);
478 tc_ptr = tb->tc_ptr;
479 /* execute the generated code */
480 cpu->current_tb = tb;
481 next_tb = cpu_tb_exec(cpu, tc_ptr);
482 cpu->current_tb = NULL;
483 switch (next_tb & TB_EXIT_MASK) {
484 case TB_EXIT_REQUESTED:
485 /* Something asked us to stop executing
486 * chained TBs; just continue round the main
487 * loop. Whatever requested the exit will also
488 * have set something else (eg exit_request or
489 * interrupt_request) which we will handle
490 * next time around the loop. But we need to
491 * ensure the tcg_exit_req read in generated code
492 * comes before the next read of cpu->exit_request
493 * or cpu->interrupt_request.
495 smp_rmb();
496 next_tb = 0;
497 break;
498 case TB_EXIT_ICOUNT_EXPIRED:
500 /* Instruction counter expired. */
501 int insns_left = cpu->icount_decr.u32;
502 if (cpu->icount_extra && insns_left >= 0) {
503 /* Refill decrementer and continue execution. */
504 cpu->icount_extra += insns_left;
505 insns_left = MIN(0xffff, cpu->icount_extra);
506 cpu->icount_extra -= insns_left;
507 cpu->icount_decr.u16.low = insns_left;
508 } else {
509 if (insns_left > 0) {
510 /* Execute remaining instructions. */
511 tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
512 cpu_exec_nocache(cpu, insns_left, tb);
513 align_clocks(&sc, cpu);
515 cpu->exception_index = EXCP_INTERRUPT;
516 next_tb = 0;
517 cpu_loop_exit(cpu);
519 break;
521 default:
522 break;
525 /* Try to align the host and virtual clocks
526 if the guest is in advance */
527 align_clocks(&sc, cpu);
528 /* reset soft MMU for next block (it can currently
529 only be set by a memory fault) */
530 } /* for(;;) */
531 } else {
532 /* Reload env after longjmp - the compiler may have smashed all
533 * local variables as longjmp is marked 'noreturn'. */
534 cpu = current_cpu;
535 cc = CPU_GET_CLASS(cpu);
536 cpu->can_do_io = 1;
537 #ifdef TARGET_I386
538 x86_cpu = X86_CPU(cpu);
539 env = &x86_cpu->env;
540 #endif
541 tb_lock_reset();
543 } /* for(;;) */
545 cc->cpu_exec_exit(cpu);
546 rcu_read_unlock();
548 /* fail safe : never use current_cpu outside cpu_exec() */
549 current_cpu = NULL;
551 /* Does not need atomic_mb_set because a spurious wakeup is okay. */
552 atomic_set(&tcg_current_cpu, NULL);
553 return ret;