2 * QEMU PowerPC 405 evaluation boards emulation
4 * Copyright (c) 2007 Jocelyn Mayer
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 #include "qemu/osdep.h"
26 #include "qemu/units.h"
27 #include "qapi/error.h"
28 #include "qemu/datadir.h"
30 #include "hw/ppc/ppc.h"
31 #include "hw/qdev-properties.h"
32 #include "hw/sysbus.h"
34 #include "hw/rtc/m48t59.h"
35 #include "hw/block/flash.h"
36 #include "sysemu/qtest.h"
37 #include "sysemu/reset.h"
38 #include "sysemu/block-backend.h"
39 #include "hw/boards.h"
40 #include "qemu/error-report.h"
41 #include "hw/loader.h"
42 #include "qemu/cutils.h"
45 #define BIOS_FILENAME "ppc405_rom.bin"
46 #define BIOS_SIZE (2 * MiB)
48 #define KERNEL_LOAD_ADDR 0x01000000
49 #define INITRD_LOAD_ADDR 0x01800000
51 #define USE_FLASH_BIOS
53 /*****************************************************************************/
54 /* PPC405EP reference board (IBM) */
55 /* Standalone board with:
57 * - SDRAM (0x00000000)
58 * - Flash (0xFFF80000)
60 * - NVRAM (0xF0000000)
63 typedef struct ref405ep_fpga_t ref405ep_fpga_t
;
64 struct ref405ep_fpga_t
{
69 static uint64_t ref405ep_fpga_readb(void *opaque
, hwaddr addr
, unsigned size
)
71 ref405ep_fpga_t
*fpga
;
90 static void ref405ep_fpga_writeb(void *opaque
, hwaddr addr
, uint64_t value
,
93 ref405ep_fpga_t
*fpga
;
108 static const MemoryRegionOps ref405ep_fpga_ops
= {
109 .read
= ref405ep_fpga_readb
,
110 .write
= ref405ep_fpga_writeb
,
111 .impl
.min_access_size
= 1,
112 .impl
.max_access_size
= 1,
113 .valid
.min_access_size
= 1,
114 .valid
.max_access_size
= 4,
115 .endianness
= DEVICE_BIG_ENDIAN
,
118 static void ref405ep_fpga_reset (void *opaque
)
120 ref405ep_fpga_t
*fpga
;
127 static void ref405ep_fpga_init(MemoryRegion
*sysmem
, uint32_t base
)
129 ref405ep_fpga_t
*fpga
;
130 MemoryRegion
*fpga_memory
= g_new(MemoryRegion
, 1);
132 fpga
= g_new0(ref405ep_fpga_t
, 1);
133 memory_region_init_io(fpga_memory
, NULL
, &ref405ep_fpga_ops
, fpga
,
135 memory_region_add_subregion(sysmem
, base
, fpga_memory
);
136 qemu_register_reset(&ref405ep_fpga_reset
, fpga
);
140 * CPU reset handler when booting directly from a loaded kernel
142 static struct boot_info
{
145 uint32_t initrd_base
;
146 uint32_t initrd_size
;
147 uint32_t cmdline_base
;
148 uint32_t cmdline_size
;
151 static void main_cpu_reset(void *opaque
)
153 PowerPCCPU
*cpu
= opaque
;
154 CPUPPCState
*env
= &cpu
->env
;
155 struct boot_info
*bi
= env
->load_info
;
159 /* stack: top of sram */
160 env
->gpr
[1] = PPC405EP_SRAM_BASE
+ PPC405EP_SRAM_SIZE
- 8;
162 /* Tune our boot state */
163 env
->gpr
[3] = bi
->bdloc
;
164 env
->gpr
[4] = bi
->initrd_base
;
165 env
->gpr
[5] = bi
->initrd_base
+ bi
->initrd_size
;
166 env
->gpr
[6] = bi
->cmdline_base
;
167 env
->gpr
[7] = bi
->cmdline_size
;
169 env
->nip
= bi
->entry
;
172 static void boot_from_kernel(MachineState
*machine
, PowerPCCPU
*cpu
)
174 CPUPPCState
*env
= &cpu
->env
;
183 bdloc
= ppc405_set_bootinfo(env
, machine
->ram_size
);
184 boot_info
.bdloc
= bdloc
;
186 kernel_size
= load_elf(machine
->kernel_filename
, NULL
, NULL
, NULL
,
187 &boot_entry
, &kernel_base
, NULL
, NULL
,
188 1, PPC_ELF_MACHINE
, 0, 0);
189 if (kernel_size
< 0) {
190 error_report("Could not load kernel '%s' : %s",
191 machine
->kernel_filename
, load_elf_strerror(kernel_size
));
194 boot_info
.entry
= boot_entry
;
197 if (machine
->initrd_filename
) {
198 initrd_base
= INITRD_LOAD_ADDR
;
199 initrd_size
= load_image_targphys(machine
->initrd_filename
, initrd_base
,
200 machine
->ram_size
- initrd_base
);
201 if (initrd_size
< 0) {
202 error_report("could not load initial ram disk '%s'",
203 machine
->initrd_filename
);
207 boot_info
.initrd_base
= initrd_base
;
208 boot_info
.initrd_size
= initrd_size
;
211 if (machine
->kernel_cmdline
) {
212 len
= strlen(machine
->kernel_cmdline
);
213 bdloc
-= ((len
+ 255) & ~255);
214 cpu_physical_memory_write(bdloc
, machine
->kernel_cmdline
, len
+ 1);
215 boot_info
.cmdline_base
= bdloc
;
216 boot_info
.cmdline_size
= bdloc
+ len
;
219 /* Install our custom reset handler to start from Linux */
220 qemu_register_reset(main_cpu_reset
, cpu
);
221 env
->load_info
= &boot_info
;
224 static void ref405ep_init(MachineState
*machine
)
226 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
227 const char *kernel_filename
= machine
->kernel_filename
;
231 MemoryRegion
*sram
= g_new(MemoryRegion
, 1);
232 MemoryRegion
*ram_memories
= g_new(MemoryRegion
, 2);
233 hwaddr ram_bases
[2], ram_sizes
[2];
234 MemoryRegion
*sysmem
= get_system_memory();
237 if (machine
->ram_size
!= mc
->default_ram_size
) {
238 char *sz
= size_to_str(mc
->default_ram_size
);
239 error_report("Invalid RAM size, should be %s", sz
);
245 memory_region_init_alias(&ram_memories
[0], NULL
, "ef405ep.ram.alias",
246 machine
->ram
, 0, machine
->ram_size
);
248 ram_sizes
[0] = machine
->ram_size
;
249 memory_region_init(&ram_memories
[1], NULL
, "ef405ep.ram1", 0);
250 ram_bases
[1] = 0x00000000;
251 ram_sizes
[1] = 0x00000000;
253 cpu
= ppc405ep_init(sysmem
, ram_memories
, ram_bases
, ram_sizes
,
254 33333333, &uicdev
, kernel_filename
== NULL
? 0 : 1);
257 memory_region_init_ram(sram
, NULL
, "ef405ep.sram", PPC405EP_SRAM_SIZE
,
259 memory_region_add_subregion(sysmem
, PPC405EP_SRAM_BASE
, sram
);
261 /* allocate and load BIOS */
262 if (machine
->firmware
) {
263 MemoryRegion
*bios
= g_new(MemoryRegion
, 1);
264 g_autofree
char *filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
,
268 memory_region_init_rom(bios
, NULL
, "ef405ep.bios", BIOS_SIZE
,
272 error_report("Could not find firmware '%s'", machine
->firmware
);
276 bios_size
= load_image_size(filename
,
277 memory_region_get_ram_ptr(bios
),
280 error_report("Could not load PowerPC BIOS '%s'", machine
->firmware
);
284 bios_size
= (bios_size
+ 0xfff) & ~0xfff;
285 memory_region_add_subregion(sysmem
, (uint32_t)(-bios_size
), bios
);
289 ref405ep_fpga_init(sysmem
, PPC405EP_FPGA_BASE
);
291 dev
= qdev_new("sysbus-m48t08");
292 qdev_prop_set_int32(dev
, "base-year", 1968);
293 s
= SYS_BUS_DEVICE(dev
);
294 sysbus_realize_and_unref(s
, &error_fatal
);
295 sysbus_mmio_map(s
, 0, PPC405EP_NVRAM_BASE
);
297 /* Load kernel and initrd using U-Boot images */
298 if (kernel_filename
&& machine
->firmware
) {
299 target_ulong kernel_base
, initrd_base
;
300 long kernel_size
, initrd_size
;
302 kernel_base
= KERNEL_LOAD_ADDR
;
303 kernel_size
= load_image_targphys(kernel_filename
, kernel_base
,
304 machine
->ram_size
- kernel_base
);
305 if (kernel_size
< 0) {
306 error_report("could not load kernel '%s'", kernel_filename
);
311 if (machine
->initrd_filename
) {
312 initrd_base
= INITRD_LOAD_ADDR
;
313 initrd_size
= load_image_targphys(machine
->initrd_filename
,
315 machine
->ram_size
- initrd_base
);
316 if (initrd_size
< 0) {
317 error_report("could not load initial ram disk '%s'",
318 machine
->initrd_filename
);
323 /* Load ELF kernel and rootfs.cpio */
324 } else if (kernel_filename
&& !machine
->firmware
) {
325 boot_from_kernel(machine
, cpu
);
329 static void ref405ep_class_init(ObjectClass
*oc
, void *data
)
331 MachineClass
*mc
= MACHINE_CLASS(oc
);
333 mc
->desc
= "ref405ep";
334 mc
->init
= ref405ep_init
;
335 mc
->default_ram_size
= 0x08000000;
336 mc
->default_ram_id
= "ef405ep.ram";
339 static const TypeInfo ref405ep_type
= {
340 .name
= MACHINE_TYPE_NAME("ref405ep"),
341 .parent
= TYPE_MACHINE
,
342 .class_init
= ref405ep_class_init
,
345 /*****************************************************************************/
346 /* AMCC Taihu evaluation board */
347 /* - PowerPC 405EP processor
348 * - SDRAM 128 MB at 0x00000000
349 * - Boot flash 2 MB at 0xFFE00000
350 * - Application flash 32 MB at 0xFC000000
353 * - 1 USB 1.1 device 0x50000000
354 * - 1 LCD display 0x50100000
355 * - 1 CPLD 0x50100000
357 * - 1 I2C thermal sensor
359 * - bit-bang SPI port using GPIOs
360 * - 1 EBC interface connector 0 0x50200000
361 * - 1 cardbus controller + expansion slot.
362 * - 1 PCI expansion slot.
364 typedef struct taihu_cpld_t taihu_cpld_t
;
365 struct taihu_cpld_t
{
370 static uint64_t taihu_cpld_read(void *opaque
, hwaddr addr
, unsigned size
)
391 static void taihu_cpld_write(void *opaque
, hwaddr addr
,
392 uint64_t value
, unsigned size
)
409 static const MemoryRegionOps taihu_cpld_ops
= {
410 .read
= taihu_cpld_read
,
411 .write
= taihu_cpld_write
,
413 .min_access_size
= 1,
414 .max_access_size
= 1,
416 .endianness
= DEVICE_NATIVE_ENDIAN
,
419 static void taihu_cpld_reset (void *opaque
)
428 static void taihu_cpld_init(MemoryRegion
*sysmem
, uint32_t base
)
431 MemoryRegion
*cpld_memory
= g_new(MemoryRegion
, 1);
433 cpld
= g_new0(taihu_cpld_t
, 1);
434 memory_region_init_io(cpld_memory
, NULL
, &taihu_cpld_ops
, cpld
, "cpld", 0x100);
435 memory_region_add_subregion(sysmem
, base
, cpld_memory
);
436 qemu_register_reset(&taihu_cpld_reset
, cpld
);
439 static void taihu_405ep_init(MachineState
*machine
)
441 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
442 const char *bios_name
= machine
->firmware
?: BIOS_FILENAME
;
443 const char *kernel_filename
= machine
->kernel_filename
;
444 const char *initrd_filename
= machine
->initrd_filename
;
446 MemoryRegion
*sysmem
= get_system_memory();
448 MemoryRegion
*ram_memories
= g_new(MemoryRegion
, 2);
449 hwaddr ram_bases
[2], ram_sizes
[2];
451 target_ulong kernel_base
, initrd_base
;
452 long kernel_size
, initrd_size
;
458 if (machine
->ram_size
!= mc
->default_ram_size
) {
459 char *sz
= size_to_str(mc
->default_ram_size
);
460 error_report("Invalid RAM size, should be %s", sz
);
466 ram_sizes
[0] = 0x04000000;
467 memory_region_init_alias(&ram_memories
[0], NULL
,
468 "taihu_405ep.ram-0", machine
->ram
, ram_bases
[0],
470 ram_bases
[1] = 0x04000000;
471 ram_sizes
[1] = 0x04000000;
472 memory_region_init_alias(&ram_memories
[1], NULL
,
473 "taihu_405ep.ram-1", machine
->ram
, ram_bases
[1],
475 ppc405ep_init(sysmem
, ram_memories
, ram_bases
, ram_sizes
,
476 33333333, &uicdev
, kernel_filename
== NULL
? 0 : 1);
477 /* allocate and load BIOS */
479 #if defined(USE_FLASH_BIOS)
480 dinfo
= drive_get(IF_PFLASH
, 0, fl_idx
);
483 pflash_cfi02_register(0xFFE00000,
484 "taihu_405ep.bios", bios_size
,
485 blk_by_legacy_dinfo(dinfo
),
487 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
493 bios
= g_new(MemoryRegion
, 1);
494 memory_region_init_rom(bios
, NULL
, "taihu_405ep.bios", BIOS_SIZE
,
496 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
498 bios_size
= load_image_size(filename
,
499 memory_region_get_ram_ptr(bios
),
503 error_report("Could not load PowerPC BIOS '%s'", bios_name
);
506 bios_size
= (bios_size
+ 0xfff) & ~0xfff;
507 memory_region_add_subregion(sysmem
, (uint32_t)(-bios_size
), bios
);
508 } else if (!qtest_enabled()) {
509 error_report("Could not load PowerPC BIOS '%s'", bios_name
);
513 /* Register Linux flash */
514 dinfo
= drive_get(IF_PFLASH
, 0, fl_idx
);
516 bios_size
= 32 * MiB
;
517 pflash_cfi02_register(0xfc000000, "taihu_405ep.flash", bios_size
,
518 blk_by_legacy_dinfo(dinfo
),
520 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
524 /* Register CLPD & LCD display */
525 taihu_cpld_init(sysmem
, 0x50100000);
527 linux_boot
= (kernel_filename
!= NULL
);
529 kernel_base
= KERNEL_LOAD_ADDR
;
530 /* now we can load the kernel */
531 kernel_size
= load_image_targphys(kernel_filename
, kernel_base
,
532 machine
->ram_size
- kernel_base
);
533 if (kernel_size
< 0) {
534 error_report("could not load kernel '%s'", kernel_filename
);
538 if (initrd_filename
) {
539 initrd_base
= INITRD_LOAD_ADDR
;
540 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
541 machine
->ram_size
- initrd_base
);
542 if (initrd_size
< 0) {
543 error_report("could not load initial ram disk '%s'",
559 static void taihu_class_init(ObjectClass
*oc
, void *data
)
561 MachineClass
*mc
= MACHINE_CLASS(oc
);
564 mc
->init
= taihu_405ep_init
;
565 mc
->default_ram_size
= 0x08000000;
566 mc
->default_ram_id
= "taihu_405ep.ram";
567 mc
->deprecation_reason
= "incomplete, use 'ref405ep' instead";
570 static const TypeInfo taihu_type
= {
571 .name
= MACHINE_TYPE_NAME("taihu"),
572 .parent
= TYPE_MACHINE
,
573 .class_init
= taihu_class_init
,
576 static void ppc405_machine_init(void)
578 type_register_static(&ref405ep_type
);
579 type_register_static(&taihu_type
);
582 type_init(ppc405_machine_init
)