include/hw/arm/aspeed_soc.h

   1 /*
   2  * ASPEED SoC family
   3  *
   4  * Andrew Jeffery <andrew@aj.id.au>
   5  *
   6  * Copyright 2016 IBM Corp.
   7  *
   8  * This code is licensed under the GPL version 2 or later.  See
   9  * the COPYING file in the top-level directory.
  10  */
  11
  12 #ifndef ASPEED_SOC_H
  13 #define ASPEED_SOC_H
  14
  15 #include "hw/intc/aspeed_vic.h"
  16 #include "hw/misc/aspeed_scu.h"
  17 #include "hw/misc/aspeed_sdmc.h"
  18 #include "hw/timer/aspeed_timer.h"
  19 #include "hw/i2c/aspeed_i2c.h"
  20 #include "hw/ssi/aspeed_smc.h"
  21 #include "hw/watchdog/wdt_aspeed.h"
  22 #include "hw/net/ftgmac100.h"
  23
  24 #define ASPEED_SPIS_NUM  2
  25 #define ASPEED_WDTS_NUM  3
  26
  27 typedef struct AspeedSoCState {
  28     /*< private >*/
  29     DeviceState parent;
  30
  31     /*< public >*/
  32     ARMCPU cpu;
  33     MemoryRegion sram;
  34     AspeedVICState vic;
  35     AspeedTimerCtrlState timerctrl;
  36     AspeedI2CState i2c;
  37     AspeedSCUState scu;
  38     AspeedSMCState fmc;
  39     AspeedSMCState spi[ASPEED_SPIS_NUM];
  40     AspeedSDMCState sdmc;
  41     AspeedWDTState wdt[ASPEED_WDTS_NUM];
  42     FTGMAC100State ftgmac100;
  43 } AspeedSoCState;
  44
  45 #define TYPE_ASPEED_SOC "aspeed-soc"
  46 #define ASPEED_SOC(obj) OBJECT_CHECK(AspeedSoCState, (obj), TYPE_ASPEED_SOC)
  47
  48 typedef struct AspeedSoCInfo {
  49     const char *name;
  50     const char *cpu_type;
  51     uint32_t silicon_rev;
  52     hwaddr sdram_base;
  53     uint64_t sram_size;
  54     int spis_num;
  55     const hwaddr *spi_bases;
  56     const char *fmc_typename;
  57     const char **spi_typename;
  58     int wdts_num;
  59     const int *irqmap;
  60 } AspeedSoCInfo;
  61
  62 typedef struct AspeedSoCClass {
  63     DeviceClass parent_class;
  64     AspeedSoCInfo *info;
  65 } AspeedSoCClass;
  66
  67 #define ASPEED_SOC_CLASS(klass)                                         \
  68     OBJECT_CLASS_CHECK(AspeedSoCClass, (klass), TYPE_ASPEED_SOC)
  69 #define ASPEED_SOC_GET_CLASS(obj)                               \
  70     OBJECT_GET_CLASS(AspeedSoCClass, (obj), TYPE_ASPEED_SOC)
  71
  72 enum {
  73     ASPEED_IOMEM,
  74     ASPEED_UART1,
  75     ASPEED_UART2,
  76     ASPEED_UART3,
  77     ASPEED_UART4,
  78     ASPEED_UART5,
  79     ASPEED_VUART,
  80     ASPEED_FMC,
  81     ASPEED_SPI1,
  82     ASPEED_SPI2,
  83     ASPEED_VIC,
  84     ASPEED_SDMC,
  85     ASPEED_SCU,
  86     ASPEED_ADC,
  87     ASPEED_SRAM,
  88     ASPEED_GPIO,
  89     ASPEED_RTC,
  90     ASPEED_TIMER1,
  91     ASPEED_TIMER2,
  92     ASPEED_TIMER3,
  93     ASPEED_TIMER4,
  94     ASPEED_TIMER5,
  95     ASPEED_TIMER6,
  96     ASPEED_TIMER7,
  97     ASPEED_TIMER8,
  98     ASPEED_WDT,
  99     ASPEED_PWM,
 100     ASPEED_LPC,
 101     ASPEED_IBT,
 102     ASPEED_I2C,
 103     ASPEED_ETH1,
 104     ASPEED_ETH2,
 105 };
 106
 107 #endif /* ASPEED_SOC_H */