2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2009 Ulrich Hecht <uli@suse.de>
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 #ifndef S390_TCG_TARGET_H
26 #define S390_TCG_TARGET_H
28 #define TCG_TARGET_INSN_UNIT_SIZE 2
29 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 19
50 #define TCG_TARGET_NB_REGS 16
52 /* A list of relevant facilities used by this translator. Some of these
53 are required for proper operation, and these are checked at startup. */
55 #define FACILITY_ZARCH_ACTIVE (1ULL << (63 - 2))
56 #define FACILITY_LONG_DISP (1ULL << (63 - 18))
57 #define FACILITY_EXT_IMM (1ULL << (63 - 21))
58 #define FACILITY_GEN_INST_EXT (1ULL << (63 - 34))
59 #define FACILITY_LOAD_ON_COND (1ULL << (63 - 45))
60 #define FACILITY_FAST_BCR_SER FACILITY_LOAD_ON_COND
61 #define FACILITY_DISTINCT_OPS FACILITY_LOAD_ON_COND
62 #define FACILITY_LOAD_ON_COND2 (1ULL << (63 - 53))
64 extern uint64_t s390_facilities
;
66 /* optional instructions */
67 #define TCG_TARGET_HAS_div2_i32 1
68 #define TCG_TARGET_HAS_rot_i32 1
69 #define TCG_TARGET_HAS_ext8s_i32 1
70 #define TCG_TARGET_HAS_ext16s_i32 1
71 #define TCG_TARGET_HAS_ext8u_i32 1
72 #define TCG_TARGET_HAS_ext16u_i32 1
73 #define TCG_TARGET_HAS_bswap16_i32 1
74 #define TCG_TARGET_HAS_bswap32_i32 1
75 #define TCG_TARGET_HAS_not_i32 0
76 #define TCG_TARGET_HAS_neg_i32 1
77 #define TCG_TARGET_HAS_andc_i32 0
78 #define TCG_TARGET_HAS_orc_i32 0
79 #define TCG_TARGET_HAS_eqv_i32 0
80 #define TCG_TARGET_HAS_nand_i32 0
81 #define TCG_TARGET_HAS_nor_i32 0
82 #define TCG_TARGET_HAS_clz_i32 0
83 #define TCG_TARGET_HAS_ctz_i32 0
84 #define TCG_TARGET_HAS_ctpop_i32 0
85 #define TCG_TARGET_HAS_deposit_i32 (s390_facilities & FACILITY_GEN_INST_EXT)
86 #define TCG_TARGET_HAS_extract_i32 (s390_facilities & FACILITY_GEN_INST_EXT)
87 #define TCG_TARGET_HAS_sextract_i32 0
88 #define TCG_TARGET_HAS_movcond_i32 1
89 #define TCG_TARGET_HAS_add2_i32 1
90 #define TCG_TARGET_HAS_sub2_i32 1
91 #define TCG_TARGET_HAS_mulu2_i32 0
92 #define TCG_TARGET_HAS_muls2_i32 0
93 #define TCG_TARGET_HAS_muluh_i32 0
94 #define TCG_TARGET_HAS_mulsh_i32 0
95 #define TCG_TARGET_HAS_extrl_i64_i32 0
96 #define TCG_TARGET_HAS_extrh_i64_i32 0
97 #define TCG_TARGET_HAS_goto_ptr 1
98 #define TCG_TARGET_HAS_direct_jump (s390_facilities & FACILITY_GEN_INST_EXT)
100 #define TCG_TARGET_HAS_div2_i64 1
101 #define TCG_TARGET_HAS_rot_i64 1
102 #define TCG_TARGET_HAS_ext8s_i64 1
103 #define TCG_TARGET_HAS_ext16s_i64 1
104 #define TCG_TARGET_HAS_ext32s_i64 1
105 #define TCG_TARGET_HAS_ext8u_i64 1
106 #define TCG_TARGET_HAS_ext16u_i64 1
107 #define TCG_TARGET_HAS_ext32u_i64 1
108 #define TCG_TARGET_HAS_bswap16_i64 1
109 #define TCG_TARGET_HAS_bswap32_i64 1
110 #define TCG_TARGET_HAS_bswap64_i64 1
111 #define TCG_TARGET_HAS_not_i64 0
112 #define TCG_TARGET_HAS_neg_i64 1
113 #define TCG_TARGET_HAS_andc_i64 0
114 #define TCG_TARGET_HAS_orc_i64 0
115 #define TCG_TARGET_HAS_eqv_i64 0
116 #define TCG_TARGET_HAS_nand_i64 0
117 #define TCG_TARGET_HAS_nor_i64 0
118 #define TCG_TARGET_HAS_clz_i64 (s390_facilities & FACILITY_EXT_IMM)
119 #define TCG_TARGET_HAS_ctz_i64 0
120 #define TCG_TARGET_HAS_ctpop_i64 0
121 #define TCG_TARGET_HAS_deposit_i64 (s390_facilities & FACILITY_GEN_INST_EXT)
122 #define TCG_TARGET_HAS_extract_i64 (s390_facilities & FACILITY_GEN_INST_EXT)
123 #define TCG_TARGET_HAS_sextract_i64 0
124 #define TCG_TARGET_HAS_movcond_i64 1
125 #define TCG_TARGET_HAS_add2_i64 1
126 #define TCG_TARGET_HAS_sub2_i64 1
127 #define TCG_TARGET_HAS_mulu2_i64 1
128 #define TCG_TARGET_HAS_muls2_i64 0
129 #define TCG_TARGET_HAS_muluh_i64 0
130 #define TCG_TARGET_HAS_mulsh_i64 0
132 /* used for function call generation */
133 #define TCG_REG_CALL_STACK TCG_REG_R15
134 #define TCG_TARGET_STACK_ALIGN 8
135 #define TCG_TARGET_CALL_STACK_OFFSET 160
137 #define TCG_TARGET_EXTEND_ARGS 1
139 #define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
142 TCG_AREG0
= TCG_REG_R10
,
145 static inline void flush_icache_range(uintptr_t start
, uintptr_t stop
)
149 static inline void tb_target_set_jmp_target(uintptr_t tc_ptr
,
150 uintptr_t jmp_addr
, uintptr_t addr
)
152 /* patch the branch destination */
153 intptr_t disp
= addr
- (jmp_addr
- 2);
154 atomic_set((int32_t *)jmp_addr
, disp
/ 2);
155 /* no need to flush icache explicitly */
158 #ifdef CONFIG_SOFTMMU
159 #define TCG_TARGET_NEED_LDST_LABELS
161 #define TCG_TARGET_NEED_POOL_LABELS