1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
6 * KVM x86 specific structures and definitions
10 #include <linux/types.h>
11 #include <linux/ioctl.h>
13 #define KVM_PIO_PAGE_OFFSET 1
14 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
15 #define KVM_DIRTY_LOG_PAGE_OFFSET 64
36 /* Select x86 specific features in <linux/kvm.h> */
37 #define __KVM_HAVE_PIT
38 #define __KVM_HAVE_IOAPIC
39 #define __KVM_HAVE_IRQ_LINE
40 #define __KVM_HAVE_MSI
41 #define __KVM_HAVE_USER_NMI
42 #define __KVM_HAVE_GUEST_DEBUG
43 #define __KVM_HAVE_MSIX
44 #define __KVM_HAVE_MCE
45 #define __KVM_HAVE_PIT_STATE2
46 #define __KVM_HAVE_XEN_HVM
47 #define __KVM_HAVE_VCPU_EVENTS
48 #define __KVM_HAVE_DEBUGREGS
49 #define __KVM_HAVE_XSAVE
50 #define __KVM_HAVE_XCRS
51 #define __KVM_HAVE_READONLY_MEM
53 /* Architectural interrupt line count. */
54 #define KVM_NR_INTERRUPTS 256
56 struct kvm_memory_alias
{
57 __u32 slot
; /* this has a different namespace than memory slots */
59 __u64 guest_phys_addr
;
61 __u64 target_phys_addr
;
64 /* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
65 struct kvm_pic_state
{
66 __u8 last_irr
; /* edge detection */
67 __u8 irr
; /* interrupt request register */
68 __u8 imr
; /* interrupt mask register */
69 __u8 isr
; /* interrupt service register */
70 __u8 priority_add
; /* highest irq priority */
77 __u8 rotate_on_auto_eoi
;
78 __u8 special_fully_nested_mode
;
79 __u8 init4
; /* true if 4 byte init */
80 __u8 elcr
; /* PIIX edge/trigger selection */
84 #define KVM_IOAPIC_NUM_PINS 24
85 struct kvm_ioapic_state
{
97 __u8 delivery_status
:1;
106 } redirtbl
[KVM_IOAPIC_NUM_PINS
];
109 #define KVM_IRQCHIP_PIC_MASTER 0
110 #define KVM_IRQCHIP_PIC_SLAVE 1
111 #define KVM_IRQCHIP_IOAPIC 2
112 #define KVM_NR_IRQCHIPS 3
114 #define KVM_RUN_X86_SMM (1 << 0)
115 #define KVM_RUN_X86_BUS_LOCK (1 << 1)
117 /* for KVM_GET_REGS and KVM_SET_REGS */
119 /* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
120 __u64 rax
, rbx
, rcx
, rdx
;
121 __u64 rsi
, rdi
, rsp
, rbp
;
122 __u64 r8
, r9
, r10
, r11
;
123 __u64 r12
, r13
, r14
, r15
;
127 /* for KVM_GET_LAPIC and KVM_SET_LAPIC */
128 #define KVM_APIC_REG_SIZE 0x400
129 struct kvm_lapic_state
{
130 char regs
[KVM_APIC_REG_SIZE
];
138 __u8 present
, dpl
, db
, s
, l
, g
, avl
;
150 /* for KVM_GET_SREGS and KVM_SET_SREGS */
152 /* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
153 struct kvm_segment cs
, ds
, es
, fs
, gs
, ss
;
154 struct kvm_segment tr
, ldt
;
155 struct kvm_dtable gdt
, idt
;
156 __u64 cr0
, cr2
, cr3
, cr4
, cr8
;
159 __u64 interrupt_bitmap
[(KVM_NR_INTERRUPTS
+ 63) / 64];
163 /* out (KVM_GET_SREGS2) / in (KVM_SET_SREGS2) */
164 struct kvm_segment cs
, ds
, es
, fs
, gs
, ss
;
165 struct kvm_segment tr
, ldt
;
166 struct kvm_dtable gdt
, idt
;
167 __u64 cr0
, cr2
, cr3
, cr4
, cr8
;
173 #define KVM_SREGS2_FLAGS_PDPTRS_VALID 1
175 /* for KVM_GET_FPU and KVM_SET_FPU */
180 __u8 ftwx
; /* in fxsave format */
190 struct kvm_msr_entry
{
196 /* for KVM_GET_MSRS and KVM_SET_MSRS */
198 __u32 nmsrs
; /* number of msrs in entries */
201 struct kvm_msr_entry entries
[0];
204 /* for KVM_GET_MSR_INDEX_LIST */
205 struct kvm_msr_list
{
206 __u32 nmsrs
; /* number of msrs in entries */
210 /* Maximum size of any access bitmap in bytes */
211 #define KVM_MSR_FILTER_MAX_BITMAP_SIZE 0x600
213 /* for KVM_X86_SET_MSR_FILTER */
214 struct kvm_msr_filter_range
{
215 #define KVM_MSR_FILTER_READ (1 << 0)
216 #define KVM_MSR_FILTER_WRITE (1 << 1)
218 __u32 nmsrs
; /* number of msrs in bitmap */
219 __u32 base
; /* MSR index the bitmap starts at */
220 __u8
*bitmap
; /* a 1 bit allows the operations in flags, 0 denies */
223 #define KVM_MSR_FILTER_MAX_RANGES 16
224 struct kvm_msr_filter
{
225 #define KVM_MSR_FILTER_DEFAULT_ALLOW (0 << 0)
226 #define KVM_MSR_FILTER_DEFAULT_DENY (1 << 0)
228 struct kvm_msr_filter_range ranges
[KVM_MSR_FILTER_MAX_RANGES
];
231 struct kvm_cpuid_entry
{
240 /* for KVM_SET_CPUID */
244 struct kvm_cpuid_entry entries
[0];
247 struct kvm_cpuid_entry2
{
258 #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX (1 << 0)
259 #define KVM_CPUID_FLAG_STATEFUL_FUNC (1 << 1)
260 #define KVM_CPUID_FLAG_STATE_READ_NEXT (1 << 2)
262 /* for KVM_SET_CPUID2 */
266 struct kvm_cpuid_entry2 entries
[0];
269 /* for KVM_GET_PIT and KVM_SET_PIT */
270 struct kvm_pit_channel_state
{
271 __u32 count
; /* can be 65536 */
283 __s64 count_load_time
;
286 struct kvm_debug_exit_arch
{
294 #define KVM_GUESTDBG_USE_SW_BP 0x00010000
295 #define KVM_GUESTDBG_USE_HW_BP 0x00020000
296 #define KVM_GUESTDBG_INJECT_DB 0x00040000
297 #define KVM_GUESTDBG_INJECT_BP 0x00080000
299 /* for KVM_SET_GUEST_DEBUG */
300 struct kvm_guest_debug_arch
{
304 struct kvm_pit_state
{
305 struct kvm_pit_channel_state channels
[3];
308 #define KVM_PIT_FLAGS_HPET_LEGACY 0x00000001
310 struct kvm_pit_state2
{
311 struct kvm_pit_channel_state channels
[3];
316 struct kvm_reinject_control
{
321 /* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */
322 #define KVM_VCPUEVENT_VALID_NMI_PENDING 0x00000001
323 #define KVM_VCPUEVENT_VALID_SIPI_VECTOR 0x00000002
324 #define KVM_VCPUEVENT_VALID_SHADOW 0x00000004
325 #define KVM_VCPUEVENT_VALID_SMM 0x00000008
326 #define KVM_VCPUEVENT_VALID_PAYLOAD 0x00000010
328 /* Interrupt shadow states */
329 #define KVM_X86_SHADOW_INT_MOV_SS 0x01
330 #define KVM_X86_SHADOW_INT_STI 0x02
332 /* for KVM_GET/SET_VCPU_EVENTS */
333 struct kvm_vcpu_events
{
362 __u8 exception_has_payload
;
363 __u64 exception_payload
;
366 /* for KVM_GET/SET_DEBUGREGS */
367 struct kvm_debugregs
{
375 /* for KVM_CAP_XSAVE */
380 #define KVM_MAX_XCRS 16
391 struct kvm_xcr xcrs
[KVM_MAX_XCRS
];
395 #define KVM_SYNC_X86_REGS (1UL << 0)
396 #define KVM_SYNC_X86_SREGS (1UL << 1)
397 #define KVM_SYNC_X86_EVENTS (1UL << 2)
399 #define KVM_SYNC_X86_VALID_FIELDS \
400 (KVM_SYNC_X86_REGS| \
401 KVM_SYNC_X86_SREGS| \
404 /* kvm_sync_regs struct included by kvm_run struct */
405 struct kvm_sync_regs
{
406 /* Members of this structure are potentially malicious.
407 * Care must be taken by code reading, esp. interpreting,
408 * data fields from them inside KVM to prevent TOCTOU and
409 * double-fetch types of vulnerabilities.
411 struct kvm_regs regs
;
412 struct kvm_sregs sregs
;
413 struct kvm_vcpu_events events
;
416 #define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0)
417 #define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1)
418 #define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2)
419 #define KVM_X86_QUIRK_OUT_7E_INC_RIP (1 << 3)
420 #define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT (1 << 4)
422 #define KVM_STATE_NESTED_FORMAT_VMX 0
423 #define KVM_STATE_NESTED_FORMAT_SVM 1
425 #define KVM_STATE_NESTED_GUEST_MODE 0x00000001
426 #define KVM_STATE_NESTED_RUN_PENDING 0x00000002
427 #define KVM_STATE_NESTED_EVMCS 0x00000004
428 #define KVM_STATE_NESTED_MTF_PENDING 0x00000008
429 #define KVM_STATE_NESTED_GIF_SET 0x00000100
431 #define KVM_STATE_NESTED_SMM_GUEST_MODE 0x00000001
432 #define KVM_STATE_NESTED_SMM_VMXON 0x00000002
434 #define KVM_STATE_NESTED_VMX_VMCS_SIZE 0x1000
436 #define KVM_STATE_NESTED_SVM_VMCB_SIZE 0x1000
438 #define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE 0x00000001
440 struct kvm_vmx_nested_state_data
{
441 __u8 vmcs12
[KVM_STATE_NESTED_VMX_VMCS_SIZE
];
442 __u8 shadow_vmcs12
[KVM_STATE_NESTED_VMX_VMCS_SIZE
];
445 struct kvm_vmx_nested_state_hdr
{
456 __u64 preemption_timer_deadline
;
459 struct kvm_svm_nested_state_data
{
460 /* Save area only used if KVM_STATE_NESTED_RUN_PENDING. */
461 __u8 vmcb12
[KVM_STATE_NESTED_SVM_VMCB_SIZE
];
464 struct kvm_svm_nested_state_hdr
{
468 /* for KVM_CAP_NESTED_STATE */
469 struct kvm_nested_state
{
475 struct kvm_vmx_nested_state_hdr vmx
;
476 struct kvm_svm_nested_state_hdr svm
;
478 /* Pad the header to 128 bytes. */
483 * Define data region as 0 bytes to preserve backwards-compatability
484 * to old definition of kvm_nested_state in order to avoid changing
485 * KVM_{GET,PUT}_NESTED_STATE ioctl values.
488 struct kvm_vmx_nested_state_data vmx
[0];
489 struct kvm_svm_nested_state_data svm
[0];
493 /* for KVM_CAP_PMU_EVENT_FILTER */
494 struct kvm_pmu_event_filter
{
497 __u32 fixed_counter_bitmap
;
503 #define KVM_PMU_EVENT_ALLOW 0
504 #define KVM_PMU_EVENT_DENY 1
506 #endif /* _ASM_X86_KVM_H */