ui/gtk-egl: Fix build failure when libgbm is not available
[qemu/rayw.git] / target / arm / kvm.c
blobbbf1ce7ba3bc337908aa257b259b008a0ed4b5a8
1 /*
2 * ARM implementation of KVM hooks
4 * Copyright Christoffer Dall 2009-2010
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
9 */
11 #include "qemu/osdep.h"
12 #include <sys/ioctl.h>
14 #include <linux/kvm.h>
16 #include "qemu-common.h"
17 #include "qemu/timer.h"
18 #include "qemu/error-report.h"
19 #include "qemu/main-loop.h"
20 #include "qom/object.h"
21 #include "qapi/error.h"
22 #include "sysemu/sysemu.h"
23 #include "sysemu/kvm.h"
24 #include "sysemu/kvm_int.h"
25 #include "kvm_arm.h"
26 #include "cpu.h"
27 #include "trace.h"
28 #include "internals.h"
29 #include "hw/pci/pci.h"
30 #include "exec/memattrs.h"
31 #include "exec/address-spaces.h"
32 #include "hw/boards.h"
33 #include "hw/irq.h"
34 #include "qemu/log.h"
36 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
37 KVM_CAP_LAST_INFO
40 static bool cap_has_mp_state;
41 static bool cap_has_inject_serror_esr;
42 static bool cap_has_inject_ext_dabt;
44 static ARMHostCPUFeatures arm_host_cpu_features;
46 int kvm_arm_vcpu_init(CPUState *cs)
48 ARMCPU *cpu = ARM_CPU(cs);
49 struct kvm_vcpu_init init;
51 init.target = cpu->kvm_target;
52 memcpy(init.features, cpu->kvm_init_features, sizeof(init.features));
54 return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
57 int kvm_arm_vcpu_finalize(CPUState *cs, int feature)
59 return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_FINALIZE, &feature);
62 void kvm_arm_init_serror_injection(CPUState *cs)
64 cap_has_inject_serror_esr = kvm_check_extension(cs->kvm_state,
65 KVM_CAP_ARM_INJECT_SERROR_ESR);
68 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
69 int *fdarray,
70 struct kvm_vcpu_init *init)
72 int ret = 0, kvmfd = -1, vmfd = -1, cpufd = -1;
73 int max_vm_pa_size;
75 kvmfd = qemu_open_old("/dev/kvm", O_RDWR);
76 if (kvmfd < 0) {
77 goto err;
79 max_vm_pa_size = ioctl(kvmfd, KVM_CHECK_EXTENSION, KVM_CAP_ARM_VM_IPA_SIZE);
80 if (max_vm_pa_size < 0) {
81 max_vm_pa_size = 0;
83 vmfd = ioctl(kvmfd, KVM_CREATE_VM, max_vm_pa_size);
84 if (vmfd < 0) {
85 goto err;
87 cpufd = ioctl(vmfd, KVM_CREATE_VCPU, 0);
88 if (cpufd < 0) {
89 goto err;
92 if (!init) {
93 /* Caller doesn't want the VCPU to be initialized, so skip it */
94 goto finish;
97 if (init->target == -1) {
98 struct kvm_vcpu_init preferred;
100 ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, &preferred);
101 if (!ret) {
102 init->target = preferred.target;
105 if (ret >= 0) {
106 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
107 if (ret < 0) {
108 goto err;
110 } else if (cpus_to_try) {
111 /* Old kernel which doesn't know about the
112 * PREFERRED_TARGET ioctl: we know it will only support
113 * creating one kind of guest CPU which is its preferred
114 * CPU type.
116 struct kvm_vcpu_init try;
118 while (*cpus_to_try != QEMU_KVM_ARM_TARGET_NONE) {
119 try.target = *cpus_to_try++;
120 memcpy(try.features, init->features, sizeof(init->features));
121 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, &try);
122 if (ret >= 0) {
123 break;
126 if (ret < 0) {
127 goto err;
129 init->target = try.target;
130 } else {
131 /* Treat a NULL cpus_to_try argument the same as an empty
132 * list, which means we will fail the call since this must
133 * be an old kernel which doesn't support PREFERRED_TARGET.
135 goto err;
138 finish:
139 fdarray[0] = kvmfd;
140 fdarray[1] = vmfd;
141 fdarray[2] = cpufd;
143 return true;
145 err:
146 if (cpufd >= 0) {
147 close(cpufd);
149 if (vmfd >= 0) {
150 close(vmfd);
152 if (kvmfd >= 0) {
153 close(kvmfd);
156 return false;
159 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray)
161 int i;
163 for (i = 2; i >= 0; i--) {
164 close(fdarray[i]);
168 void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu)
170 CPUARMState *env = &cpu->env;
172 if (!arm_host_cpu_features.dtb_compatible) {
173 if (!kvm_enabled() ||
174 !kvm_arm_get_host_cpu_features(&arm_host_cpu_features)) {
175 /* We can't report this error yet, so flag that we need to
176 * in arm_cpu_realizefn().
178 cpu->kvm_target = QEMU_KVM_ARM_TARGET_NONE;
179 cpu->host_cpu_probe_failed = true;
180 return;
184 cpu->kvm_target = arm_host_cpu_features.target;
185 cpu->dtb_compatible = arm_host_cpu_features.dtb_compatible;
186 cpu->isar = arm_host_cpu_features.isar;
187 env->features = arm_host_cpu_features.features;
190 static bool kvm_no_adjvtime_get(Object *obj, Error **errp)
192 return !ARM_CPU(obj)->kvm_adjvtime;
195 static void kvm_no_adjvtime_set(Object *obj, bool value, Error **errp)
197 ARM_CPU(obj)->kvm_adjvtime = !value;
200 static bool kvm_steal_time_get(Object *obj, Error **errp)
202 return ARM_CPU(obj)->kvm_steal_time != ON_OFF_AUTO_OFF;
205 static void kvm_steal_time_set(Object *obj, bool value, Error **errp)
207 ARM_CPU(obj)->kvm_steal_time = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
210 /* KVM VCPU properties should be prefixed with "kvm-". */
211 void kvm_arm_add_vcpu_properties(Object *obj)
213 ARMCPU *cpu = ARM_CPU(obj);
214 CPUARMState *env = &cpu->env;
216 if (arm_feature(env, ARM_FEATURE_GENERIC_TIMER)) {
217 cpu->kvm_adjvtime = true;
218 object_property_add_bool(obj, "kvm-no-adjvtime", kvm_no_adjvtime_get,
219 kvm_no_adjvtime_set);
220 object_property_set_description(obj, "kvm-no-adjvtime",
221 "Set on to disable the adjustment of "
222 "the virtual counter. VM stopped time "
223 "will be counted.");
226 cpu->kvm_steal_time = ON_OFF_AUTO_AUTO;
227 object_property_add_bool(obj, "kvm-steal-time", kvm_steal_time_get,
228 kvm_steal_time_set);
229 object_property_set_description(obj, "kvm-steal-time",
230 "Set off to disable KVM steal time.");
233 bool kvm_arm_pmu_supported(void)
235 return kvm_check_extension(kvm_state, KVM_CAP_ARM_PMU_V3);
238 int kvm_arm_get_max_vm_ipa_size(MachineState *ms, bool *fixed_ipa)
240 KVMState *s = KVM_STATE(ms->accelerator);
241 int ret;
243 ret = kvm_check_extension(s, KVM_CAP_ARM_VM_IPA_SIZE);
244 *fixed_ipa = ret <= 0;
246 return ret > 0 ? ret : 40;
249 int kvm_arch_init(MachineState *ms, KVMState *s)
251 int ret = 0;
252 /* For ARM interrupt delivery is always asynchronous,
253 * whether we are using an in-kernel VGIC or not.
255 kvm_async_interrupts_allowed = true;
258 * PSCI wakes up secondary cores, so we always need to
259 * have vCPUs waiting in kernel space
261 kvm_halt_in_kernel_allowed = true;
263 cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE);
265 if (ms->smp.cpus > 256 &&
266 !kvm_check_extension(s, KVM_CAP_ARM_IRQ_LINE_LAYOUT_2)) {
267 error_report("Using more than 256 vcpus requires a host kernel "
268 "with KVM_CAP_ARM_IRQ_LINE_LAYOUT_2");
269 ret = -EINVAL;
272 if (kvm_check_extension(s, KVM_CAP_ARM_NISV_TO_USER)) {
273 if (kvm_vm_enable_cap(s, KVM_CAP_ARM_NISV_TO_USER, 0)) {
274 error_report("Failed to enable KVM_CAP_ARM_NISV_TO_USER cap");
275 } else {
276 /* Set status for supporting the external dabt injection */
277 cap_has_inject_ext_dabt = kvm_check_extension(s,
278 KVM_CAP_ARM_INJECT_EXT_DABT);
282 return ret;
285 unsigned long kvm_arch_vcpu_id(CPUState *cpu)
287 return cpu->cpu_index;
290 /* We track all the KVM devices which need their memory addresses
291 * passing to the kernel in a list of these structures.
292 * When board init is complete we run through the list and
293 * tell the kernel the base addresses of the memory regions.
294 * We use a MemoryListener to track mapping and unmapping of
295 * the regions during board creation, so the board models don't
296 * need to do anything special for the KVM case.
298 * Sometimes the address must be OR'ed with some other fields
299 * (for example for KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION).
300 * @kda_addr_ormask aims at storing the value of those fields.
302 typedef struct KVMDevice {
303 struct kvm_arm_device_addr kda;
304 struct kvm_device_attr kdattr;
305 uint64_t kda_addr_ormask;
306 MemoryRegion *mr;
307 QSLIST_ENTRY(KVMDevice) entries;
308 int dev_fd;
309 } KVMDevice;
311 static QSLIST_HEAD(, KVMDevice) kvm_devices_head;
313 static void kvm_arm_devlistener_add(MemoryListener *listener,
314 MemoryRegionSection *section)
316 KVMDevice *kd;
318 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
319 if (section->mr == kd->mr) {
320 kd->kda.addr = section->offset_within_address_space;
325 static void kvm_arm_devlistener_del(MemoryListener *listener,
326 MemoryRegionSection *section)
328 KVMDevice *kd;
330 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
331 if (section->mr == kd->mr) {
332 kd->kda.addr = -1;
337 static MemoryListener devlistener = {
338 .name = "kvm-arm",
339 .region_add = kvm_arm_devlistener_add,
340 .region_del = kvm_arm_devlistener_del,
343 static void kvm_arm_set_device_addr(KVMDevice *kd)
345 struct kvm_device_attr *attr = &kd->kdattr;
346 int ret;
348 /* If the device control API is available and we have a device fd on the
349 * KVMDevice struct, let's use the newer API
351 if (kd->dev_fd >= 0) {
352 uint64_t addr = kd->kda.addr;
354 addr |= kd->kda_addr_ormask;
355 attr->addr = (uintptr_t)&addr;
356 ret = kvm_device_ioctl(kd->dev_fd, KVM_SET_DEVICE_ATTR, attr);
357 } else {
358 ret = kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR, &kd->kda);
361 if (ret < 0) {
362 fprintf(stderr, "Failed to set device address: %s\n",
363 strerror(-ret));
364 abort();
368 static void kvm_arm_machine_init_done(Notifier *notifier, void *data)
370 KVMDevice *kd, *tkd;
372 QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) {
373 if (kd->kda.addr != -1) {
374 kvm_arm_set_device_addr(kd);
376 memory_region_unref(kd->mr);
377 QSLIST_REMOVE_HEAD(&kvm_devices_head, entries);
378 g_free(kd);
380 memory_listener_unregister(&devlistener);
383 static Notifier notify = {
384 .notify = kvm_arm_machine_init_done,
387 void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group,
388 uint64_t attr, int dev_fd, uint64_t addr_ormask)
390 KVMDevice *kd;
392 if (!kvm_irqchip_in_kernel()) {
393 return;
396 if (QSLIST_EMPTY(&kvm_devices_head)) {
397 memory_listener_register(&devlistener, &address_space_memory);
398 qemu_add_machine_init_done_notifier(&notify);
400 kd = g_new0(KVMDevice, 1);
401 kd->mr = mr;
402 kd->kda.id = devid;
403 kd->kda.addr = -1;
404 kd->kdattr.flags = 0;
405 kd->kdattr.group = group;
406 kd->kdattr.attr = attr;
407 kd->dev_fd = dev_fd;
408 kd->kda_addr_ormask = addr_ormask;
409 QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries);
410 memory_region_ref(kd->mr);
413 static int compare_u64(const void *a, const void *b)
415 if (*(uint64_t *)a > *(uint64_t *)b) {
416 return 1;
418 if (*(uint64_t *)a < *(uint64_t *)b) {
419 return -1;
421 return 0;
425 * cpreg_values are sorted in ascending order by KVM register ID
426 * (see kvm_arm_init_cpreg_list). This allows us to cheaply find
427 * the storage for a KVM register by ID with a binary search.
429 static uint64_t *kvm_arm_get_cpreg_ptr(ARMCPU *cpu, uint64_t regidx)
431 uint64_t *res;
433 res = bsearch(&regidx, cpu->cpreg_indexes, cpu->cpreg_array_len,
434 sizeof(uint64_t), compare_u64);
435 assert(res);
437 return &cpu->cpreg_values[res - cpu->cpreg_indexes];
440 /* Initialize the ARMCPU cpreg list according to the kernel's
441 * definition of what CPU registers it knows about (and throw away
442 * the previous TCG-created cpreg list).
444 int kvm_arm_init_cpreg_list(ARMCPU *cpu)
446 struct kvm_reg_list rl;
447 struct kvm_reg_list *rlp;
448 int i, ret, arraylen;
449 CPUState *cs = CPU(cpu);
451 rl.n = 0;
452 ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl);
453 if (ret != -E2BIG) {
454 return ret;
456 rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t));
457 rlp->n = rl.n;
458 ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp);
459 if (ret) {
460 goto out;
462 /* Sort the list we get back from the kernel, since cpreg_tuples
463 * must be in strictly ascending order.
465 qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64);
467 for (i = 0, arraylen = 0; i < rlp->n; i++) {
468 if (!kvm_arm_reg_syncs_via_cpreg_list(rlp->reg[i])) {
469 continue;
471 switch (rlp->reg[i] & KVM_REG_SIZE_MASK) {
472 case KVM_REG_SIZE_U32:
473 case KVM_REG_SIZE_U64:
474 break;
475 default:
476 fprintf(stderr, "Can't handle size of register in kernel list\n");
477 ret = -EINVAL;
478 goto out;
481 arraylen++;
484 cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen);
485 cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen);
486 cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes,
487 arraylen);
488 cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values,
489 arraylen);
490 cpu->cpreg_array_len = arraylen;
491 cpu->cpreg_vmstate_array_len = arraylen;
493 for (i = 0, arraylen = 0; i < rlp->n; i++) {
494 uint64_t regidx = rlp->reg[i];
495 if (!kvm_arm_reg_syncs_via_cpreg_list(regidx)) {
496 continue;
498 cpu->cpreg_indexes[arraylen] = regidx;
499 arraylen++;
501 assert(cpu->cpreg_array_len == arraylen);
503 if (!write_kvmstate_to_list(cpu)) {
504 /* Shouldn't happen unless kernel is inconsistent about
505 * what registers exist.
507 fprintf(stderr, "Initial read of kernel register state failed\n");
508 ret = -EINVAL;
509 goto out;
512 out:
513 g_free(rlp);
514 return ret;
517 bool write_kvmstate_to_list(ARMCPU *cpu)
519 CPUState *cs = CPU(cpu);
520 int i;
521 bool ok = true;
523 for (i = 0; i < cpu->cpreg_array_len; i++) {
524 struct kvm_one_reg r;
525 uint64_t regidx = cpu->cpreg_indexes[i];
526 uint32_t v32;
527 int ret;
529 r.id = regidx;
531 switch (regidx & KVM_REG_SIZE_MASK) {
532 case KVM_REG_SIZE_U32:
533 r.addr = (uintptr_t)&v32;
534 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
535 if (!ret) {
536 cpu->cpreg_values[i] = v32;
538 break;
539 case KVM_REG_SIZE_U64:
540 r.addr = (uintptr_t)(cpu->cpreg_values + i);
541 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
542 break;
543 default:
544 abort();
546 if (ret) {
547 ok = false;
550 return ok;
553 bool write_list_to_kvmstate(ARMCPU *cpu, int level)
555 CPUState *cs = CPU(cpu);
556 int i;
557 bool ok = true;
559 for (i = 0; i < cpu->cpreg_array_len; i++) {
560 struct kvm_one_reg r;
561 uint64_t regidx = cpu->cpreg_indexes[i];
562 uint32_t v32;
563 int ret;
565 if (kvm_arm_cpreg_level(regidx) > level) {
566 continue;
569 r.id = regidx;
570 switch (regidx & KVM_REG_SIZE_MASK) {
571 case KVM_REG_SIZE_U32:
572 v32 = cpu->cpreg_values[i];
573 r.addr = (uintptr_t)&v32;
574 break;
575 case KVM_REG_SIZE_U64:
576 r.addr = (uintptr_t)(cpu->cpreg_values + i);
577 break;
578 default:
579 abort();
581 ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
582 if (ret) {
583 /* We might fail for "unknown register" and also for
584 * "you tried to set a register which is constant with
585 * a different value from what it actually contains".
587 ok = false;
590 return ok;
593 void kvm_arm_cpu_pre_save(ARMCPU *cpu)
595 /* KVM virtual time adjustment */
596 if (cpu->kvm_vtime_dirty) {
597 *kvm_arm_get_cpreg_ptr(cpu, KVM_REG_ARM_TIMER_CNT) = cpu->kvm_vtime;
601 void kvm_arm_cpu_post_load(ARMCPU *cpu)
603 /* KVM virtual time adjustment */
604 if (cpu->kvm_adjvtime) {
605 cpu->kvm_vtime = *kvm_arm_get_cpreg_ptr(cpu, KVM_REG_ARM_TIMER_CNT);
606 cpu->kvm_vtime_dirty = true;
610 void kvm_arm_reset_vcpu(ARMCPU *cpu)
612 int ret;
614 /* Re-init VCPU so that all registers are set to
615 * their respective reset values.
617 ret = kvm_arm_vcpu_init(CPU(cpu));
618 if (ret < 0) {
619 fprintf(stderr, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret));
620 abort();
622 if (!write_kvmstate_to_list(cpu)) {
623 fprintf(stderr, "write_kvmstate_to_list failed\n");
624 abort();
627 * Sync the reset values also into the CPUState. This is necessary
628 * because the next thing we do will be a kvm_arch_put_registers()
629 * which will update the list values from the CPUState before copying
630 * the list values back to KVM. It's OK to ignore failure returns here
631 * for the same reason we do so in kvm_arch_get_registers().
633 write_list_to_cpustate(cpu);
637 * Update KVM's MP_STATE based on what QEMU thinks it is
639 int kvm_arm_sync_mpstate_to_kvm(ARMCPU *cpu)
641 if (cap_has_mp_state) {
642 struct kvm_mp_state mp_state = {
643 .mp_state = (cpu->power_state == PSCI_OFF) ?
644 KVM_MP_STATE_STOPPED : KVM_MP_STATE_RUNNABLE
646 int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state);
647 if (ret) {
648 fprintf(stderr, "%s: failed to set MP_STATE %d/%s\n",
649 __func__, ret, strerror(-ret));
650 return -1;
654 return 0;
658 * Sync the KVM MP_STATE into QEMU
660 int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu)
662 if (cap_has_mp_state) {
663 struct kvm_mp_state mp_state;
664 int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MP_STATE, &mp_state);
665 if (ret) {
666 fprintf(stderr, "%s: failed to get MP_STATE %d/%s\n",
667 __func__, ret, strerror(-ret));
668 abort();
670 cpu->power_state = (mp_state.mp_state == KVM_MP_STATE_STOPPED) ?
671 PSCI_OFF : PSCI_ON;
674 return 0;
677 void kvm_arm_get_virtual_time(CPUState *cs)
679 ARMCPU *cpu = ARM_CPU(cs);
680 struct kvm_one_reg reg = {
681 .id = KVM_REG_ARM_TIMER_CNT,
682 .addr = (uintptr_t)&cpu->kvm_vtime,
684 int ret;
686 if (cpu->kvm_vtime_dirty) {
687 return;
690 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &reg);
691 if (ret) {
692 error_report("Failed to get KVM_REG_ARM_TIMER_CNT");
693 abort();
696 cpu->kvm_vtime_dirty = true;
699 void kvm_arm_put_virtual_time(CPUState *cs)
701 ARMCPU *cpu = ARM_CPU(cs);
702 struct kvm_one_reg reg = {
703 .id = KVM_REG_ARM_TIMER_CNT,
704 .addr = (uintptr_t)&cpu->kvm_vtime,
706 int ret;
708 if (!cpu->kvm_vtime_dirty) {
709 return;
712 ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &reg);
713 if (ret) {
714 error_report("Failed to set KVM_REG_ARM_TIMER_CNT");
715 abort();
718 cpu->kvm_vtime_dirty = false;
721 int kvm_put_vcpu_events(ARMCPU *cpu)
723 CPUARMState *env = &cpu->env;
724 struct kvm_vcpu_events events;
725 int ret;
727 if (!kvm_has_vcpu_events()) {
728 return 0;
731 memset(&events, 0, sizeof(events));
732 events.exception.serror_pending = env->serror.pending;
734 /* Inject SError to guest with specified syndrome if host kernel
735 * supports it, otherwise inject SError without syndrome.
737 if (cap_has_inject_serror_esr) {
738 events.exception.serror_has_esr = env->serror.has_esr;
739 events.exception.serror_esr = env->serror.esr;
742 ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_VCPU_EVENTS, &events);
743 if (ret) {
744 error_report("failed to put vcpu events");
747 return ret;
750 int kvm_get_vcpu_events(ARMCPU *cpu)
752 CPUARMState *env = &cpu->env;
753 struct kvm_vcpu_events events;
754 int ret;
756 if (!kvm_has_vcpu_events()) {
757 return 0;
760 memset(&events, 0, sizeof(events));
761 ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_VCPU_EVENTS, &events);
762 if (ret) {
763 error_report("failed to get vcpu events");
764 return ret;
767 env->serror.pending = events.exception.serror_pending;
768 env->serror.has_esr = events.exception.serror_has_esr;
769 env->serror.esr = events.exception.serror_esr;
771 return 0;
774 void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
776 ARMCPU *cpu = ARM_CPU(cs);
777 CPUARMState *env = &cpu->env;
779 if (unlikely(env->ext_dabt_raised)) {
781 * Verifying that the ext DABT has been properly injected,
782 * otherwise risking indefinitely re-running the faulting instruction
783 * Covering a very narrow case for kernels 5.5..5.5.4
784 * when injected abort was misconfigured to be
785 * an IMPLEMENTATION DEFINED exception (for 32-bit EL1)
787 if (!arm_feature(env, ARM_FEATURE_AARCH64) &&
788 unlikely(!kvm_arm_verify_ext_dabt_pending(cs))) {
790 error_report("Data abort exception with no valid ISS generated by "
791 "guest memory access. KVM unable to emulate faulting "
792 "instruction. Failed to inject an external data abort "
793 "into the guest.");
794 abort();
796 /* Clear the status */
797 env->ext_dabt_raised = 0;
801 MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
803 ARMCPU *cpu;
804 uint32_t switched_level;
806 if (kvm_irqchip_in_kernel()) {
808 * We only need to sync timer states with user-space interrupt
809 * controllers, so return early and save cycles if we don't.
811 return MEMTXATTRS_UNSPECIFIED;
814 cpu = ARM_CPU(cs);
816 /* Synchronize our shadowed in-kernel device irq lines with the kvm ones */
817 if (run->s.regs.device_irq_level != cpu->device_irq_level) {
818 switched_level = cpu->device_irq_level ^ run->s.regs.device_irq_level;
820 qemu_mutex_lock_iothread();
822 if (switched_level & KVM_ARM_DEV_EL1_VTIMER) {
823 qemu_set_irq(cpu->gt_timer_outputs[GTIMER_VIRT],
824 !!(run->s.regs.device_irq_level &
825 KVM_ARM_DEV_EL1_VTIMER));
826 switched_level &= ~KVM_ARM_DEV_EL1_VTIMER;
829 if (switched_level & KVM_ARM_DEV_EL1_PTIMER) {
830 qemu_set_irq(cpu->gt_timer_outputs[GTIMER_PHYS],
831 !!(run->s.regs.device_irq_level &
832 KVM_ARM_DEV_EL1_PTIMER));
833 switched_level &= ~KVM_ARM_DEV_EL1_PTIMER;
836 if (switched_level & KVM_ARM_DEV_PMU) {
837 qemu_set_irq(cpu->pmu_interrupt,
838 !!(run->s.regs.device_irq_level & KVM_ARM_DEV_PMU));
839 switched_level &= ~KVM_ARM_DEV_PMU;
842 if (switched_level) {
843 qemu_log_mask(LOG_UNIMP, "%s: unhandled in-kernel device IRQ %x\n",
844 __func__, switched_level);
847 /* We also mark unknown levels as processed to not waste cycles */
848 cpu->device_irq_level = run->s.regs.device_irq_level;
849 qemu_mutex_unlock_iothread();
852 return MEMTXATTRS_UNSPECIFIED;
855 void kvm_arm_vm_state_change(void *opaque, bool running, RunState state)
857 CPUState *cs = opaque;
858 ARMCPU *cpu = ARM_CPU(cs);
860 if (running) {
861 if (cpu->kvm_adjvtime) {
862 kvm_arm_put_virtual_time(cs);
864 } else {
865 if (cpu->kvm_adjvtime) {
866 kvm_arm_get_virtual_time(cs);
872 * kvm_arm_handle_dabt_nisv:
873 * @cs: CPUState
874 * @esr_iss: ISS encoding (limited) for the exception from Data Abort
875 * ISV bit set to '0b0' -> no valid instruction syndrome
876 * @fault_ipa: faulting address for the synchronous data abort
878 * Returns: 0 if the exception has been handled, < 0 otherwise
880 static int kvm_arm_handle_dabt_nisv(CPUState *cs, uint64_t esr_iss,
881 uint64_t fault_ipa)
883 ARMCPU *cpu = ARM_CPU(cs);
884 CPUARMState *env = &cpu->env;
886 * Request KVM to inject the external data abort into the guest
888 if (cap_has_inject_ext_dabt) {
889 struct kvm_vcpu_events events = { };
891 * The external data abort event will be handled immediately by KVM
892 * using the address fault that triggered the exit on given VCPU.
893 * Requesting injection of the external data abort does not rely
894 * on any other VCPU state. Therefore, in this particular case, the VCPU
895 * synchronization can be exceptionally skipped.
897 events.exception.ext_dabt_pending = 1;
898 /* KVM_CAP_ARM_INJECT_EXT_DABT implies KVM_CAP_VCPU_EVENTS */
899 if (!kvm_vcpu_ioctl(cs, KVM_SET_VCPU_EVENTS, &events)) {
900 env->ext_dabt_raised = 1;
901 return 0;
903 } else {
904 error_report("Data abort exception triggered by guest memory access "
905 "at physical address: 0x" TARGET_FMT_lx,
906 (target_ulong)fault_ipa);
907 error_printf("KVM unable to emulate faulting instruction.\n");
909 return -1;
912 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
914 int ret = 0;
916 switch (run->exit_reason) {
917 case KVM_EXIT_DEBUG:
918 if (kvm_arm_handle_debug(cs, &run->debug.arch)) {
919 ret = EXCP_DEBUG;
920 } /* otherwise return to guest */
921 break;
922 case KVM_EXIT_ARM_NISV:
923 /* External DABT with no valid iss to decode */
924 ret = kvm_arm_handle_dabt_nisv(cs, run->arm_nisv.esr_iss,
925 run->arm_nisv.fault_ipa);
926 break;
927 default:
928 qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n",
929 __func__, run->exit_reason);
930 break;
932 return ret;
935 bool kvm_arch_stop_on_emulation_error(CPUState *cs)
937 return true;
940 int kvm_arch_process_async_events(CPUState *cs)
942 return 0;
945 void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg)
947 if (kvm_sw_breakpoints_active(cs)) {
948 dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP;
950 if (kvm_arm_hw_debug_active(cs)) {
951 dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW;
952 kvm_arm_copy_hw_debug_data(&dbg->arch);
956 void kvm_arch_init_irq_routing(KVMState *s)
960 int kvm_arch_irqchip_create(KVMState *s)
962 if (kvm_kernel_irqchip_split()) {
963 perror("-machine kernel_irqchip=split is not supported on ARM.");
964 exit(1);
967 /* If we can create the VGIC using the newer device control API, we
968 * let the device do this when it initializes itself, otherwise we
969 * fall back to the old API */
970 return kvm_check_extension(s, KVM_CAP_DEVICE_CTRL);
973 int kvm_arm_vgic_probe(void)
975 int val = 0;
977 if (kvm_create_device(kvm_state,
978 KVM_DEV_TYPE_ARM_VGIC_V3, true) == 0) {
979 val |= KVM_ARM_VGIC_V3;
981 if (kvm_create_device(kvm_state,
982 KVM_DEV_TYPE_ARM_VGIC_V2, true) == 0) {
983 val |= KVM_ARM_VGIC_V2;
985 return val;
988 int kvm_arm_set_irq(int cpu, int irqtype, int irq, int level)
990 int kvm_irq = (irqtype << KVM_ARM_IRQ_TYPE_SHIFT) | irq;
991 int cpu_idx1 = cpu % 256;
992 int cpu_idx2 = cpu / 256;
994 kvm_irq |= (cpu_idx1 << KVM_ARM_IRQ_VCPU_SHIFT) |
995 (cpu_idx2 << KVM_ARM_IRQ_VCPU2_SHIFT);
997 return kvm_set_irq(kvm_state, kvm_irq, !!level);
1000 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
1001 uint64_t address, uint32_t data, PCIDevice *dev)
1003 AddressSpace *as = pci_device_iommu_address_space(dev);
1004 hwaddr xlat, len, doorbell_gpa;
1005 MemoryRegionSection mrs;
1006 MemoryRegion *mr;
1008 if (as == &address_space_memory) {
1009 return 0;
1012 /* MSI doorbell address is translated by an IOMMU */
1014 RCU_READ_LOCK_GUARD();
1016 mr = address_space_translate(as, address, &xlat, &len, true,
1017 MEMTXATTRS_UNSPECIFIED);
1019 if (!mr) {
1020 return 1;
1023 mrs = memory_region_find(mr, xlat, 1);
1025 if (!mrs.mr) {
1026 return 1;
1029 doorbell_gpa = mrs.offset_within_address_space;
1030 memory_region_unref(mrs.mr);
1032 route->u.msi.address_lo = doorbell_gpa;
1033 route->u.msi.address_hi = doorbell_gpa >> 32;
1035 trace_kvm_arm_fixup_msi_route(address, doorbell_gpa);
1037 return 0;
1040 int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
1041 int vector, PCIDevice *dev)
1043 return 0;
1046 int kvm_arch_release_virq_post(int virq)
1048 return 0;
1051 int kvm_arch_msi_data_to_gsi(uint32_t data)
1053 return (data - 32) & 0xffff;
1056 bool kvm_arch_cpu_check_are_resettable(void)
1058 return true;