2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 * Copyright (c) 2010 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "qemu/osdep.h"
28 #include "qapi/error.h"
29 #include "qapi/visitor.h"
30 #include "sysemu/sysemu.h"
31 #include "sysemu/numa.h"
34 #include "hw/fw-path-provider.h"
37 #include "sysemu/device_tree.h"
38 #include "sysemu/block-backend.h"
39 #include "sysemu/cpus.h"
40 #include "sysemu/hw_accel.h"
42 #include "migration/misc.h"
43 #include "migration/global_state.h"
44 #include "migration/register.h"
45 #include "mmu-hash64.h"
46 #include "mmu-book3s-v3.h"
47 #include "cpu-models.h"
50 #include "hw/boards.h"
51 #include "hw/ppc/ppc.h"
52 #include "hw/loader.h"
54 #include "hw/ppc/fdt.h"
55 #include "hw/ppc/spapr.h"
56 #include "hw/ppc/spapr_vio.h"
57 #include "hw/pci-host/spapr.h"
58 #include "hw/ppc/xics.h"
59 #include "hw/pci/msi.h"
61 #include "hw/pci/pci.h"
62 #include "hw/scsi/scsi.h"
63 #include "hw/virtio/virtio-scsi.h"
64 #include "hw/virtio/vhost-scsi-common.h"
66 #include "exec/address-spaces.h"
68 #include "qemu/config-file.h"
69 #include "qemu/error-report.h"
72 #include "hw/intc/intc.h"
74 #include "hw/compat.h"
75 #include "qemu/cutils.h"
76 #include "hw/ppc/spapr_cpu_core.h"
77 #include "qmp-commands.h"
81 /* SLOF memory layout:
83 * SLOF raw image loaded at 0, copies its romfs right below the flat
84 * device-tree, then position SLOF itself 31M below that
86 * So we set FW_OVERHEAD to 40MB which should account for all of that
89 * We load our kernel at 4M, leaving space for SLOF initial image
91 #define FDT_MAX_SIZE 0x100000
92 #define RTAS_MAX_SIZE 0x10000
93 #define RTAS_MAX_ADDR 0x80000000 /* RTAS must stay below that */
94 #define FW_MAX_SIZE 0x400000
95 #define FW_FILE_NAME "slof.bin"
96 #define FW_OVERHEAD 0x2800000
97 #define KERNEL_LOAD_ADDR FW_MAX_SIZE
99 #define MIN_RMA_SLOF 128UL
101 #define PHANDLE_XICP 0x00001111
103 static ICSState
*spapr_ics_create(sPAPRMachineState
*spapr
,
104 const char *type_ics
,
105 int nr_irqs
, Error
**errp
)
107 Error
*local_err
= NULL
;
110 obj
= object_new(type_ics
);
111 object_property_add_child(OBJECT(spapr
), "ics", obj
, &error_abort
);
112 object_property_add_const_link(obj
, ICS_PROP_XICS
, OBJECT(spapr
),
114 object_property_set_int(obj
, nr_irqs
, "nr-irqs", &local_err
);
118 object_property_set_bool(obj
, true, "realized", &local_err
);
123 return ICS_SIMPLE(obj
);
126 error_propagate(errp
, local_err
);
130 static bool pre_2_10_vmstate_dummy_icp_needed(void *opaque
)
132 /* Dummy entries correspond to unused ICPState objects in older QEMUs,
133 * and newer QEMUs don't even have them. In both cases, we don't want
134 * to send anything on the wire.
139 static const VMStateDescription pre_2_10_vmstate_dummy_icp
= {
140 .name
= "icp/server",
142 .minimum_version_id
= 1,
143 .needed
= pre_2_10_vmstate_dummy_icp_needed
,
144 .fields
= (VMStateField
[]) {
145 VMSTATE_UNUSED(4), /* uint32_t xirr */
146 VMSTATE_UNUSED(1), /* uint8_t pending_priority */
147 VMSTATE_UNUSED(1), /* uint8_t mfrr */
148 VMSTATE_END_OF_LIST()
152 static void pre_2_10_vmstate_register_dummy_icp(int i
)
154 vmstate_register(NULL
, i
, &pre_2_10_vmstate_dummy_icp
,
155 (void *)(uintptr_t) i
);
158 static void pre_2_10_vmstate_unregister_dummy_icp(int i
)
160 vmstate_unregister(NULL
, &pre_2_10_vmstate_dummy_icp
,
161 (void *)(uintptr_t) i
);
164 static inline int xics_max_server_number(void)
166 return DIV_ROUND_UP(max_cpus
* kvmppc_smt_threads(), smp_threads
);
169 static void xics_system_init(MachineState
*machine
, int nr_irqs
, Error
**errp
)
171 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
172 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(machine
);
175 if (machine_kernel_irqchip_allowed(machine
) &&
176 !xics_kvm_init(spapr
, errp
)) {
177 spapr
->icp_type
= TYPE_KVM_ICP
;
178 spapr
->ics
= spapr_ics_create(spapr
, TYPE_ICS_KVM
, nr_irqs
, errp
);
180 if (machine_kernel_irqchip_required(machine
) && !spapr
->ics
) {
181 error_prepend(errp
, "kernel_irqchip requested but unavailable: ");
187 xics_spapr_init(spapr
);
188 spapr
->icp_type
= TYPE_ICP
;
189 spapr
->ics
= spapr_ics_create(spapr
, TYPE_ICS_SIMPLE
, nr_irqs
, errp
);
195 if (smc
->pre_2_10_has_unused_icps
) {
198 for (i
= 0; i
< xics_max_server_number(); i
++) {
199 /* Dummy entries get deregistered when real ICPState objects
200 * are registered during CPU core hotplug.
202 pre_2_10_vmstate_register_dummy_icp(i
);
207 static int spapr_fixup_cpu_smt_dt(void *fdt
, int offset
, PowerPCCPU
*cpu
,
211 uint32_t servers_prop
[smt_threads
];
212 uint32_t gservers_prop
[smt_threads
* 2];
213 int index
= spapr_vcpu_id(cpu
);
215 if (cpu
->compat_pvr
) {
216 ret
= fdt_setprop_cell(fdt
, offset
, "cpu-version", cpu
->compat_pvr
);
222 /* Build interrupt servers and gservers properties */
223 for (i
= 0; i
< smt_threads
; i
++) {
224 servers_prop
[i
] = cpu_to_be32(index
+ i
);
225 /* Hack, direct the group queues back to cpu 0 */
226 gservers_prop
[i
*2] = cpu_to_be32(index
+ i
);
227 gservers_prop
[i
*2 + 1] = 0;
229 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-server#s",
230 servers_prop
, sizeof(servers_prop
));
234 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-gserver#s",
235 gservers_prop
, sizeof(gservers_prop
));
240 static int spapr_fixup_cpu_numa_dt(void *fdt
, int offset
, PowerPCCPU
*cpu
)
242 int index
= spapr_vcpu_id(cpu
);
243 uint32_t associativity
[] = {cpu_to_be32(0x5),
247 cpu_to_be32(cpu
->node_id
),
250 /* Advertise NUMA via ibm,associativity */
251 return fdt_setprop(fdt
, offset
, "ibm,associativity", associativity
,
252 sizeof(associativity
));
255 /* Populate the "ibm,pa-features" property */
256 static void spapr_populate_pa_features(PowerPCCPU
*cpu
, void *fdt
, int offset
,
259 CPUPPCState
*env
= &cpu
->env
;
260 uint8_t pa_features_206
[] = { 6, 0,
261 0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 };
262 uint8_t pa_features_207
[] = { 24, 0,
263 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0,
264 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
265 0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
266 0x80, 0x00, 0x80, 0x00, 0x00, 0x00 };
267 uint8_t pa_features_300
[] = { 66, 0,
268 /* 0: MMU|FPU|SLB|RUN|DABR|NX, 1: fri[nzpm]|DABRX|SPRG3|SLB0|PP110 */
269 /* 2: VPM|DS205|PPR|DS202|DS206, 3: LSD|URG, SSO, 5: LE|CFAR|EB|LSQ */
270 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0, /* 0 - 5 */
272 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */
274 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */
275 /* 18: Vec. Scalar, 20: Vec. XOR, 22: HTM */
276 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 18 - 23 */
277 /* 24: Ext. Dec, 26: 64 bit ftrs, 28: PM ftrs */
278 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 24 - 29 */
279 /* 30: MMR, 32: LE atomic, 34: EBB + ext EBB */
280 0x80, 0x00, 0x80, 0x00, 0xC0, 0x00, /* 30 - 35 */
281 /* 36: SPR SO, 38: Copy/Paste, 40: Radix MMU */
282 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 36 - 41 */
283 /* 42: PM, 44: PC RA, 46: SC vec'd */
284 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 42 - 47 */
285 /* 48: SIMD, 50: QP BFP, 52: String */
286 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 48 - 53 */
287 /* 54: DecFP, 56: DecI, 58: SHA */
288 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 54 - 59 */
289 /* 60: NM atomic, 62: RNG */
290 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 60 - 65 */
292 uint8_t *pa_features
= NULL
;
295 if (ppc_check_compat(cpu
, CPU_POWERPC_LOGICAL_2_06
, 0, cpu
->compat_pvr
)) {
296 pa_features
= pa_features_206
;
297 pa_size
= sizeof(pa_features_206
);
299 if (ppc_check_compat(cpu
, CPU_POWERPC_LOGICAL_2_07
, 0, cpu
->compat_pvr
)) {
300 pa_features
= pa_features_207
;
301 pa_size
= sizeof(pa_features_207
);
303 if (ppc_check_compat(cpu
, CPU_POWERPC_LOGICAL_3_00
, 0, cpu
->compat_pvr
)) {
304 pa_features
= pa_features_300
;
305 pa_size
= sizeof(pa_features_300
);
311 if (env
->ci_large_pages
) {
313 * Note: we keep CI large pages off by default because a 64K capable
314 * guest provisioned with large pages might otherwise try to map a qemu
315 * framebuffer (or other kind of memory mapped PCI BAR) using 64K pages
316 * even if that qemu runs on a 4k host.
317 * We dd this bit back here if we are confident this is not an issue
319 pa_features
[3] |= 0x20;
321 if (kvmppc_has_cap_htm() && pa_size
> 24) {
322 pa_features
[24] |= 0x80; /* Transactional memory support */
324 if (legacy_guest
&& pa_size
> 40) {
325 /* Workaround for broken kernels that attempt (guest) radix
326 * mode when they can't handle it, if they see the radix bit set
327 * in pa-features. So hide it from them. */
328 pa_features
[40 + 2] &= ~0x80; /* Radix MMU */
331 _FDT((fdt_setprop(fdt
, offset
, "ibm,pa-features", pa_features
, pa_size
)));
334 static int spapr_fixup_cpu_dt(void *fdt
, sPAPRMachineState
*spapr
)
336 int ret
= 0, offset
, cpus_offset
;
339 int smt
= kvmppc_smt_threads();
340 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
343 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
344 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
345 int index
= spapr_vcpu_id(cpu
);
346 int compat_smt
= MIN(smp_threads
, ppc_compat_max_threads(cpu
));
348 if ((index
% smt
) != 0) {
352 snprintf(cpu_model
, 32, "%s@%x", dc
->fw_name
, index
);
354 cpus_offset
= fdt_path_offset(fdt
, "/cpus");
355 if (cpus_offset
< 0) {
356 cpus_offset
= fdt_add_subnode(fdt
, 0, "cpus");
357 if (cpus_offset
< 0) {
361 offset
= fdt_subnode_offset(fdt
, cpus_offset
, cpu_model
);
363 offset
= fdt_add_subnode(fdt
, cpus_offset
, cpu_model
);
369 ret
= fdt_setprop(fdt
, offset
, "ibm,pft-size",
370 pft_size_prop
, sizeof(pft_size_prop
));
375 if (nb_numa_nodes
> 1) {
376 ret
= spapr_fixup_cpu_numa_dt(fdt
, offset
, cpu
);
382 ret
= spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
, compat_smt
);
387 spapr_populate_pa_features(cpu
, fdt
, offset
,
388 spapr
->cas_legacy_guest_workaround
);
393 static hwaddr
spapr_node0_size(MachineState
*machine
)
397 for (i
= 0; i
< nb_numa_nodes
; ++i
) {
398 if (numa_info
[i
].node_mem
) {
399 return MIN(pow2floor(numa_info
[i
].node_mem
),
404 return machine
->ram_size
;
407 static void add_str(GString
*s
, const gchar
*s1
)
409 g_string_append_len(s
, s1
, strlen(s1
) + 1);
412 static int spapr_populate_memory_node(void *fdt
, int nodeid
, hwaddr start
,
415 uint32_t associativity
[] = {
416 cpu_to_be32(0x4), /* length */
417 cpu_to_be32(0x0), cpu_to_be32(0x0),
418 cpu_to_be32(0x0), cpu_to_be32(nodeid
)
421 uint64_t mem_reg_property
[2];
424 mem_reg_property
[0] = cpu_to_be64(start
);
425 mem_reg_property
[1] = cpu_to_be64(size
);
427 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, start
);
428 off
= fdt_add_subnode(fdt
, 0, mem_name
);
430 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
431 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
432 sizeof(mem_reg_property
))));
433 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
434 sizeof(associativity
))));
438 static int spapr_populate_memory(sPAPRMachineState
*spapr
, void *fdt
)
440 MachineState
*machine
= MACHINE(spapr
);
441 hwaddr mem_start
, node_size
;
442 int i
, nb_nodes
= nb_numa_nodes
;
443 NodeInfo
*nodes
= numa_info
;
446 /* No NUMA nodes, assume there is just one node with whole RAM */
447 if (!nb_numa_nodes
) {
449 ramnode
.node_mem
= machine
->ram_size
;
453 for (i
= 0, mem_start
= 0; i
< nb_nodes
; ++i
) {
454 if (!nodes
[i
].node_mem
) {
457 if (mem_start
>= machine
->ram_size
) {
460 node_size
= nodes
[i
].node_mem
;
461 if (node_size
> machine
->ram_size
- mem_start
) {
462 node_size
= machine
->ram_size
- mem_start
;
466 /* ppc_spapr_init() checks for rma_size <= node0_size already */
467 spapr_populate_memory_node(fdt
, i
, 0, spapr
->rma_size
);
468 mem_start
+= spapr
->rma_size
;
469 node_size
-= spapr
->rma_size
;
471 for ( ; node_size
; ) {
472 hwaddr sizetmp
= pow2floor(node_size
);
474 /* mem_start != 0 here */
475 if (ctzl(mem_start
) < ctzl(sizetmp
)) {
476 sizetmp
= 1ULL << ctzl(mem_start
);
479 spapr_populate_memory_node(fdt
, i
, mem_start
, sizetmp
);
480 node_size
-= sizetmp
;
481 mem_start
+= sizetmp
;
488 static void spapr_populate_cpu_dt(CPUState
*cs
, void *fdt
, int offset
,
489 sPAPRMachineState
*spapr
)
491 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
492 CPUPPCState
*env
= &cpu
->env
;
493 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cs
);
494 int index
= spapr_vcpu_id(cpu
);
495 uint32_t segs
[] = {cpu_to_be32(28), cpu_to_be32(40),
496 0xffffffff, 0xffffffff};
497 uint32_t tbfreq
= kvm_enabled() ? kvmppc_get_tbfreq()
498 : SPAPR_TIMEBASE_FREQ
;
499 uint32_t cpufreq
= kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
500 uint32_t page_sizes_prop
[64];
501 size_t page_sizes_prop_size
;
502 uint32_t vcpus_per_socket
= smp_threads
* smp_cores
;
503 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
504 int compat_smt
= MIN(smp_threads
, ppc_compat_max_threads(cpu
));
505 sPAPRDRConnector
*drc
;
507 uint32_t radix_AP_encodings
[PPC_PAGE_SIZES_MAX_SZ
];
510 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_CPU
, index
);
512 drc_index
= spapr_drc_index(drc
);
513 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,my-drc-index", drc_index
)));
516 _FDT((fdt_setprop_cell(fdt
, offset
, "reg", index
)));
517 _FDT((fdt_setprop_string(fdt
, offset
, "device_type", "cpu")));
519 _FDT((fdt_setprop_cell(fdt
, offset
, "cpu-version", env
->spr
[SPR_PVR
])));
520 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-block-size",
521 env
->dcache_line_size
)));
522 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-line-size",
523 env
->dcache_line_size
)));
524 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-block-size",
525 env
->icache_line_size
)));
526 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-line-size",
527 env
->icache_line_size
)));
529 if (pcc
->l1_dcache_size
) {
530 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-size",
531 pcc
->l1_dcache_size
)));
533 warn_report("Unknown L1 dcache size for cpu");
535 if (pcc
->l1_icache_size
) {
536 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-size",
537 pcc
->l1_icache_size
)));
539 warn_report("Unknown L1 icache size for cpu");
542 _FDT((fdt_setprop_cell(fdt
, offset
, "timebase-frequency", tbfreq
)));
543 _FDT((fdt_setprop_cell(fdt
, offset
, "clock-frequency", cpufreq
)));
544 _FDT((fdt_setprop_cell(fdt
, offset
, "slb-size", env
->slb_nr
)));
545 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,slb-size", env
->slb_nr
)));
546 _FDT((fdt_setprop_string(fdt
, offset
, "status", "okay")));
547 _FDT((fdt_setprop(fdt
, offset
, "64-bit", NULL
, 0)));
549 if (env
->spr_cb
[SPR_PURR
].oea_read
) {
550 _FDT((fdt_setprop(fdt
, offset
, "ibm,purr", NULL
, 0)));
553 if (env
->mmu_model
& POWERPC_MMU_1TSEG
) {
554 _FDT((fdt_setprop(fdt
, offset
, "ibm,processor-segment-sizes",
555 segs
, sizeof(segs
))));
558 /* Advertise VMX/VSX (vector extensions) if available
559 * 0 / no property == no vector extensions
560 * 1 == VMX / Altivec available
561 * 2 == VSX available */
562 if (env
->insns_flags
& PPC_ALTIVEC
) {
563 uint32_t vmx
= (env
->insns_flags2
& PPC2_VSX
) ? 2 : 1;
565 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,vmx", vmx
)));
568 /* Advertise DFP (Decimal Floating Point) if available
569 * 0 / no property == no DFP
570 * 1 == DFP available */
571 if (env
->insns_flags2
& PPC2_DFP
) {
572 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,dfp", 1)));
575 page_sizes_prop_size
= ppc_create_page_sizes_prop(env
, page_sizes_prop
,
576 sizeof(page_sizes_prop
));
577 if (page_sizes_prop_size
) {
578 _FDT((fdt_setprop(fdt
, offset
, "ibm,segment-page-sizes",
579 page_sizes_prop
, page_sizes_prop_size
)));
582 spapr_populate_pa_features(cpu
, fdt
, offset
, false);
584 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,chip-id",
585 cs
->cpu_index
/ vcpus_per_socket
)));
587 _FDT((fdt_setprop(fdt
, offset
, "ibm,pft-size",
588 pft_size_prop
, sizeof(pft_size_prop
))));
590 if (nb_numa_nodes
> 1) {
591 _FDT(spapr_fixup_cpu_numa_dt(fdt
, offset
, cpu
));
594 _FDT(spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
, compat_smt
));
596 if (pcc
->radix_page_info
) {
597 for (i
= 0; i
< pcc
->radix_page_info
->count
; i
++) {
598 radix_AP_encodings
[i
] =
599 cpu_to_be32(pcc
->radix_page_info
->entries
[i
]);
601 _FDT((fdt_setprop(fdt
, offset
, "ibm,processor-radix-AP-encodings",
603 pcc
->radix_page_info
->count
*
604 sizeof(radix_AP_encodings
[0]))));
608 static void spapr_populate_cpus_dt_node(void *fdt
, sPAPRMachineState
*spapr
)
613 int smt
= kvmppc_smt_threads();
615 cpus_offset
= fdt_add_subnode(fdt
, 0, "cpus");
617 _FDT((fdt_setprop_cell(fdt
, cpus_offset
, "#address-cells", 0x1)));
618 _FDT((fdt_setprop_cell(fdt
, cpus_offset
, "#size-cells", 0x0)));
621 * We walk the CPUs in reverse order to ensure that CPU DT nodes
622 * created by fdt_add_subnode() end up in the right order in FDT
623 * for the guest kernel the enumerate the CPUs correctly.
625 CPU_FOREACH_REVERSE(cs
) {
626 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
627 int index
= spapr_vcpu_id(cpu
);
628 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
631 if ((index
% smt
) != 0) {
635 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, index
);
636 offset
= fdt_add_subnode(fdt
, cpus_offset
, nodename
);
639 spapr_populate_cpu_dt(cs
, fdt
, offset
, spapr
);
645 * Adds ibm,dynamic-reconfiguration-memory node.
646 * Refer to docs/specs/ppc-spapr-hotplug.txt for the documentation
647 * of this device tree node.
649 static int spapr_populate_drconf_memory(sPAPRMachineState
*spapr
, void *fdt
)
651 MachineState
*machine
= MACHINE(spapr
);
653 uint64_t lmb_size
= SPAPR_MEMORY_BLOCK_SIZE
;
654 uint32_t prop_lmb_size
[] = {0, cpu_to_be32(lmb_size
)};
655 uint32_t hotplug_lmb_start
= spapr
->hotplug_memory
.base
/ lmb_size
;
656 uint32_t nr_lmbs
= (spapr
->hotplug_memory
.base
+
657 memory_region_size(&spapr
->hotplug_memory
.mr
)) /
659 uint32_t *int_buf
, *cur_index
, buf_len
;
660 int nr_nodes
= nb_numa_nodes
? nb_numa_nodes
: 1;
663 * Don't create the node if there is no hotpluggable memory
665 if (machine
->ram_size
== machine
->maxram_size
) {
670 * Allocate enough buffer size to fit in ibm,dynamic-memory
671 * or ibm,associativity-lookup-arrays
673 buf_len
= MAX(nr_lmbs
* SPAPR_DR_LMB_LIST_ENTRY_SIZE
+ 1, nr_nodes
* 4 + 2)
675 cur_index
= int_buf
= g_malloc0(buf_len
);
677 offset
= fdt_add_subnode(fdt
, 0, "ibm,dynamic-reconfiguration-memory");
679 ret
= fdt_setprop(fdt
, offset
, "ibm,lmb-size", prop_lmb_size
,
680 sizeof(prop_lmb_size
));
685 ret
= fdt_setprop_cell(fdt
, offset
, "ibm,memory-flags-mask", 0xff);
690 ret
= fdt_setprop_cell(fdt
, offset
, "ibm,memory-preservation-time", 0x0);
695 /* ibm,dynamic-memory */
696 int_buf
[0] = cpu_to_be32(nr_lmbs
);
698 for (i
= 0; i
< nr_lmbs
; i
++) {
699 uint64_t addr
= i
* lmb_size
;
700 uint32_t *dynamic_memory
= cur_index
;
702 if (i
>= hotplug_lmb_start
) {
703 sPAPRDRConnector
*drc
;
705 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
, i
);
708 dynamic_memory
[0] = cpu_to_be32(addr
>> 32);
709 dynamic_memory
[1] = cpu_to_be32(addr
& 0xffffffff);
710 dynamic_memory
[2] = cpu_to_be32(spapr_drc_index(drc
));
711 dynamic_memory
[3] = cpu_to_be32(0); /* reserved */
712 dynamic_memory
[4] = cpu_to_be32(numa_get_node(addr
, NULL
));
713 if (memory_region_present(get_system_memory(), addr
)) {
714 dynamic_memory
[5] = cpu_to_be32(SPAPR_LMB_FLAGS_ASSIGNED
);
716 dynamic_memory
[5] = cpu_to_be32(0);
720 * LMB information for RMA, boot time RAM and gap b/n RAM and
721 * hotplug memory region -- all these are marked as reserved
722 * and as having no valid DRC.
724 dynamic_memory
[0] = cpu_to_be32(addr
>> 32);
725 dynamic_memory
[1] = cpu_to_be32(addr
& 0xffffffff);
726 dynamic_memory
[2] = cpu_to_be32(0);
727 dynamic_memory
[3] = cpu_to_be32(0); /* reserved */
728 dynamic_memory
[4] = cpu_to_be32(-1);
729 dynamic_memory
[5] = cpu_to_be32(SPAPR_LMB_FLAGS_RESERVED
|
730 SPAPR_LMB_FLAGS_DRC_INVALID
);
733 cur_index
+= SPAPR_DR_LMB_LIST_ENTRY_SIZE
;
735 ret
= fdt_setprop(fdt
, offset
, "ibm,dynamic-memory", int_buf
, buf_len
);
740 /* ibm,associativity-lookup-arrays */
742 int_buf
[0] = cpu_to_be32(nr_nodes
);
743 int_buf
[1] = cpu_to_be32(4); /* Number of entries per associativity list */
745 for (i
= 0; i
< nr_nodes
; i
++) {
746 uint32_t associativity
[] = {
752 memcpy(cur_index
, associativity
, sizeof(associativity
));
755 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity-lookup-arrays", int_buf
,
756 (cur_index
- int_buf
) * sizeof(uint32_t));
762 static int spapr_dt_cas_updates(sPAPRMachineState
*spapr
, void *fdt
,
763 sPAPROptionVector
*ov5_updates
)
765 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(spapr
);
768 /* Generate ibm,dynamic-reconfiguration-memory node if required */
769 if (spapr_ovec_test(ov5_updates
, OV5_DRCONF_MEMORY
)) {
770 g_assert(smc
->dr_lmb_enabled
);
771 ret
= spapr_populate_drconf_memory(spapr
, fdt
);
777 offset
= fdt_path_offset(fdt
, "/chosen");
779 offset
= fdt_add_subnode(fdt
, 0, "chosen");
784 ret
= spapr_ovec_populate_dt(fdt
, offset
, spapr
->ov5_cas
,
785 "ibm,architecture-vec-5");
791 static bool spapr_hotplugged_dev_before_cas(void)
793 Object
*drc_container
, *obj
;
794 ObjectProperty
*prop
;
795 ObjectPropertyIterator iter
;
797 drc_container
= container_get(object_get_root(), "/dr-connector");
798 object_property_iter_init(&iter
, drc_container
);
799 while ((prop
= object_property_iter_next(&iter
))) {
800 if (!strstart(prop
->type
, "link<", NULL
)) {
803 obj
= object_property_get_link(drc_container
, prop
->name
, NULL
);
804 if (spapr_drc_needed(obj
)) {
811 int spapr_h_cas_compose_response(sPAPRMachineState
*spapr
,
812 target_ulong addr
, target_ulong size
,
813 sPAPROptionVector
*ov5_updates
)
815 void *fdt
, *fdt_skel
;
816 sPAPRDeviceTreeUpdateHeader hdr
= { .version_id
= 1 };
818 if (spapr_hotplugged_dev_before_cas()) {
822 if (size
< sizeof(hdr
) || size
> FW_MAX_SIZE
) {
823 error_report("SLOF provided an unexpected CAS buffer size "
824 TARGET_FMT_lu
" (min: %zu, max: %u)",
825 size
, sizeof(hdr
), FW_MAX_SIZE
);
831 /* Create skeleton */
832 fdt_skel
= g_malloc0(size
);
833 _FDT((fdt_create(fdt_skel
, size
)));
834 _FDT((fdt_begin_node(fdt_skel
, "")));
835 _FDT((fdt_end_node(fdt_skel
)));
836 _FDT((fdt_finish(fdt_skel
)));
837 fdt
= g_malloc0(size
);
838 _FDT((fdt_open_into(fdt_skel
, fdt
, size
)));
841 /* Fixup cpu nodes */
842 _FDT((spapr_fixup_cpu_dt(fdt
, spapr
)));
844 if (spapr_dt_cas_updates(spapr
, fdt
, ov5_updates
)) {
848 /* Pack resulting tree */
849 _FDT((fdt_pack(fdt
)));
851 if (fdt_totalsize(fdt
) + sizeof(hdr
) > size
) {
852 trace_spapr_cas_failed(size
);
856 cpu_physical_memory_write(addr
, &hdr
, sizeof(hdr
));
857 cpu_physical_memory_write(addr
+ sizeof(hdr
), fdt
, fdt_totalsize(fdt
));
858 trace_spapr_cas_continue(fdt_totalsize(fdt
) + sizeof(hdr
));
864 static void spapr_dt_rtas(sPAPRMachineState
*spapr
, void *fdt
)
867 GString
*hypertas
= g_string_sized_new(256);
868 GString
*qemu_hypertas
= g_string_sized_new(256);
869 uint32_t refpoints
[] = { cpu_to_be32(0x4), cpu_to_be32(0x4) };
870 uint64_t max_hotplug_addr
= spapr
->hotplug_memory
.base
+
871 memory_region_size(&spapr
->hotplug_memory
.mr
);
872 uint32_t lrdr_capacity
[] = {
873 cpu_to_be32(max_hotplug_addr
>> 32),
874 cpu_to_be32(max_hotplug_addr
& 0xffffffff),
875 0, cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE
),
876 cpu_to_be32(max_cpus
/ smp_threads
),
879 _FDT(rtas
= fdt_add_subnode(fdt
, 0, "rtas"));
882 add_str(hypertas
, "hcall-pft");
883 add_str(hypertas
, "hcall-term");
884 add_str(hypertas
, "hcall-dabr");
885 add_str(hypertas
, "hcall-interrupt");
886 add_str(hypertas
, "hcall-tce");
887 add_str(hypertas
, "hcall-vio");
888 add_str(hypertas
, "hcall-splpar");
889 add_str(hypertas
, "hcall-bulk");
890 add_str(hypertas
, "hcall-set-mode");
891 add_str(hypertas
, "hcall-sprg0");
892 add_str(hypertas
, "hcall-copy");
893 add_str(hypertas
, "hcall-debug");
894 add_str(qemu_hypertas
, "hcall-memop1");
896 if (!kvm_enabled() || kvmppc_spapr_use_multitce()) {
897 add_str(hypertas
, "hcall-multi-tce");
900 if (spapr
->resize_hpt
!= SPAPR_RESIZE_HPT_DISABLED
) {
901 add_str(hypertas
, "hcall-hpt-resize");
904 _FDT(fdt_setprop(fdt
, rtas
, "ibm,hypertas-functions",
905 hypertas
->str
, hypertas
->len
));
906 g_string_free(hypertas
, TRUE
);
907 _FDT(fdt_setprop(fdt
, rtas
, "qemu,hypertas-functions",
908 qemu_hypertas
->str
, qemu_hypertas
->len
));
909 g_string_free(qemu_hypertas
, TRUE
);
911 _FDT(fdt_setprop(fdt
, rtas
, "ibm,associativity-reference-points",
912 refpoints
, sizeof(refpoints
)));
914 _FDT(fdt_setprop_cell(fdt
, rtas
, "rtas-error-log-max",
915 RTAS_ERROR_LOG_MAX
));
916 _FDT(fdt_setprop_cell(fdt
, rtas
, "rtas-event-scan-rate",
917 RTAS_EVENT_SCAN_RATE
));
920 _FDT(fdt_setprop(fdt
, rtas
, "ibm,change-msix-capable", NULL
, 0));
924 * According to PAPR, rtas ibm,os-term does not guarantee a return
925 * back to the guest cpu.
927 * While an additional ibm,extended-os-term property indicates
928 * that rtas call return will always occur. Set this property.
930 _FDT(fdt_setprop(fdt
, rtas
, "ibm,extended-os-term", NULL
, 0));
932 _FDT(fdt_setprop(fdt
, rtas
, "ibm,lrdr-capacity",
933 lrdr_capacity
, sizeof(lrdr_capacity
)));
935 spapr_dt_rtas_tokens(fdt
, rtas
);
938 /* Prepare ibm,arch-vec-5-platform-support, which indicates the MMU features
939 * that the guest may request and thus the valid values for bytes 24..26 of
940 * option vector 5: */
941 static void spapr_dt_ov5_platform_support(void *fdt
, int chosen
)
943 PowerPCCPU
*first_ppc_cpu
= POWERPC_CPU(first_cpu
);
946 23, 0x00, /* Xive mode, filled in below. */
947 24, 0x00, /* Hash/Radix, filled in below. */
948 25, 0x00, /* Hash options: Segment Tables == no, GTSE == no. */
949 26, 0x40, /* Radix options: GTSE == yes. */
952 if (!ppc_check_compat(first_ppc_cpu
, CPU_POWERPC_LOGICAL_3_00
, 0,
953 first_ppc_cpu
->compat_pvr
)) {
954 /* If we're in a pre POWER9 compat mode then the guest should do hash */
955 val
[3] = 0x00; /* Hash */
956 } else if (kvm_enabled()) {
957 if (kvmppc_has_cap_mmu_radix() && kvmppc_has_cap_mmu_hash_v3()) {
958 val
[3] = 0x80; /* OV5_MMU_BOTH */
959 } else if (kvmppc_has_cap_mmu_radix()) {
960 val
[3] = 0x40; /* OV5_MMU_RADIX_300 */
962 val
[3] = 0x00; /* Hash */
965 /* V3 MMU supports both hash and radix in tcg (with dynamic switching) */
968 _FDT(fdt_setprop(fdt
, chosen
, "ibm,arch-vec-5-platform-support",
972 static void spapr_dt_chosen(sPAPRMachineState
*spapr
, void *fdt
)
974 MachineState
*machine
= MACHINE(spapr
);
976 const char *boot_device
= machine
->boot_order
;
977 char *stdout_path
= spapr_vio_stdout_path(spapr
->vio_bus
);
979 char *bootlist
= get_boot_devices_list(&cb
, true);
981 _FDT(chosen
= fdt_add_subnode(fdt
, 0, "chosen"));
983 _FDT(fdt_setprop_string(fdt
, chosen
, "bootargs", machine
->kernel_cmdline
));
984 _FDT(fdt_setprop_cell(fdt
, chosen
, "linux,initrd-start",
985 spapr
->initrd_base
));
986 _FDT(fdt_setprop_cell(fdt
, chosen
, "linux,initrd-end",
987 spapr
->initrd_base
+ spapr
->initrd_size
));
989 if (spapr
->kernel_size
) {
990 uint64_t kprop
[2] = { cpu_to_be64(KERNEL_LOAD_ADDR
),
991 cpu_to_be64(spapr
->kernel_size
) };
993 _FDT(fdt_setprop(fdt
, chosen
, "qemu,boot-kernel",
994 &kprop
, sizeof(kprop
)));
995 if (spapr
->kernel_le
) {
996 _FDT(fdt_setprop(fdt
, chosen
, "qemu,boot-kernel-le", NULL
, 0));
1000 _FDT((fdt_setprop_cell(fdt
, chosen
, "qemu,boot-menu", boot_menu
)));
1002 _FDT(fdt_setprop_cell(fdt
, chosen
, "qemu,graphic-width", graphic_width
));
1003 _FDT(fdt_setprop_cell(fdt
, chosen
, "qemu,graphic-height", graphic_height
));
1004 _FDT(fdt_setprop_cell(fdt
, chosen
, "qemu,graphic-depth", graphic_depth
));
1006 if (cb
&& bootlist
) {
1009 for (i
= 0; i
< cb
; i
++) {
1010 if (bootlist
[i
] == '\n') {
1014 _FDT(fdt_setprop_string(fdt
, chosen
, "qemu,boot-list", bootlist
));
1017 if (boot_device
&& strlen(boot_device
)) {
1018 _FDT(fdt_setprop_string(fdt
, chosen
, "qemu,boot-device", boot_device
));
1021 if (!spapr
->has_graphics
&& stdout_path
) {
1022 _FDT(fdt_setprop_string(fdt
, chosen
, "linux,stdout-path", stdout_path
));
1025 spapr_dt_ov5_platform_support(fdt
, chosen
);
1027 g_free(stdout_path
);
1031 static void spapr_dt_hypervisor(sPAPRMachineState
*spapr
, void *fdt
)
1033 /* The /hypervisor node isn't in PAPR - this is a hack to allow PR
1034 * KVM to work under pHyp with some guest co-operation */
1036 uint8_t hypercall
[16];
1038 _FDT(hypervisor
= fdt_add_subnode(fdt
, 0, "hypervisor"));
1039 /* indicate KVM hypercall interface */
1040 _FDT(fdt_setprop_string(fdt
, hypervisor
, "compatible", "linux,kvm"));
1041 if (kvmppc_has_cap_fixup_hcalls()) {
1043 * Older KVM versions with older guest kernels were broken
1044 * with the magic page, don't allow the guest to map it.
1046 if (!kvmppc_get_hypercall(first_cpu
->env_ptr
, hypercall
,
1047 sizeof(hypercall
))) {
1048 _FDT(fdt_setprop(fdt
, hypervisor
, "hcall-instructions",
1049 hypercall
, sizeof(hypercall
)));
1054 static void *spapr_build_fdt(sPAPRMachineState
*spapr
,
1058 MachineState
*machine
= MACHINE(spapr
);
1059 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
1060 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(machine
);
1066 fdt
= g_malloc0(FDT_MAX_SIZE
);
1067 _FDT((fdt_create_empty_tree(fdt
, FDT_MAX_SIZE
)));
1070 _FDT(fdt_setprop_string(fdt
, 0, "device_type", "chrp"));
1071 _FDT(fdt_setprop_string(fdt
, 0, "model", "IBM pSeries (emulated by qemu)"));
1072 _FDT(fdt_setprop_string(fdt
, 0, "compatible", "qemu,pseries"));
1075 * Add info to guest to indentify which host is it being run on
1076 * and what is the uuid of the guest
1078 if (kvmppc_get_host_model(&buf
)) {
1079 _FDT(fdt_setprop_string(fdt
, 0, "host-model", buf
));
1082 if (kvmppc_get_host_serial(&buf
)) {
1083 _FDT(fdt_setprop_string(fdt
, 0, "host-serial", buf
));
1087 buf
= qemu_uuid_unparse_strdup(&qemu_uuid
);
1089 _FDT(fdt_setprop_string(fdt
, 0, "vm,uuid", buf
));
1090 if (qemu_uuid_set
) {
1091 _FDT(fdt_setprop_string(fdt
, 0, "system-id", buf
));
1095 if (qemu_get_vm_name()) {
1096 _FDT(fdt_setprop_string(fdt
, 0, "ibm,partition-name",
1097 qemu_get_vm_name()));
1100 _FDT(fdt_setprop_cell(fdt
, 0, "#address-cells", 2));
1101 _FDT(fdt_setprop_cell(fdt
, 0, "#size-cells", 2));
1103 /* /interrupt controller */
1104 spapr_dt_xics(xics_max_server_number(), fdt
, PHANDLE_XICP
);
1106 ret
= spapr_populate_memory(spapr
, fdt
);
1108 error_report("couldn't setup memory nodes in fdt");
1113 spapr_dt_vdevice(spapr
->vio_bus
, fdt
);
1115 if (object_resolve_path_type("", TYPE_SPAPR_RNG
, NULL
)) {
1116 ret
= spapr_rng_populate_dt(fdt
);
1118 error_report("could not set up rng device in the fdt");
1123 QLIST_FOREACH(phb
, &spapr
->phbs
, list
) {
1124 ret
= spapr_populate_pci_dt(phb
, PHANDLE_XICP
, fdt
);
1126 error_report("couldn't setup PCI devices in fdt");
1132 spapr_populate_cpus_dt_node(fdt
, spapr
);
1134 if (smc
->dr_lmb_enabled
) {
1135 _FDT(spapr_drc_populate_dt(fdt
, 0, NULL
, SPAPR_DR_CONNECTOR_TYPE_LMB
));
1138 if (mc
->has_hotpluggable_cpus
) {
1139 int offset
= fdt_path_offset(fdt
, "/cpus");
1140 ret
= spapr_drc_populate_dt(fdt
, offset
, NULL
,
1141 SPAPR_DR_CONNECTOR_TYPE_CPU
);
1143 error_report("Couldn't set up CPU DR device tree properties");
1148 /* /event-sources */
1149 spapr_dt_events(spapr
, fdt
);
1152 spapr_dt_rtas(spapr
, fdt
);
1155 spapr_dt_chosen(spapr
, fdt
);
1158 if (kvm_enabled()) {
1159 spapr_dt_hypervisor(spapr
, fdt
);
1162 /* Build memory reserve map */
1163 if (spapr
->kernel_size
) {
1164 _FDT((fdt_add_mem_rsv(fdt
, KERNEL_LOAD_ADDR
, spapr
->kernel_size
)));
1166 if (spapr
->initrd_size
) {
1167 _FDT((fdt_add_mem_rsv(fdt
, spapr
->initrd_base
, spapr
->initrd_size
)));
1170 /* ibm,client-architecture-support updates */
1171 ret
= spapr_dt_cas_updates(spapr
, fdt
, spapr
->ov5_cas
);
1173 error_report("couldn't setup CAS properties fdt");
1180 static uint64_t translate_kernel_address(void *opaque
, uint64_t addr
)
1182 return (addr
& 0x0fffffff) + KERNEL_LOAD_ADDR
;
1185 static void emulate_spapr_hypercall(PPCVirtualHypervisor
*vhyp
,
1188 CPUPPCState
*env
= &cpu
->env
;
1190 /* The TCG path should also be holding the BQL at this point */
1191 g_assert(qemu_mutex_iothread_locked());
1194 hcall_dprintf("Hypercall made with MSR[PR]=1\n");
1195 env
->gpr
[3] = H_PRIVILEGE
;
1197 env
->gpr
[3] = spapr_hypercall(cpu
, env
->gpr
[3], &env
->gpr
[4]);
1201 static uint64_t spapr_get_patbe(PPCVirtualHypervisor
*vhyp
)
1203 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1205 return spapr
->patb_entry
;
1208 #define HPTE(_table, _i) (void *)(((uint64_t *)(_table)) + ((_i) * 2))
1209 #define HPTE_VALID(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
1210 #define HPTE_DIRTY(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
1211 #define CLEAN_HPTE(_hpte) ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
1212 #define DIRTY_HPTE(_hpte) ((*(uint64_t *)(_hpte)) |= tswap64(HPTE64_V_HPTE_DIRTY))
1215 * Get the fd to access the kernel htab, re-opening it if necessary
1217 static int get_htab_fd(sPAPRMachineState
*spapr
)
1219 Error
*local_err
= NULL
;
1221 if (spapr
->htab_fd
>= 0) {
1222 return spapr
->htab_fd
;
1225 spapr
->htab_fd
= kvmppc_get_htab_fd(false, 0, &local_err
);
1226 if (spapr
->htab_fd
< 0) {
1227 error_report_err(local_err
);
1230 return spapr
->htab_fd
;
1233 void close_htab_fd(sPAPRMachineState
*spapr
)
1235 if (spapr
->htab_fd
>= 0) {
1236 close(spapr
->htab_fd
);
1238 spapr
->htab_fd
= -1;
1241 static hwaddr
spapr_hpt_mask(PPCVirtualHypervisor
*vhyp
)
1243 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1245 return HTAB_SIZE(spapr
) / HASH_PTEG_SIZE_64
- 1;
1248 static target_ulong
spapr_encode_hpt_for_kvm_pr(PPCVirtualHypervisor
*vhyp
)
1250 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1252 assert(kvm_enabled());
1258 return (target_ulong
)(uintptr_t)spapr
->htab
| (spapr
->htab_shift
- 18);
1261 static const ppc_hash_pte64_t
*spapr_map_hptes(PPCVirtualHypervisor
*vhyp
,
1264 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1265 hwaddr pte_offset
= ptex
* HASH_PTE_SIZE_64
;
1269 * HTAB is controlled by KVM. Fetch into temporary buffer
1271 ppc_hash_pte64_t
*hptes
= g_malloc(n
* HASH_PTE_SIZE_64
);
1272 kvmppc_read_hptes(hptes
, ptex
, n
);
1277 * HTAB is controlled by QEMU. Just point to the internally
1280 return (const ppc_hash_pte64_t
*)(spapr
->htab
+ pte_offset
);
1283 static void spapr_unmap_hptes(PPCVirtualHypervisor
*vhyp
,
1284 const ppc_hash_pte64_t
*hptes
,
1287 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1290 g_free((void *)hptes
);
1293 /* Nothing to do for qemu managed HPT */
1296 static void spapr_store_hpte(PPCVirtualHypervisor
*vhyp
, hwaddr ptex
,
1297 uint64_t pte0
, uint64_t pte1
)
1299 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1300 hwaddr offset
= ptex
* HASH_PTE_SIZE_64
;
1303 kvmppc_write_hpte(ptex
, pte0
, pte1
);
1305 stq_p(spapr
->htab
+ offset
, pte0
);
1306 stq_p(spapr
->htab
+ offset
+ HASH_PTE_SIZE_64
/ 2, pte1
);
1310 int spapr_hpt_shift_for_ramsize(uint64_t ramsize
)
1314 /* We aim for a hash table of size 1/128 the size of RAM (rounded
1315 * up). The PAPR recommendation is actually 1/64 of RAM size, but
1316 * that's much more than is needed for Linux guests */
1317 shift
= ctz64(pow2ceil(ramsize
)) - 7;
1318 shift
= MAX(shift
, 18); /* Minimum architected size */
1319 shift
= MIN(shift
, 46); /* Maximum architected size */
1323 void spapr_free_hpt(sPAPRMachineState
*spapr
)
1325 g_free(spapr
->htab
);
1327 spapr
->htab_shift
= 0;
1328 close_htab_fd(spapr
);
1331 void spapr_reallocate_hpt(sPAPRMachineState
*spapr
, int shift
,
1336 /* Clean up any HPT info from a previous boot */
1337 spapr_free_hpt(spapr
);
1339 rc
= kvmppc_reset_htab(shift
);
1341 /* kernel-side HPT needed, but couldn't allocate one */
1342 error_setg_errno(errp
, errno
,
1343 "Failed to allocate KVM HPT of order %d (try smaller maxmem?)",
1345 /* This is almost certainly fatal, but if the caller really
1346 * wants to carry on with shift == 0, it's welcome to try */
1347 } else if (rc
> 0) {
1348 /* kernel-side HPT allocated */
1351 "Requested order %d HPT, but kernel allocated order %ld (try smaller maxmem?)",
1355 spapr
->htab_shift
= shift
;
1358 /* kernel-side HPT not needed, allocate in userspace instead */
1359 size_t size
= 1ULL << shift
;
1362 spapr
->htab
= qemu_memalign(size
, size
);
1364 error_setg_errno(errp
, errno
,
1365 "Could not allocate HPT of order %d", shift
);
1369 memset(spapr
->htab
, 0, size
);
1370 spapr
->htab_shift
= shift
;
1372 for (i
= 0; i
< size
/ HASH_PTE_SIZE_64
; i
++) {
1373 DIRTY_HPTE(HPTE(spapr
->htab
, i
));
1378 void spapr_setup_hpt_and_vrma(sPAPRMachineState
*spapr
)
1382 if ((spapr
->resize_hpt
== SPAPR_RESIZE_HPT_DISABLED
)
1383 || (spapr
->cas_reboot
1384 && !spapr_ovec_test(spapr
->ov5_cas
, OV5_HPT_RESIZE
))) {
1385 hpt_shift
= spapr_hpt_shift_for_ramsize(MACHINE(spapr
)->maxram_size
);
1387 hpt_shift
= spapr_hpt_shift_for_ramsize(MACHINE(spapr
)->ram_size
);
1389 spapr_reallocate_hpt(spapr
, hpt_shift
, &error_fatal
);
1391 if (spapr
->vrma_adjust
) {
1392 spapr
->rma_size
= kvmppc_rma_size(spapr_node0_size(MACHINE(spapr
)),
1395 /* We're setting up a hash table, so that means we're not radix */
1396 spapr
->patb_entry
= 0;
1399 static void find_unknown_sysbus_device(SysBusDevice
*sbdev
, void *opaque
)
1401 bool matched
= false;
1403 if (object_dynamic_cast(OBJECT(sbdev
), TYPE_SPAPR_PCI_HOST_BRIDGE
)) {
1408 error_report("Device %s is not supported by this machine yet.",
1409 qdev_fw_name(DEVICE(sbdev
)));
1414 static int spapr_reset_drcs(Object
*child
, void *opaque
)
1416 sPAPRDRConnector
*drc
=
1417 (sPAPRDRConnector
*) object_dynamic_cast(child
,
1418 TYPE_SPAPR_DR_CONNECTOR
);
1421 spapr_drc_reset(drc
);
1427 static void ppc_spapr_reset(void)
1429 MachineState
*machine
= MACHINE(qdev_get_machine());
1430 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
1431 PowerPCCPU
*first_ppc_cpu
;
1432 uint32_t rtas_limit
;
1433 hwaddr rtas_addr
, fdt_addr
;
1437 /* Check for unknown sysbus devices */
1438 foreach_dynamic_sysbus_device(find_unknown_sysbus_device
, NULL
);
1440 if (kvm_enabled() && kvmppc_has_cap_mmu_radix()) {
1441 /* If using KVM with radix mode available, VCPUs can be started
1442 * without a HPT because KVM will start them in radix mode.
1443 * Set the GR bit in PATB so that we know there is no HPT. */
1444 spapr
->patb_entry
= PATBE1_GR
;
1446 spapr_setup_hpt_and_vrma(spapr
);
1449 qemu_devices_reset();
1451 /* DRC reset may cause a device to be unplugged. This will cause troubles
1452 * if this device is used by another device (eg, a running vhost backend
1453 * will crash QEMU if the DIMM holding the vring goes away). To avoid such
1454 * situations, we reset DRCs after all devices have been reset.
1456 object_child_foreach_recursive(object_get_root(), spapr_reset_drcs
, NULL
);
1458 spapr_clear_pending_events(spapr
);
1461 * We place the device tree and RTAS just below either the top of the RMA,
1462 * or just below 2GB, whichever is lowere, so that it can be
1463 * processed with 32-bit real mode code if necessary
1465 rtas_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
);
1466 rtas_addr
= rtas_limit
- RTAS_MAX_SIZE
;
1467 fdt_addr
= rtas_addr
- FDT_MAX_SIZE
;
1469 /* if this reset wasn't generated by CAS, we should reset our
1470 * negotiated options and start from scratch */
1471 if (!spapr
->cas_reboot
) {
1472 spapr_ovec_cleanup(spapr
->ov5_cas
);
1473 spapr
->ov5_cas
= spapr_ovec_new();
1475 ppc_set_compat_all(spapr
->max_compat_pvr
, &error_fatal
);
1478 fdt
= spapr_build_fdt(spapr
, rtas_addr
, spapr
->rtas_size
);
1480 spapr_load_rtas(spapr
, fdt
, rtas_addr
);
1484 /* Should only fail if we've built a corrupted tree */
1487 if (fdt_totalsize(fdt
) > FDT_MAX_SIZE
) {
1488 error_report("FDT too big ! 0x%x bytes (max is 0x%x)",
1489 fdt_totalsize(fdt
), FDT_MAX_SIZE
);
1494 qemu_fdt_dumpdtb(fdt
, fdt_totalsize(fdt
));
1495 cpu_physical_memory_write(fdt_addr
, fdt
, fdt_totalsize(fdt
));
1498 /* Set up the entry state */
1499 first_ppc_cpu
= POWERPC_CPU(first_cpu
);
1500 first_ppc_cpu
->env
.gpr
[3] = fdt_addr
;
1501 first_ppc_cpu
->env
.gpr
[5] = 0;
1502 first_cpu
->halted
= 0;
1503 first_ppc_cpu
->env
.nip
= SPAPR_ENTRY_POINT
;
1505 spapr
->cas_reboot
= false;
1508 static void spapr_create_nvram(sPAPRMachineState
*spapr
)
1510 DeviceState
*dev
= qdev_create(&spapr
->vio_bus
->bus
, "spapr-nvram");
1511 DriveInfo
*dinfo
= drive_get(IF_PFLASH
, 0, 0);
1514 qdev_prop_set_drive(dev
, "drive", blk_by_legacy_dinfo(dinfo
),
1518 qdev_init_nofail(dev
);
1520 spapr
->nvram
= (struct sPAPRNVRAM
*)dev
;
1523 static void spapr_rtc_create(sPAPRMachineState
*spapr
)
1525 object_initialize(&spapr
->rtc
, sizeof(spapr
->rtc
), TYPE_SPAPR_RTC
);
1526 object_property_add_child(OBJECT(spapr
), "rtc", OBJECT(&spapr
->rtc
),
1528 object_property_set_bool(OBJECT(&spapr
->rtc
), true, "realized",
1530 object_property_add_alias(OBJECT(spapr
), "rtc-time", OBJECT(&spapr
->rtc
),
1531 "date", &error_fatal
);
1534 /* Returns whether we want to use VGA or not */
1535 static bool spapr_vga_init(PCIBus
*pci_bus
, Error
**errp
)
1537 switch (vga_interface_type
) {
1544 return pci_vga_init(pci_bus
) != NULL
;
1547 "Unsupported VGA mode, only -vga std or -vga virtio is supported");
1552 static int spapr_post_load(void *opaque
, int version_id
)
1554 sPAPRMachineState
*spapr
= (sPAPRMachineState
*)opaque
;
1557 if (!object_dynamic_cast(OBJECT(spapr
->ics
), TYPE_ICS_KVM
)) {
1560 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
1561 icp_resend(ICP(cpu
->intc
));
1565 /* In earlier versions, there was no separate qdev for the PAPR
1566 * RTC, so the RTC offset was stored directly in sPAPREnvironment.
1567 * So when migrating from those versions, poke the incoming offset
1568 * value into the RTC device */
1569 if (version_id
< 3) {
1570 err
= spapr_rtc_import_offset(&spapr
->rtc
, spapr
->rtc_offset
);
1573 if (spapr
->patb_entry
) {
1574 PowerPCCPU
*cpu
= POWERPC_CPU(first_cpu
);
1575 bool radix
= !!(spapr
->patb_entry
& PATBE1_GR
);
1576 bool gtse
= !!(cpu
->env
.spr
[SPR_LPCR
] & LPCR_GTSE
);
1578 err
= kvmppc_configure_v3_mmu(cpu
, radix
, gtse
, spapr
->patb_entry
);
1580 error_report("Process table config unsupported by the host");
1588 static bool version_before_3(void *opaque
, int version_id
)
1590 return version_id
< 3;
1593 static bool spapr_pending_events_needed(void *opaque
)
1595 sPAPRMachineState
*spapr
= (sPAPRMachineState
*)opaque
;
1596 return !QTAILQ_EMPTY(&spapr
->pending_events
);
1599 static const VMStateDescription vmstate_spapr_event_entry
= {
1600 .name
= "spapr_event_log_entry",
1602 .minimum_version_id
= 1,
1603 .fields
= (VMStateField
[]) {
1604 VMSTATE_UINT32(summary
, sPAPREventLogEntry
),
1605 VMSTATE_UINT32(extended_length
, sPAPREventLogEntry
),
1606 VMSTATE_VBUFFER_ALLOC_UINT32(extended_log
, sPAPREventLogEntry
, 0,
1607 NULL
, extended_length
),
1608 VMSTATE_END_OF_LIST()
1612 static const VMStateDescription vmstate_spapr_pending_events
= {
1613 .name
= "spapr_pending_events",
1615 .minimum_version_id
= 1,
1616 .needed
= spapr_pending_events_needed
,
1617 .fields
= (VMStateField
[]) {
1618 VMSTATE_QTAILQ_V(pending_events
, sPAPRMachineState
, 1,
1619 vmstate_spapr_event_entry
, sPAPREventLogEntry
, next
),
1620 VMSTATE_END_OF_LIST()
1624 static bool spapr_ov5_cas_needed(void *opaque
)
1626 sPAPRMachineState
*spapr
= opaque
;
1627 sPAPROptionVector
*ov5_mask
= spapr_ovec_new();
1628 sPAPROptionVector
*ov5_legacy
= spapr_ovec_new();
1629 sPAPROptionVector
*ov5_removed
= spapr_ovec_new();
1632 /* Prior to the introduction of sPAPROptionVector, we had two option
1633 * vectors we dealt with: OV5_FORM1_AFFINITY, and OV5_DRCONF_MEMORY.
1634 * Both of these options encode machine topology into the device-tree
1635 * in such a way that the now-booted OS should still be able to interact
1636 * appropriately with QEMU regardless of what options were actually
1637 * negotiatied on the source side.
1639 * As such, we can avoid migrating the CAS-negotiated options if these
1640 * are the only options available on the current machine/platform.
1641 * Since these are the only options available for pseries-2.7 and
1642 * earlier, this allows us to maintain old->new/new->old migration
1645 * For QEMU 2.8+, there are additional CAS-negotiatable options available
1646 * via default pseries-2.8 machines and explicit command-line parameters.
1647 * Some of these options, like OV5_HP_EVT, *do* require QEMU to be aware
1648 * of the actual CAS-negotiated values to continue working properly. For
1649 * example, availability of memory unplug depends on knowing whether
1650 * OV5_HP_EVT was negotiated via CAS.
1652 * Thus, for any cases where the set of available CAS-negotiatable
1653 * options extends beyond OV5_FORM1_AFFINITY and OV5_DRCONF_MEMORY, we
1654 * include the CAS-negotiated options in the migration stream.
1656 spapr_ovec_set(ov5_mask
, OV5_FORM1_AFFINITY
);
1657 spapr_ovec_set(ov5_mask
, OV5_DRCONF_MEMORY
);
1659 /* spapr_ovec_diff returns true if bits were removed. we avoid using
1660 * the mask itself since in the future it's possible "legacy" bits may be
1661 * removed via machine options, which could generate a false positive
1662 * that breaks migration.
1664 spapr_ovec_intersect(ov5_legacy
, spapr
->ov5
, ov5_mask
);
1665 cas_needed
= spapr_ovec_diff(ov5_removed
, spapr
->ov5
, ov5_legacy
);
1667 spapr_ovec_cleanup(ov5_mask
);
1668 spapr_ovec_cleanup(ov5_legacy
);
1669 spapr_ovec_cleanup(ov5_removed
);
1674 static const VMStateDescription vmstate_spapr_ov5_cas
= {
1675 .name
= "spapr_option_vector_ov5_cas",
1677 .minimum_version_id
= 1,
1678 .needed
= spapr_ov5_cas_needed
,
1679 .fields
= (VMStateField
[]) {
1680 VMSTATE_STRUCT_POINTER_V(ov5_cas
, sPAPRMachineState
, 1,
1681 vmstate_spapr_ovec
, sPAPROptionVector
),
1682 VMSTATE_END_OF_LIST()
1686 static bool spapr_patb_entry_needed(void *opaque
)
1688 sPAPRMachineState
*spapr
= opaque
;
1690 return !!spapr
->patb_entry
;
1693 static const VMStateDescription vmstate_spapr_patb_entry
= {
1694 .name
= "spapr_patb_entry",
1696 .minimum_version_id
= 1,
1697 .needed
= spapr_patb_entry_needed
,
1698 .fields
= (VMStateField
[]) {
1699 VMSTATE_UINT64(patb_entry
, sPAPRMachineState
),
1700 VMSTATE_END_OF_LIST()
1704 static const VMStateDescription vmstate_spapr
= {
1707 .minimum_version_id
= 1,
1708 .post_load
= spapr_post_load
,
1709 .fields
= (VMStateField
[]) {
1710 /* used to be @next_irq */
1711 VMSTATE_UNUSED_BUFFER(version_before_3
, 0, 4),
1714 VMSTATE_UINT64_TEST(rtc_offset
, sPAPRMachineState
, version_before_3
),
1716 VMSTATE_PPC_TIMEBASE_V(tb
, sPAPRMachineState
, 2),
1717 VMSTATE_END_OF_LIST()
1719 .subsections
= (const VMStateDescription
*[]) {
1720 &vmstate_spapr_ov5_cas
,
1721 &vmstate_spapr_patb_entry
,
1722 &vmstate_spapr_pending_events
,
1727 static int htab_save_setup(QEMUFile
*f
, void *opaque
)
1729 sPAPRMachineState
*spapr
= opaque
;
1731 /* "Iteration" header */
1732 if (!spapr
->htab_shift
) {
1733 qemu_put_be32(f
, -1);
1735 qemu_put_be32(f
, spapr
->htab_shift
);
1739 spapr
->htab_save_index
= 0;
1740 spapr
->htab_first_pass
= true;
1742 if (spapr
->htab_shift
) {
1743 assert(kvm_enabled());
1751 static void htab_save_chunk(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1752 int chunkstart
, int n_valid
, int n_invalid
)
1754 qemu_put_be32(f
, chunkstart
);
1755 qemu_put_be16(f
, n_valid
);
1756 qemu_put_be16(f
, n_invalid
);
1757 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1758 HASH_PTE_SIZE_64
* n_valid
);
1761 static void htab_save_end_marker(QEMUFile
*f
)
1763 qemu_put_be32(f
, 0);
1764 qemu_put_be16(f
, 0);
1765 qemu_put_be16(f
, 0);
1768 static void htab_save_first_pass(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1771 bool has_timeout
= max_ns
!= -1;
1772 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1773 int index
= spapr
->htab_save_index
;
1774 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1776 assert(spapr
->htab_first_pass
);
1781 /* Consume invalid HPTEs */
1782 while ((index
< htabslots
)
1783 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1784 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1788 /* Consume valid HPTEs */
1790 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
1791 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1792 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1796 if (index
> chunkstart
) {
1797 int n_valid
= index
- chunkstart
;
1799 htab_save_chunk(f
, spapr
, chunkstart
, n_valid
, 0);
1802 (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1806 } while ((index
< htabslots
) && !qemu_file_rate_limit(f
));
1808 if (index
>= htabslots
) {
1809 assert(index
== htabslots
);
1811 spapr
->htab_first_pass
= false;
1813 spapr
->htab_save_index
= index
;
1816 static int htab_save_later_pass(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1819 bool final
= max_ns
< 0;
1820 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1821 int examined
= 0, sent
= 0;
1822 int index
= spapr
->htab_save_index
;
1823 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1825 assert(!spapr
->htab_first_pass
);
1828 int chunkstart
, invalidstart
;
1830 /* Consume non-dirty HPTEs */
1831 while ((index
< htabslots
)
1832 && !HPTE_DIRTY(HPTE(spapr
->htab
, index
))) {
1838 /* Consume valid dirty HPTEs */
1839 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
1840 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1841 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1842 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1847 invalidstart
= index
;
1848 /* Consume invalid dirty HPTEs */
1849 while ((index
< htabslots
) && (index
- invalidstart
< USHRT_MAX
)
1850 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1851 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1852 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1857 if (index
> chunkstart
) {
1858 int n_valid
= invalidstart
- chunkstart
;
1859 int n_invalid
= index
- invalidstart
;
1861 htab_save_chunk(f
, spapr
, chunkstart
, n_valid
, n_invalid
);
1862 sent
+= index
- chunkstart
;
1864 if (!final
&& (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1869 if (examined
>= htabslots
) {
1873 if (index
>= htabslots
) {
1874 assert(index
== htabslots
);
1877 } while ((examined
< htabslots
) && (!qemu_file_rate_limit(f
) || final
));
1879 if (index
>= htabslots
) {
1880 assert(index
== htabslots
);
1884 spapr
->htab_save_index
= index
;
1886 return (examined
>= htabslots
) && (sent
== 0) ? 1 : 0;
1889 #define MAX_ITERATION_NS 5000000 /* 5 ms */
1890 #define MAX_KVM_BUF_SIZE 2048
1892 static int htab_save_iterate(QEMUFile
*f
, void *opaque
)
1894 sPAPRMachineState
*spapr
= opaque
;
1898 /* Iteration header */
1899 if (!spapr
->htab_shift
) {
1900 qemu_put_be32(f
, -1);
1903 qemu_put_be32(f
, 0);
1907 assert(kvm_enabled());
1909 fd
= get_htab_fd(spapr
);
1914 rc
= kvmppc_save_htab(f
, fd
, MAX_KVM_BUF_SIZE
, MAX_ITERATION_NS
);
1918 } else if (spapr
->htab_first_pass
) {
1919 htab_save_first_pass(f
, spapr
, MAX_ITERATION_NS
);
1921 rc
= htab_save_later_pass(f
, spapr
, MAX_ITERATION_NS
);
1924 htab_save_end_marker(f
);
1929 static int htab_save_complete(QEMUFile
*f
, void *opaque
)
1931 sPAPRMachineState
*spapr
= opaque
;
1934 /* Iteration header */
1935 if (!spapr
->htab_shift
) {
1936 qemu_put_be32(f
, -1);
1939 qemu_put_be32(f
, 0);
1945 assert(kvm_enabled());
1947 fd
= get_htab_fd(spapr
);
1952 rc
= kvmppc_save_htab(f
, fd
, MAX_KVM_BUF_SIZE
, -1);
1957 if (spapr
->htab_first_pass
) {
1958 htab_save_first_pass(f
, spapr
, -1);
1960 htab_save_later_pass(f
, spapr
, -1);
1964 htab_save_end_marker(f
);
1969 static int htab_load(QEMUFile
*f
, void *opaque
, int version_id
)
1971 sPAPRMachineState
*spapr
= opaque
;
1972 uint32_t section_hdr
;
1974 Error
*local_err
= NULL
;
1976 if (version_id
< 1 || version_id
> 1) {
1977 error_report("htab_load() bad version");
1981 section_hdr
= qemu_get_be32(f
);
1983 if (section_hdr
== -1) {
1984 spapr_free_hpt(spapr
);
1989 /* First section gives the htab size */
1990 spapr_reallocate_hpt(spapr
, section_hdr
, &local_err
);
1992 error_report_err(local_err
);
1999 assert(kvm_enabled());
2001 fd
= kvmppc_get_htab_fd(true, 0, &local_err
);
2003 error_report_err(local_err
);
2010 uint16_t n_valid
, n_invalid
;
2012 index
= qemu_get_be32(f
);
2013 n_valid
= qemu_get_be16(f
);
2014 n_invalid
= qemu_get_be16(f
);
2016 if ((index
== 0) && (n_valid
== 0) && (n_invalid
== 0)) {
2021 if ((index
+ n_valid
+ n_invalid
) >
2022 (HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
)) {
2023 /* Bad index in stream */
2025 "htab_load() bad index %d (%hd+%hd entries) in htab stream (htab_shift=%d)",
2026 index
, n_valid
, n_invalid
, spapr
->htab_shift
);
2032 qemu_get_buffer(f
, HPTE(spapr
->htab
, index
),
2033 HASH_PTE_SIZE_64
* n_valid
);
2036 memset(HPTE(spapr
->htab
, index
+ n_valid
), 0,
2037 HASH_PTE_SIZE_64
* n_invalid
);
2044 rc
= kvmppc_load_htab_chunk(f
, fd
, index
, n_valid
, n_invalid
);
2059 static void htab_save_cleanup(void *opaque
)
2061 sPAPRMachineState
*spapr
= opaque
;
2063 close_htab_fd(spapr
);
2066 static SaveVMHandlers savevm_htab_handlers
= {
2067 .save_setup
= htab_save_setup
,
2068 .save_live_iterate
= htab_save_iterate
,
2069 .save_live_complete_precopy
= htab_save_complete
,
2070 .save_cleanup
= htab_save_cleanup
,
2071 .load_state
= htab_load
,
2074 static void spapr_boot_set(void *opaque
, const char *boot_device
,
2077 MachineState
*machine
= MACHINE(opaque
);
2078 machine
->boot_order
= g_strdup(boot_device
);
2081 static void spapr_create_lmb_dr_connectors(sPAPRMachineState
*spapr
)
2083 MachineState
*machine
= MACHINE(spapr
);
2084 uint64_t lmb_size
= SPAPR_MEMORY_BLOCK_SIZE
;
2085 uint32_t nr_lmbs
= (machine
->maxram_size
- machine
->ram_size
)/lmb_size
;
2088 for (i
= 0; i
< nr_lmbs
; i
++) {
2091 addr
= i
* lmb_size
+ spapr
->hotplug_memory
.base
;
2092 spapr_dr_connector_new(OBJECT(spapr
), TYPE_SPAPR_DRC_LMB
,
2098 * If RAM size, maxmem size and individual node mem sizes aren't aligned
2099 * to SPAPR_MEMORY_BLOCK_SIZE(256MB), then refuse to start the guest
2100 * since we can't support such unaligned sizes with DRCONF_MEMORY.
2102 static void spapr_validate_node_memory(MachineState
*machine
, Error
**errp
)
2106 if (machine
->ram_size
% SPAPR_MEMORY_BLOCK_SIZE
) {
2107 error_setg(errp
, "Memory size 0x" RAM_ADDR_FMT
2108 " is not aligned to %llu MiB",
2110 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
2114 if (machine
->maxram_size
% SPAPR_MEMORY_BLOCK_SIZE
) {
2115 error_setg(errp
, "Maximum memory size 0x" RAM_ADDR_FMT
2116 " is not aligned to %llu MiB",
2118 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
2122 for (i
= 0; i
< nb_numa_nodes
; i
++) {
2123 if (numa_info
[i
].node_mem
% SPAPR_MEMORY_BLOCK_SIZE
) {
2125 "Node %d memory size 0x%" PRIx64
2126 " is not aligned to %llu MiB",
2127 i
, numa_info
[i
].node_mem
,
2128 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
2134 /* find cpu slot in machine->possible_cpus by core_id */
2135 static CPUArchId
*spapr_find_cpu_slot(MachineState
*ms
, uint32_t id
, int *idx
)
2137 int index
= id
/ smp_threads
;
2139 if (index
>= ms
->possible_cpus
->len
) {
2145 return &ms
->possible_cpus
->cpus
[index
];
2148 static void spapr_init_cpus(sPAPRMachineState
*spapr
)
2150 MachineState
*machine
= MACHINE(spapr
);
2151 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
2152 const char *type
= spapr_get_cpu_core_type(machine
->cpu_type
);
2153 int smt
= kvmppc_smt_threads();
2154 const CPUArchIdList
*possible_cpus
;
2155 int boot_cores_nr
= smp_cpus
/ smp_threads
;
2159 error_report("Unable to find sPAPR CPU Core definition");
2163 possible_cpus
= mc
->possible_cpu_arch_ids(machine
);
2164 if (mc
->has_hotpluggable_cpus
) {
2165 if (smp_cpus
% smp_threads
) {
2166 error_report("smp_cpus (%u) must be multiple of threads (%u)",
2167 smp_cpus
, smp_threads
);
2170 if (max_cpus
% smp_threads
) {
2171 error_report("max_cpus (%u) must be multiple of threads (%u)",
2172 max_cpus
, smp_threads
);
2176 if (max_cpus
!= smp_cpus
) {
2177 error_report("This machine version does not support CPU hotplug");
2180 boot_cores_nr
= possible_cpus
->len
;
2183 for (i
= 0; i
< possible_cpus
->len
; i
++) {
2184 int core_id
= i
* smp_threads
;
2186 if (mc
->has_hotpluggable_cpus
) {
2187 spapr_dr_connector_new(OBJECT(spapr
), TYPE_SPAPR_DRC_CPU
,
2188 (core_id
/ smp_threads
) * smt
);
2191 if (i
< boot_cores_nr
) {
2192 Object
*core
= object_new(type
);
2193 int nr_threads
= smp_threads
;
2195 /* Handle the partially filled core for older machine types */
2196 if ((i
+ 1) * smp_threads
>= smp_cpus
) {
2197 nr_threads
= smp_cpus
- i
* smp_threads
;
2200 object_property_set_int(core
, nr_threads
, "nr-threads",
2202 object_property_set_int(core
, core_id
, CPU_CORE_PROP_CORE_ID
,
2204 object_property_set_bool(core
, true, "realized", &error_fatal
);
2209 static void spapr_set_vsmt_mode(sPAPRMachineState
*spapr
, Error
**errp
)
2211 Error
*local_err
= NULL
;
2212 bool vsmt_user
= !!spapr
->vsmt
;
2213 int kvm_smt
= kvmppc_smt_threads();
2216 if (!kvm_enabled() && (smp_threads
> 1)) {
2217 error_setg(&local_err
, "TCG cannot support more than 1 thread/core "
2218 "on a pseries machine");
2221 if (!is_power_of_2(smp_threads
)) {
2222 error_setg(&local_err
, "Cannot support %d threads/core on a pseries "
2223 "machine because it must be a power of 2", smp_threads
);
2227 /* Detemine the VSMT mode to use: */
2229 if (spapr
->vsmt
< smp_threads
) {
2230 error_setg(&local_err
, "Cannot support VSMT mode %d"
2231 " because it must be >= threads/core (%d)",
2232 spapr
->vsmt
, smp_threads
);
2235 /* In this case, spapr->vsmt has been set by the command line */
2237 /* Choose a VSMT mode that may be higher than necessary but is
2238 * likely to be compatible with hosts that don't have VSMT. */
2239 spapr
->vsmt
= MAX(kvm_smt
, smp_threads
);
2242 /* KVM: If necessary, set the SMT mode: */
2243 if (kvm_enabled() && (spapr
->vsmt
!= kvm_smt
)) {
2244 ret
= kvmppc_set_smt_threads(spapr
->vsmt
);
2246 error_setg(&local_err
,
2247 "Failed to set KVM's VSMT mode to %d (errno %d)",
2250 error_append_hint(&local_err
, "On PPC, a VM with %d threads/"
2251 "core on a host with %d threads/core requires "
2252 " the use of VSMT mode %d.\n",
2253 smp_threads
, kvm_smt
, spapr
->vsmt
);
2255 kvmppc_hint_smt_possible(&local_err
);
2259 /* else TCG: nothing to do currently */
2261 error_propagate(errp
, local_err
);
2264 /* pSeries LPAR / sPAPR hardware init */
2265 static void ppc_spapr_init(MachineState
*machine
)
2267 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
2268 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(machine
);
2269 const char *kernel_filename
= machine
->kernel_filename
;
2270 const char *initrd_filename
= machine
->initrd_filename
;
2273 MemoryRegion
*sysmem
= get_system_memory();
2274 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
2275 MemoryRegion
*rma_region
;
2277 hwaddr rma_alloc_size
;
2278 hwaddr node0_size
= spapr_node0_size(machine
);
2279 long load_limit
, fw_size
;
2281 Error
*resize_hpt_err
= NULL
;
2283 msi_nonbroken
= true;
2285 QLIST_INIT(&spapr
->phbs
);
2286 QTAILQ_INIT(&spapr
->pending_dimm_unplugs
);
2288 /* Check HPT resizing availability */
2289 kvmppc_check_papr_resize_hpt(&resize_hpt_err
);
2290 if (spapr
->resize_hpt
== SPAPR_RESIZE_HPT_DEFAULT
) {
2292 * If the user explicitly requested a mode we should either
2293 * supply it, or fail completely (which we do below). But if
2294 * it's not set explicitly, we reset our mode to something
2297 if (resize_hpt_err
) {
2298 spapr
->resize_hpt
= SPAPR_RESIZE_HPT_DISABLED
;
2299 error_free(resize_hpt_err
);
2300 resize_hpt_err
= NULL
;
2302 spapr
->resize_hpt
= smc
->resize_hpt_default
;
2306 assert(spapr
->resize_hpt
!= SPAPR_RESIZE_HPT_DEFAULT
);
2308 if ((spapr
->resize_hpt
!= SPAPR_RESIZE_HPT_DISABLED
) && resize_hpt_err
) {
2310 * User requested HPT resize, but this host can't supply it. Bail out
2312 error_report_err(resize_hpt_err
);
2316 /* Allocate RMA if necessary */
2317 rma_alloc_size
= kvmppc_alloc_rma(&rma
);
2319 if (rma_alloc_size
== -1) {
2320 error_report("Unable to create RMA");
2324 if (rma_alloc_size
&& (rma_alloc_size
< node0_size
)) {
2325 spapr
->rma_size
= rma_alloc_size
;
2327 spapr
->rma_size
= node0_size
;
2329 /* With KVM, we don't actually know whether KVM supports an
2330 * unbounded RMA (PR KVM) or is limited by the hash table size
2331 * (HV KVM using VRMA), so we always assume the latter
2333 * In that case, we also limit the initial allocations for RTAS
2334 * etc... to 256M since we have no way to know what the VRMA size
2335 * is going to be as it depends on the size of the hash table
2336 * isn't determined yet.
2338 if (kvm_enabled()) {
2339 spapr
->vrma_adjust
= 1;
2340 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x10000000);
2343 /* Actually we don't support unbounded RMA anymore since we
2344 * added proper emulation of HV mode. The max we can get is
2345 * 16G which also happens to be what we configure for PAPR
2346 * mode so make sure we don't do anything bigger than that
2348 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x400000000ull
);
2351 if (spapr
->rma_size
> node0_size
) {
2352 error_report("Numa node 0 has to span the RMA (%#08"HWADDR_PRIx
")",
2357 /* Setup a load limit for the ramdisk leaving room for SLOF and FDT */
2358 load_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
) - FW_OVERHEAD
;
2360 /* Set up Interrupt Controller before we create the VCPUs */
2361 xics_system_init(machine
, XICS_IRQS_SPAPR
, &error_fatal
);
2363 /* Set up containers for ibm,client-architecture-support negotiated options
2365 spapr
->ov5
= spapr_ovec_new();
2366 spapr
->ov5_cas
= spapr_ovec_new();
2368 if (smc
->dr_lmb_enabled
) {
2369 spapr_ovec_set(spapr
->ov5
, OV5_DRCONF_MEMORY
);
2370 spapr_validate_node_memory(machine
, &error_fatal
);
2373 spapr_ovec_set(spapr
->ov5
, OV5_FORM1_AFFINITY
);
2374 if (!kvm_enabled() || kvmppc_has_cap_mmu_radix()) {
2375 /* KVM and TCG always allow GTSE with radix... */
2376 spapr_ovec_set(spapr
->ov5
, OV5_MMU_RADIX_GTSE
);
2378 /* ... but not with hash (currently). */
2380 /* advertise support for dedicated HP event source to guests */
2381 if (spapr
->use_hotplug_event_source
) {
2382 spapr_ovec_set(spapr
->ov5
, OV5_HP_EVT
);
2385 /* advertise support for HPT resizing */
2386 if (spapr
->resize_hpt
!= SPAPR_RESIZE_HPT_DISABLED
) {
2387 spapr_ovec_set(spapr
->ov5
, OV5_HPT_RESIZE
);
2391 spapr_set_vsmt_mode(spapr
, &error_fatal
);
2393 spapr_init_cpus(spapr
);
2395 if (kvm_enabled()) {
2396 /* Enable H_LOGICAL_CI_* so SLOF can talk to in-kernel devices */
2397 kvmppc_enable_logical_ci_hcalls();
2398 kvmppc_enable_set_mode_hcall();
2400 /* H_CLEAR_MOD/_REF are mandatory in PAPR, but off by default */
2401 kvmppc_enable_clear_ref_mod_hcalls();
2405 memory_region_allocate_system_memory(ram
, NULL
, "ppc_spapr.ram",
2407 memory_region_add_subregion(sysmem
, 0, ram
);
2409 if (rma_alloc_size
&& rma
) {
2410 rma_region
= g_new(MemoryRegion
, 1);
2411 memory_region_init_ram_ptr(rma_region
, NULL
, "ppc_spapr.rma",
2412 rma_alloc_size
, rma
);
2413 vmstate_register_ram_global(rma_region
);
2414 memory_region_add_subregion(sysmem
, 0, rma_region
);
2417 /* initialize hotplug memory address space */
2418 if (machine
->ram_size
< machine
->maxram_size
) {
2419 ram_addr_t hotplug_mem_size
= machine
->maxram_size
- machine
->ram_size
;
2421 * Limit the number of hotpluggable memory slots to half the number
2422 * slots that KVM supports, leaving the other half for PCI and other
2423 * devices. However ensure that number of slots doesn't drop below 32.
2425 int max_memslots
= kvm_enabled() ? kvm_get_max_memslots() / 2 :
2426 SPAPR_MAX_RAM_SLOTS
;
2428 if (max_memslots
< SPAPR_MAX_RAM_SLOTS
) {
2429 max_memslots
= SPAPR_MAX_RAM_SLOTS
;
2431 if (machine
->ram_slots
> max_memslots
) {
2432 error_report("Specified number of memory slots %"
2433 PRIu64
" exceeds max supported %d",
2434 machine
->ram_slots
, max_memslots
);
2438 spapr
->hotplug_memory
.base
= ROUND_UP(machine
->ram_size
,
2439 SPAPR_HOTPLUG_MEM_ALIGN
);
2440 memory_region_init(&spapr
->hotplug_memory
.mr
, OBJECT(spapr
),
2441 "hotplug-memory", hotplug_mem_size
);
2442 memory_region_add_subregion(sysmem
, spapr
->hotplug_memory
.base
,
2443 &spapr
->hotplug_memory
.mr
);
2446 if (smc
->dr_lmb_enabled
) {
2447 spapr_create_lmb_dr_connectors(spapr
);
2450 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, "spapr-rtas.bin");
2452 error_report("Could not find LPAR rtas '%s'", "spapr-rtas.bin");
2455 spapr
->rtas_size
= get_image_size(filename
);
2456 if (spapr
->rtas_size
< 0) {
2457 error_report("Could not get size of LPAR rtas '%s'", filename
);
2460 spapr
->rtas_blob
= g_malloc(spapr
->rtas_size
);
2461 if (load_image_size(filename
, spapr
->rtas_blob
, spapr
->rtas_size
) < 0) {
2462 error_report("Could not load LPAR rtas '%s'", filename
);
2465 if (spapr
->rtas_size
> RTAS_MAX_SIZE
) {
2466 error_report("RTAS too big ! 0x%zx bytes (max is 0x%x)",
2467 (size_t)spapr
->rtas_size
, RTAS_MAX_SIZE
);
2472 /* Set up RTAS event infrastructure */
2473 spapr_events_init(spapr
);
2475 /* Set up the RTC RTAS interfaces */
2476 spapr_rtc_create(spapr
);
2478 /* Set up VIO bus */
2479 spapr
->vio_bus
= spapr_vio_bus_init();
2481 for (i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
2482 if (serial_hds
[i
]) {
2483 spapr_vty_create(spapr
->vio_bus
, serial_hds
[i
]);
2487 /* We always have at least the nvram device on VIO */
2488 spapr_create_nvram(spapr
);
2491 spapr_pci_rtas_init();
2493 phb
= spapr_create_phb(spapr
, 0);
2495 for (i
= 0; i
< nb_nics
; i
++) {
2496 NICInfo
*nd
= &nd_table
[i
];
2499 nd
->model
= g_strdup("ibmveth");
2502 if (strcmp(nd
->model
, "ibmveth") == 0) {
2503 spapr_vlan_create(spapr
->vio_bus
, nd
);
2505 pci_nic_init_nofail(&nd_table
[i
], phb
->bus
, nd
->model
, NULL
);
2509 for (i
= 0; i
<= drive_get_max_bus(IF_SCSI
); i
++) {
2510 spapr_vscsi_create(spapr
->vio_bus
);
2514 if (spapr_vga_init(phb
->bus
, &error_fatal
)) {
2515 spapr
->has_graphics
= true;
2516 machine
->usb
|= defaults_enabled() && !machine
->usb_disabled
;
2520 if (smc
->use_ohci_by_default
) {
2521 pci_create_simple(phb
->bus
, -1, "pci-ohci");
2523 pci_create_simple(phb
->bus
, -1, "nec-usb-xhci");
2526 if (spapr
->has_graphics
) {
2527 USBBus
*usb_bus
= usb_bus_find(-1);
2529 usb_create_simple(usb_bus
, "usb-kbd");
2530 usb_create_simple(usb_bus
, "usb-mouse");
2534 if (spapr
->rma_size
< (MIN_RMA_SLOF
<< 20)) {
2536 "pSeries SLOF firmware requires >= %ldM guest RMA (Real Mode Area memory)",
2541 if (kernel_filename
) {
2542 uint64_t lowaddr
= 0;
2544 spapr
->kernel_size
= load_elf(kernel_filename
, translate_kernel_address
,
2545 NULL
, NULL
, &lowaddr
, NULL
, 1,
2546 PPC_ELF_MACHINE
, 0, 0);
2547 if (spapr
->kernel_size
== ELF_LOAD_WRONG_ENDIAN
) {
2548 spapr
->kernel_size
= load_elf(kernel_filename
,
2549 translate_kernel_address
, NULL
, NULL
,
2550 &lowaddr
, NULL
, 0, PPC_ELF_MACHINE
,
2552 spapr
->kernel_le
= spapr
->kernel_size
> 0;
2554 if (spapr
->kernel_size
< 0) {
2555 error_report("error loading %s: %s", kernel_filename
,
2556 load_elf_strerror(spapr
->kernel_size
));
2561 if (initrd_filename
) {
2562 /* Try to locate the initrd in the gap between the kernel
2563 * and the firmware. Add a bit of space just in case
2565 spapr
->initrd_base
= (KERNEL_LOAD_ADDR
+ spapr
->kernel_size
2566 + 0x1ffff) & ~0xffff;
2567 spapr
->initrd_size
= load_image_targphys(initrd_filename
,
2570 - spapr
->initrd_base
);
2571 if (spapr
->initrd_size
< 0) {
2572 error_report("could not load initial ram disk '%s'",
2579 if (bios_name
== NULL
) {
2580 bios_name
= FW_FILE_NAME
;
2582 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
2584 error_report("Could not find LPAR firmware '%s'", bios_name
);
2587 fw_size
= load_image_targphys(filename
, 0, FW_MAX_SIZE
);
2589 error_report("Could not load LPAR firmware '%s'", filename
);
2594 /* FIXME: Should register things through the MachineState's qdev
2595 * interface, this is a legacy from the sPAPREnvironment structure
2596 * which predated MachineState but had a similar function */
2597 vmstate_register(NULL
, 0, &vmstate_spapr
, spapr
);
2598 register_savevm_live(NULL
, "spapr/htab", -1, 1,
2599 &savevm_htab_handlers
, spapr
);
2601 qemu_register_boot_set(spapr_boot_set
, spapr
);
2603 if (kvm_enabled()) {
2604 /* to stop and start vmclock */
2605 qemu_add_vm_change_state_handler(cpu_ppc_clock_vm_state_change
,
2608 kvmppc_spapr_enable_inkernel_multitce();
2612 static int spapr_kvm_type(const char *vm_type
)
2618 if (!strcmp(vm_type
, "HV")) {
2622 if (!strcmp(vm_type
, "PR")) {
2626 error_report("Unknown kvm-type specified '%s'", vm_type
);
2631 * Implementation of an interface to adjust firmware path
2632 * for the bootindex property handling.
2634 static char *spapr_get_fw_dev_path(FWPathProvider
*p
, BusState
*bus
,
2637 #define CAST(type, obj, name) \
2638 ((type *)object_dynamic_cast(OBJECT(obj), (name)))
2639 SCSIDevice
*d
= CAST(SCSIDevice
, dev
, TYPE_SCSI_DEVICE
);
2640 sPAPRPHBState
*phb
= CAST(sPAPRPHBState
, dev
, TYPE_SPAPR_PCI_HOST_BRIDGE
);
2641 VHostSCSICommon
*vsc
= CAST(VHostSCSICommon
, dev
, TYPE_VHOST_SCSI_COMMON
);
2644 void *spapr
= CAST(void, bus
->parent
, "spapr-vscsi");
2645 VirtIOSCSI
*virtio
= CAST(VirtIOSCSI
, bus
->parent
, TYPE_VIRTIO_SCSI
);
2646 USBDevice
*usb
= CAST(USBDevice
, bus
->parent
, TYPE_USB_DEVICE
);
2650 * Replace "channel@0/disk@0,0" with "disk@8000000000000000":
2651 * We use SRP luns of the form 8000 | (bus << 8) | (id << 5) | lun
2652 * in the top 16 bits of the 64-bit LUN
2654 unsigned id
= 0x8000 | (d
->id
<< 8) | d
->lun
;
2655 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2656 (uint64_t)id
<< 48);
2657 } else if (virtio
) {
2659 * We use SRP luns of the form 01000000 | (target << 8) | lun
2660 * in the top 32 bits of the 64-bit LUN
2661 * Note: the quote above is from SLOF and it is wrong,
2662 * the actual binding is:
2663 * swap 0100 or 10 << or 20 << ( target lun-id -- srplun )
2665 unsigned id
= 0x1000000 | (d
->id
<< 16) | d
->lun
;
2666 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2667 (uint64_t)id
<< 32);
2670 * We use SRP luns of the form 01000000 | (usb-port << 16) | lun
2671 * in the top 32 bits of the 64-bit LUN
2673 unsigned usb_port
= atoi(usb
->port
->path
);
2674 unsigned id
= 0x1000000 | (usb_port
<< 16) | d
->lun
;
2675 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2676 (uint64_t)id
<< 32);
2681 * SLOF probes the USB devices, and if it recognizes that the device is a
2682 * storage device, it changes its name to "storage" instead of "usb-host",
2683 * and additionally adds a child node for the SCSI LUN, so the correct
2684 * boot path in SLOF is something like .../storage@1/disk@xxx" instead.
2686 if (strcmp("usb-host", qdev_fw_name(dev
)) == 0) {
2687 USBDevice
*usbdev
= CAST(USBDevice
, dev
, TYPE_USB_DEVICE
);
2688 if (usb_host_dev_is_scsi_storage(usbdev
)) {
2689 return g_strdup_printf("storage@%s/disk", usbdev
->port
->path
);
2694 /* Replace "pci" with "pci@800000020000000" */
2695 return g_strdup_printf("pci@%"PRIX64
, phb
->buid
);
2699 /* Same logic as virtio above */
2700 unsigned id
= 0x1000000 | (vsc
->target
<< 16) | vsc
->lun
;
2701 return g_strdup_printf("disk@%"PRIX64
, (uint64_t)id
<< 32);
2704 if (g_str_equal("pci-bridge", qdev_fw_name(dev
))) {
2705 /* SLOF uses "pci" instead of "pci-bridge" for PCI bridges */
2706 PCIDevice
*pcidev
= CAST(PCIDevice
, dev
, TYPE_PCI_DEVICE
);
2707 return g_strdup_printf("pci@%x", PCI_SLOT(pcidev
->devfn
));
2713 static char *spapr_get_kvm_type(Object
*obj
, Error
**errp
)
2715 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2717 return g_strdup(spapr
->kvm_type
);
2720 static void spapr_set_kvm_type(Object
*obj
, const char *value
, Error
**errp
)
2722 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2724 g_free(spapr
->kvm_type
);
2725 spapr
->kvm_type
= g_strdup(value
);
2728 static bool spapr_get_modern_hotplug_events(Object
*obj
, Error
**errp
)
2730 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2732 return spapr
->use_hotplug_event_source
;
2735 static void spapr_set_modern_hotplug_events(Object
*obj
, bool value
,
2738 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2740 spapr
->use_hotplug_event_source
= value
;
2743 static char *spapr_get_resize_hpt(Object
*obj
, Error
**errp
)
2745 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2747 switch (spapr
->resize_hpt
) {
2748 case SPAPR_RESIZE_HPT_DEFAULT
:
2749 return g_strdup("default");
2750 case SPAPR_RESIZE_HPT_DISABLED
:
2751 return g_strdup("disabled");
2752 case SPAPR_RESIZE_HPT_ENABLED
:
2753 return g_strdup("enabled");
2754 case SPAPR_RESIZE_HPT_REQUIRED
:
2755 return g_strdup("required");
2757 g_assert_not_reached();
2760 static void spapr_set_resize_hpt(Object
*obj
, const char *value
, Error
**errp
)
2762 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2764 if (strcmp(value
, "default") == 0) {
2765 spapr
->resize_hpt
= SPAPR_RESIZE_HPT_DEFAULT
;
2766 } else if (strcmp(value
, "disabled") == 0) {
2767 spapr
->resize_hpt
= SPAPR_RESIZE_HPT_DISABLED
;
2768 } else if (strcmp(value
, "enabled") == 0) {
2769 spapr
->resize_hpt
= SPAPR_RESIZE_HPT_ENABLED
;
2770 } else if (strcmp(value
, "required") == 0) {
2771 spapr
->resize_hpt
= SPAPR_RESIZE_HPT_REQUIRED
;
2773 error_setg(errp
, "Bad value for \"resize-hpt\" property");
2777 static void spapr_get_vsmt(Object
*obj
, Visitor
*v
, const char *name
,
2778 void *opaque
, Error
**errp
)
2780 visit_type_uint32(v
, name
, (uint32_t *)opaque
, errp
);
2783 static void spapr_set_vsmt(Object
*obj
, Visitor
*v
, const char *name
,
2784 void *opaque
, Error
**errp
)
2786 visit_type_uint32(v
, name
, (uint32_t *)opaque
, errp
);
2789 static void spapr_machine_initfn(Object
*obj
)
2791 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2793 spapr
->htab_fd
= -1;
2794 spapr
->use_hotplug_event_source
= true;
2795 object_property_add_str(obj
, "kvm-type",
2796 spapr_get_kvm_type
, spapr_set_kvm_type
, NULL
);
2797 object_property_set_description(obj
, "kvm-type",
2798 "Specifies the KVM virtualization mode (HV, PR)",
2800 object_property_add_bool(obj
, "modern-hotplug-events",
2801 spapr_get_modern_hotplug_events
,
2802 spapr_set_modern_hotplug_events
,
2804 object_property_set_description(obj
, "modern-hotplug-events",
2805 "Use dedicated hotplug event mechanism in"
2806 " place of standard EPOW events when possible"
2807 " (required for memory hot-unplug support)",
2810 ppc_compat_add_property(obj
, "max-cpu-compat", &spapr
->max_compat_pvr
,
2811 "Maximum permitted CPU compatibility mode",
2814 object_property_add_str(obj
, "resize-hpt",
2815 spapr_get_resize_hpt
, spapr_set_resize_hpt
, NULL
);
2816 object_property_set_description(obj
, "resize-hpt",
2817 "Resizing of the Hash Page Table (enabled, disabled, required)",
2819 object_property_add(obj
, "vsmt", "uint32", spapr_get_vsmt
,
2820 spapr_set_vsmt
, NULL
, &spapr
->vsmt
, &error_abort
);
2821 object_property_set_description(obj
, "vsmt",
2822 "Virtual SMT: KVM behaves as if this were"
2823 " the host's SMT mode", &error_abort
);
2826 static void spapr_machine_finalizefn(Object
*obj
)
2828 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2830 g_free(spapr
->kvm_type
);
2833 void spapr_do_system_reset_on_cpu(CPUState
*cs
, run_on_cpu_data arg
)
2835 cpu_synchronize_state(cs
);
2836 ppc_cpu_do_system_reset(cs
);
2839 static void spapr_nmi(NMIState
*n
, int cpu_index
, Error
**errp
)
2844 async_run_on_cpu(cs
, spapr_do_system_reset_on_cpu
, RUN_ON_CPU_NULL
);
2848 static void spapr_add_lmbs(DeviceState
*dev
, uint64_t addr_start
, uint64_t size
,
2849 uint32_t node
, bool dedicated_hp_event_source
,
2852 sPAPRDRConnector
*drc
;
2853 uint32_t nr_lmbs
= size
/SPAPR_MEMORY_BLOCK_SIZE
;
2854 int i
, fdt_offset
, fdt_size
;
2856 uint64_t addr
= addr_start
;
2857 bool hotplugged
= spapr_drc_hotplugged(dev
);
2858 Error
*local_err
= NULL
;
2860 for (i
= 0; i
< nr_lmbs
; i
++) {
2861 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
2862 addr
/ SPAPR_MEMORY_BLOCK_SIZE
);
2865 fdt
= create_device_tree(&fdt_size
);
2866 fdt_offset
= spapr_populate_memory_node(fdt
, node
, addr
,
2867 SPAPR_MEMORY_BLOCK_SIZE
);
2869 spapr_drc_attach(drc
, dev
, fdt
, fdt_offset
, &local_err
);
2871 while (addr
> addr_start
) {
2872 addr
-= SPAPR_MEMORY_BLOCK_SIZE
;
2873 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
2874 addr
/ SPAPR_MEMORY_BLOCK_SIZE
);
2875 spapr_drc_detach(drc
);
2878 error_propagate(errp
, local_err
);
2882 spapr_drc_reset(drc
);
2884 addr
+= SPAPR_MEMORY_BLOCK_SIZE
;
2886 /* send hotplug notification to the
2887 * guest only in case of hotplugged memory
2890 if (dedicated_hp_event_source
) {
2891 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
2892 addr_start
/ SPAPR_MEMORY_BLOCK_SIZE
);
2893 spapr_hotplug_req_add_by_count_indexed(SPAPR_DR_CONNECTOR_TYPE_LMB
,
2895 spapr_drc_index(drc
));
2897 spapr_hotplug_req_add_by_count(SPAPR_DR_CONNECTOR_TYPE_LMB
,
2903 static void spapr_memory_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
2904 uint32_t node
, Error
**errp
)
2906 Error
*local_err
= NULL
;
2907 sPAPRMachineState
*ms
= SPAPR_MACHINE(hotplug_dev
);
2908 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
2909 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
2911 uint64_t align
, size
, addr
;
2913 mr
= ddc
->get_memory_region(dimm
, &local_err
);
2917 align
= memory_region_get_alignment(mr
);
2918 size
= memory_region_size(mr
);
2920 pc_dimm_memory_plug(dev
, &ms
->hotplug_memory
, mr
, align
, &local_err
);
2925 addr
= object_property_get_uint(OBJECT(dimm
),
2926 PC_DIMM_ADDR_PROP
, &local_err
);
2931 spapr_add_lmbs(dev
, addr
, size
, node
,
2932 spapr_ovec_test(ms
->ov5_cas
, OV5_HP_EVT
),
2941 pc_dimm_memory_unplug(dev
, &ms
->hotplug_memory
, mr
);
2943 error_propagate(errp
, local_err
);
2946 static void spapr_memory_pre_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
2949 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
2950 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
2955 mr
= ddc
->get_memory_region(dimm
, errp
);
2959 size
= memory_region_size(mr
);
2961 if (size
% SPAPR_MEMORY_BLOCK_SIZE
) {
2962 error_setg(errp
, "Hotplugged memory size must be a multiple of "
2963 "%lld MB", SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
2967 mem_dev
= object_property_get_str(OBJECT(dimm
), PC_DIMM_MEMDEV_PROP
, NULL
);
2968 if (mem_dev
&& !kvmppc_is_mem_backend_page_size_ok(mem_dev
)) {
2969 error_setg(errp
, "Memory backend has bad page size. "
2970 "Use 'memory-backend-file' with correct mem-path.");
2978 struct sPAPRDIMMState
{
2981 QTAILQ_ENTRY(sPAPRDIMMState
) next
;
2984 static sPAPRDIMMState
*spapr_pending_dimm_unplugs_find(sPAPRMachineState
*s
,
2987 sPAPRDIMMState
*dimm_state
= NULL
;
2989 QTAILQ_FOREACH(dimm_state
, &s
->pending_dimm_unplugs
, next
) {
2990 if (dimm_state
->dimm
== dimm
) {
2997 static sPAPRDIMMState
*spapr_pending_dimm_unplugs_add(sPAPRMachineState
*spapr
,
3001 sPAPRDIMMState
*ds
= NULL
;
3004 * If this request is for a DIMM whose removal had failed earlier
3005 * (due to guest's refusal to remove the LMBs), we would have this
3006 * dimm already in the pending_dimm_unplugs list. In that
3007 * case don't add again.
3009 ds
= spapr_pending_dimm_unplugs_find(spapr
, dimm
);
3011 ds
= g_malloc0(sizeof(sPAPRDIMMState
));
3012 ds
->nr_lmbs
= nr_lmbs
;
3014 QTAILQ_INSERT_HEAD(&spapr
->pending_dimm_unplugs
, ds
, next
);
3019 static void spapr_pending_dimm_unplugs_remove(sPAPRMachineState
*spapr
,
3020 sPAPRDIMMState
*dimm_state
)
3022 QTAILQ_REMOVE(&spapr
->pending_dimm_unplugs
, dimm_state
, next
);
3026 static sPAPRDIMMState
*spapr_recover_pending_dimm_state(sPAPRMachineState
*ms
,
3029 sPAPRDRConnector
*drc
;
3030 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
3031 MemoryRegion
*mr
= ddc
->get_memory_region(dimm
, &error_abort
);
3032 uint64_t size
= memory_region_size(mr
);
3033 uint32_t nr_lmbs
= size
/ SPAPR_MEMORY_BLOCK_SIZE
;
3034 uint32_t avail_lmbs
= 0;
3035 uint64_t addr_start
, addr
;
3038 addr_start
= object_property_get_int(OBJECT(dimm
), PC_DIMM_ADDR_PROP
,
3042 for (i
= 0; i
< nr_lmbs
; i
++) {
3043 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
3044 addr
/ SPAPR_MEMORY_BLOCK_SIZE
);
3049 addr
+= SPAPR_MEMORY_BLOCK_SIZE
;
3052 return spapr_pending_dimm_unplugs_add(ms
, avail_lmbs
, dimm
);
3055 /* Callback to be called during DRC release. */
3056 void spapr_lmb_release(DeviceState
*dev
)
3058 sPAPRMachineState
*spapr
= SPAPR_MACHINE(qdev_get_hotplug_handler(dev
));
3059 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
3060 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
3061 MemoryRegion
*mr
= ddc
->get_memory_region(dimm
, &error_abort
);
3062 sPAPRDIMMState
*ds
= spapr_pending_dimm_unplugs_find(spapr
, PC_DIMM(dev
));
3064 /* This information will get lost if a migration occurs
3065 * during the unplug process. In this case recover it. */
3067 ds
= spapr_recover_pending_dimm_state(spapr
, PC_DIMM(dev
));
3069 /* The DRC being examined by the caller at least must be counted */
3070 g_assert(ds
->nr_lmbs
);
3073 if (--ds
->nr_lmbs
) {
3078 * Now that all the LMBs have been removed by the guest, call the
3079 * pc-dimm unplug handler to cleanup up the pc-dimm device.
3081 pc_dimm_memory_unplug(dev
, &spapr
->hotplug_memory
, mr
);
3082 object_unparent(OBJECT(dev
));
3083 spapr_pending_dimm_unplugs_remove(spapr
, ds
);
3086 static void spapr_memory_unplug_request(HotplugHandler
*hotplug_dev
,
3087 DeviceState
*dev
, Error
**errp
)
3089 sPAPRMachineState
*spapr
= SPAPR_MACHINE(hotplug_dev
);
3090 Error
*local_err
= NULL
;
3091 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
3092 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
3095 uint64_t size
, addr_start
, addr
;
3097 sPAPRDRConnector
*drc
;
3099 mr
= ddc
->get_memory_region(dimm
, &local_err
);
3103 size
= memory_region_size(mr
);
3104 nr_lmbs
= size
/ SPAPR_MEMORY_BLOCK_SIZE
;
3106 addr_start
= object_property_get_uint(OBJECT(dimm
), PC_DIMM_ADDR_PROP
,
3113 * An existing pending dimm state for this DIMM means that there is an
3114 * unplug operation in progress, waiting for the spapr_lmb_release
3115 * callback to complete the job (BQL can't cover that far). In this case,
3116 * bail out to avoid detaching DRCs that were already released.
3118 if (spapr_pending_dimm_unplugs_find(spapr
, dimm
)) {
3119 error_setg(&local_err
,
3120 "Memory unplug already in progress for device %s",
3125 spapr_pending_dimm_unplugs_add(spapr
, nr_lmbs
, dimm
);
3128 for (i
= 0; i
< nr_lmbs
; i
++) {
3129 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
3130 addr
/ SPAPR_MEMORY_BLOCK_SIZE
);
3133 spapr_drc_detach(drc
);
3134 addr
+= SPAPR_MEMORY_BLOCK_SIZE
;
3137 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
3138 addr_start
/ SPAPR_MEMORY_BLOCK_SIZE
);
3139 spapr_hotplug_req_remove_by_count_indexed(SPAPR_DR_CONNECTOR_TYPE_LMB
,
3140 nr_lmbs
, spapr_drc_index(drc
));
3142 error_propagate(errp
, local_err
);
3145 static void *spapr_populate_hotplug_cpu_dt(CPUState
*cs
, int *fdt_offset
,
3146 sPAPRMachineState
*spapr
)
3148 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
3149 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
3150 int id
= spapr_vcpu_id(cpu
);
3152 int offset
, fdt_size
;
3155 fdt
= create_device_tree(&fdt_size
);
3156 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, id
);
3157 offset
= fdt_add_subnode(fdt
, 0, nodename
);
3159 spapr_populate_cpu_dt(cs
, fdt
, offset
, spapr
);
3162 *fdt_offset
= offset
;
3166 /* Callback to be called during DRC release. */
3167 void spapr_core_release(DeviceState
*dev
)
3169 MachineState
*ms
= MACHINE(qdev_get_hotplug_handler(dev
));
3170 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(ms
);
3171 CPUCore
*cc
= CPU_CORE(dev
);
3172 CPUArchId
*core_slot
= spapr_find_cpu_slot(ms
, cc
->core_id
, NULL
);
3174 if (smc
->pre_2_10_has_unused_icps
) {
3175 sPAPRCPUCore
*sc
= SPAPR_CPU_CORE(OBJECT(dev
));
3176 sPAPRCPUCoreClass
*scc
= SPAPR_CPU_CORE_GET_CLASS(OBJECT(cc
));
3177 size_t size
= object_type_get_instance_size(scc
->cpu_type
);
3180 for (i
= 0; i
< cc
->nr_threads
; i
++) {
3181 CPUState
*cs
= CPU(sc
->threads
+ i
* size
);
3183 pre_2_10_vmstate_register_dummy_icp(cs
->cpu_index
);
3188 core_slot
->cpu
= NULL
;
3189 object_unparent(OBJECT(dev
));
3193 void spapr_core_unplug_request(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
3197 sPAPRDRConnector
*drc
;
3198 CPUCore
*cc
= CPU_CORE(dev
);
3199 int smt
= kvmppc_smt_threads();
3201 if (!spapr_find_cpu_slot(MACHINE(hotplug_dev
), cc
->core_id
, &index
)) {
3202 error_setg(errp
, "Unable to find CPU core with core-id: %d",
3207 error_setg(errp
, "Boot CPU core may not be unplugged");
3211 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_CPU
, index
* smt
);
3214 spapr_drc_detach(drc
);
3216 spapr_hotplug_req_remove_by_index(drc
);
3219 static void spapr_core_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
3222 sPAPRMachineState
*spapr
= SPAPR_MACHINE(OBJECT(hotplug_dev
));
3223 MachineClass
*mc
= MACHINE_GET_CLASS(spapr
);
3224 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
3225 sPAPRCPUCore
*core
= SPAPR_CPU_CORE(OBJECT(dev
));
3226 CPUCore
*cc
= CPU_CORE(dev
);
3227 CPUState
*cs
= CPU(core
->threads
);
3228 sPAPRDRConnector
*drc
;
3229 Error
*local_err
= NULL
;
3230 int smt
= kvmppc_smt_threads();
3231 CPUArchId
*core_slot
;
3233 bool hotplugged
= spapr_drc_hotplugged(dev
);
3235 core_slot
= spapr_find_cpu_slot(MACHINE(hotplug_dev
), cc
->core_id
, &index
);
3237 error_setg(errp
, "Unable to find CPU core with core-id: %d",
3241 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_CPU
, index
* smt
);
3243 g_assert(drc
|| !mc
->has_hotpluggable_cpus
);
3249 fdt
= spapr_populate_hotplug_cpu_dt(cs
, &fdt_offset
, spapr
);
3251 spapr_drc_attach(drc
, dev
, fdt
, fdt_offset
, &local_err
);
3254 error_propagate(errp
, local_err
);
3260 * Send hotplug notification interrupt to the guest only
3261 * in case of hotplugged CPUs.
3263 spapr_hotplug_req_add_by_index(drc
);
3265 spapr_drc_reset(drc
);
3269 core_slot
->cpu
= OBJECT(dev
);
3271 if (smc
->pre_2_10_has_unused_icps
) {
3272 sPAPRCPUCoreClass
*scc
= SPAPR_CPU_CORE_GET_CLASS(OBJECT(cc
));
3273 size_t size
= object_type_get_instance_size(scc
->cpu_type
);
3276 for (i
= 0; i
< cc
->nr_threads
; i
++) {
3277 sPAPRCPUCore
*sc
= SPAPR_CPU_CORE(dev
);
3278 void *obj
= sc
->threads
+ i
* size
;
3281 pre_2_10_vmstate_unregister_dummy_icp(cs
->cpu_index
);
3286 static void spapr_core_pre_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
3289 MachineState
*machine
= MACHINE(OBJECT(hotplug_dev
));
3290 MachineClass
*mc
= MACHINE_GET_CLASS(hotplug_dev
);
3291 Error
*local_err
= NULL
;
3292 CPUCore
*cc
= CPU_CORE(dev
);
3293 const char *base_core_type
= spapr_get_cpu_core_type(machine
->cpu_type
);
3294 const char *type
= object_get_typename(OBJECT(dev
));
3295 CPUArchId
*core_slot
;
3298 if (dev
->hotplugged
&& !mc
->has_hotpluggable_cpus
) {
3299 error_setg(&local_err
, "CPU hotplug not supported for this machine");
3303 if (strcmp(base_core_type
, type
)) {
3304 error_setg(&local_err
, "CPU core type should be %s", base_core_type
);
3308 if (cc
->core_id
% smp_threads
) {
3309 error_setg(&local_err
, "invalid core id %d", cc
->core_id
);
3314 * In general we should have homogeneous threads-per-core, but old
3315 * (pre hotplug support) machine types allow the last core to have
3316 * reduced threads as a compatibility hack for when we allowed
3317 * total vcpus not a multiple of threads-per-core.
3319 if (mc
->has_hotpluggable_cpus
&& (cc
->nr_threads
!= smp_threads
)) {
3320 error_setg(&local_err
, "invalid nr-threads %d, must be %d",
3321 cc
->nr_threads
, smp_threads
);
3325 core_slot
= spapr_find_cpu_slot(MACHINE(hotplug_dev
), cc
->core_id
, &index
);
3327 error_setg(&local_err
, "core id %d out of range", cc
->core_id
);
3331 if (core_slot
->cpu
) {
3332 error_setg(&local_err
, "core %d already populated", cc
->core_id
);
3336 numa_cpu_pre_plug(core_slot
, dev
, &local_err
);
3339 error_propagate(errp
, local_err
);
3342 static void spapr_machine_device_plug(HotplugHandler
*hotplug_dev
,
3343 DeviceState
*dev
, Error
**errp
)
3345 MachineState
*ms
= MACHINE(hotplug_dev
);
3346 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(ms
);
3348 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
3351 if (!smc
->dr_lmb_enabled
) {
3352 error_setg(errp
, "Memory hotplug not supported for this machine");
3355 node
= object_property_get_uint(OBJECT(dev
), PC_DIMM_NODE_PROP
, errp
);
3359 if (node
< 0 || node
>= MAX_NODES
) {
3360 error_setg(errp
, "Invaild node %d", node
);
3365 * Currently PowerPC kernel doesn't allow hot-adding memory to
3366 * memory-less node, but instead will silently add the memory
3367 * to the first node that has some memory. This causes two
3368 * unexpected behaviours for the user.
3370 * - Memory gets hotplugged to a different node than what the user
3372 * - Since pc-dimm subsystem in QEMU still thinks that memory belongs
3373 * to memory-less node, a reboot will set things accordingly
3374 * and the previously hotplugged memory now ends in the right node.
3375 * This appears as if some memory moved from one node to another.
3377 * So until kernel starts supporting memory hotplug to memory-less
3378 * nodes, just prevent such attempts upfront in QEMU.
3380 if (nb_numa_nodes
&& !numa_info
[node
].node_mem
) {
3381 error_setg(errp
, "Can't hotplug memory to memory-less node %d",
3386 spapr_memory_plug(hotplug_dev
, dev
, node
, errp
);
3387 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
3388 spapr_core_plug(hotplug_dev
, dev
, errp
);
3392 static void spapr_machine_device_unplug_request(HotplugHandler
*hotplug_dev
,
3393 DeviceState
*dev
, Error
**errp
)
3395 sPAPRMachineState
*sms
= SPAPR_MACHINE(OBJECT(hotplug_dev
));
3396 MachineClass
*mc
= MACHINE_GET_CLASS(sms
);
3398 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
3399 if (spapr_ovec_test(sms
->ov5_cas
, OV5_HP_EVT
)) {
3400 spapr_memory_unplug_request(hotplug_dev
, dev
, errp
);
3402 /* NOTE: this means there is a window after guest reset, prior to
3403 * CAS negotiation, where unplug requests will fail due to the
3404 * capability not being detected yet. This is a bit different than
3405 * the case with PCI unplug, where the events will be queued and
3406 * eventually handled by the guest after boot
3408 error_setg(errp
, "Memory hot unplug not supported for this guest");
3410 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
3411 if (!mc
->has_hotpluggable_cpus
) {
3412 error_setg(errp
, "CPU hot unplug not supported on this machine");
3415 spapr_core_unplug_request(hotplug_dev
, dev
, errp
);
3419 static void spapr_machine_device_pre_plug(HotplugHandler
*hotplug_dev
,
3420 DeviceState
*dev
, Error
**errp
)
3422 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
3423 spapr_memory_pre_plug(hotplug_dev
, dev
, errp
);
3424 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
3425 spapr_core_pre_plug(hotplug_dev
, dev
, errp
);
3429 static HotplugHandler
*spapr_get_hotplug_handler(MachineState
*machine
,
3432 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
) ||
3433 object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
3434 return HOTPLUG_HANDLER(machine
);
3439 static CpuInstanceProperties
3440 spapr_cpu_index_to_props(MachineState
*machine
, unsigned cpu_index
)
3442 CPUArchId
*core_slot
;
3443 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
3445 /* make sure possible_cpu are intialized */
3446 mc
->possible_cpu_arch_ids(machine
);
3447 /* get CPU core slot containing thread that matches cpu_index */
3448 core_slot
= spapr_find_cpu_slot(machine
, cpu_index
, NULL
);
3450 return core_slot
->props
;
3453 static int64_t spapr_get_default_cpu_node_id(const MachineState
*ms
, int idx
)
3455 return idx
/ smp_cores
% nb_numa_nodes
;
3458 static const CPUArchIdList
*spapr_possible_cpu_arch_ids(MachineState
*machine
)
3461 int spapr_max_cores
= max_cpus
/ smp_threads
;
3462 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
3464 if (!mc
->has_hotpluggable_cpus
) {
3465 spapr_max_cores
= QEMU_ALIGN_UP(smp_cpus
, smp_threads
) / smp_threads
;
3467 if (machine
->possible_cpus
) {
3468 assert(machine
->possible_cpus
->len
== spapr_max_cores
);
3469 return machine
->possible_cpus
;
3472 machine
->possible_cpus
= g_malloc0(sizeof(CPUArchIdList
) +
3473 sizeof(CPUArchId
) * spapr_max_cores
);
3474 machine
->possible_cpus
->len
= spapr_max_cores
;
3475 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
3476 int core_id
= i
* smp_threads
;
3478 machine
->possible_cpus
->cpus
[i
].vcpus_count
= smp_threads
;
3479 machine
->possible_cpus
->cpus
[i
].arch_id
= core_id
;
3480 machine
->possible_cpus
->cpus
[i
].props
.has_core_id
= true;
3481 machine
->possible_cpus
->cpus
[i
].props
.core_id
= core_id
;
3483 return machine
->possible_cpus
;
3486 static void spapr_phb_placement(sPAPRMachineState
*spapr
, uint32_t index
,
3487 uint64_t *buid
, hwaddr
*pio
,
3488 hwaddr
*mmio32
, hwaddr
*mmio64
,
3489 unsigned n_dma
, uint32_t *liobns
, Error
**errp
)
3492 * New-style PHB window placement.
3494 * Goals: Gives large (1TiB), naturally aligned 64-bit MMIO window
3495 * for each PHB, in addition to 2GiB 32-bit MMIO and 64kiB PIO
3498 * Some guest kernels can't work with MMIO windows above 1<<46
3499 * (64TiB), so we place up to 31 PHBs in the area 32TiB..64TiB
3501 * 32TiB..(33TiB+1984kiB) contains the 64kiB PIO windows for each
3502 * PHB stacked together. (32TiB+2GiB)..(32TiB+64GiB) contains the
3503 * 2GiB 32-bit MMIO windows for each PHB. Then 33..64TiB has the
3504 * 1TiB 64-bit MMIO windows for each PHB.
3506 const uint64_t base_buid
= 0x800000020000000ULL
;
3507 #define SPAPR_MAX_PHBS ((SPAPR_PCI_LIMIT - SPAPR_PCI_BASE) / \
3508 SPAPR_PCI_MEM64_WIN_SIZE - 1)
3511 /* Sanity check natural alignments */
3512 QEMU_BUILD_BUG_ON((SPAPR_PCI_BASE
% SPAPR_PCI_MEM64_WIN_SIZE
) != 0);
3513 QEMU_BUILD_BUG_ON((SPAPR_PCI_LIMIT
% SPAPR_PCI_MEM64_WIN_SIZE
) != 0);
3514 QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM64_WIN_SIZE
% SPAPR_PCI_MEM32_WIN_SIZE
) != 0);
3515 QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM32_WIN_SIZE
% SPAPR_PCI_IO_WIN_SIZE
) != 0);
3516 /* Sanity check bounds */
3517 QEMU_BUILD_BUG_ON((SPAPR_MAX_PHBS
* SPAPR_PCI_IO_WIN_SIZE
) >
3518 SPAPR_PCI_MEM32_WIN_SIZE
);
3519 QEMU_BUILD_BUG_ON((SPAPR_MAX_PHBS
* SPAPR_PCI_MEM32_WIN_SIZE
) >
3520 SPAPR_PCI_MEM64_WIN_SIZE
);
3522 if (index
>= SPAPR_MAX_PHBS
) {
3523 error_setg(errp
, "\"index\" for PAPR PHB is too large (max %llu)",
3524 SPAPR_MAX_PHBS
- 1);
3528 *buid
= base_buid
+ index
;
3529 for (i
= 0; i
< n_dma
; ++i
) {
3530 liobns
[i
] = SPAPR_PCI_LIOBN(index
, i
);
3533 *pio
= SPAPR_PCI_BASE
+ index
* SPAPR_PCI_IO_WIN_SIZE
;
3534 *mmio32
= SPAPR_PCI_BASE
+ (index
+ 1) * SPAPR_PCI_MEM32_WIN_SIZE
;
3535 *mmio64
= SPAPR_PCI_BASE
+ (index
+ 1) * SPAPR_PCI_MEM64_WIN_SIZE
;
3538 static ICSState
*spapr_ics_get(XICSFabric
*dev
, int irq
)
3540 sPAPRMachineState
*spapr
= SPAPR_MACHINE(dev
);
3542 return ics_valid_irq(spapr
->ics
, irq
) ? spapr
->ics
: NULL
;
3545 static void spapr_ics_resend(XICSFabric
*dev
)
3547 sPAPRMachineState
*spapr
= SPAPR_MACHINE(dev
);
3549 ics_resend(spapr
->ics
);
3552 static ICPState
*spapr_icp_get(XICSFabric
*xi
, int vcpu_id
)
3554 PowerPCCPU
*cpu
= spapr_find_cpu(vcpu_id
);
3556 return cpu
? ICP(cpu
->intc
) : NULL
;
3559 static void spapr_pic_print_info(InterruptStatsProvider
*obj
,
3562 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
3566 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
3568 icp_pic_print_info(ICP(cpu
->intc
), mon
);
3571 ics_pic_print_info(spapr
->ics
, mon
);
3574 int spapr_vcpu_id(PowerPCCPU
*cpu
)
3576 CPUState
*cs
= CPU(cpu
);
3578 if (kvm_enabled()) {
3579 return kvm_arch_vcpu_id(cs
);
3581 return cs
->cpu_index
;
3585 PowerPCCPU
*spapr_find_cpu(int vcpu_id
)
3590 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
3592 if (spapr_vcpu_id(cpu
) == vcpu_id
) {
3600 static void spapr_machine_class_init(ObjectClass
*oc
, void *data
)
3602 MachineClass
*mc
= MACHINE_CLASS(oc
);
3603 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(oc
);
3604 FWPathProviderClass
*fwc
= FW_PATH_PROVIDER_CLASS(oc
);
3605 NMIClass
*nc
= NMI_CLASS(oc
);
3606 HotplugHandlerClass
*hc
= HOTPLUG_HANDLER_CLASS(oc
);
3607 PPCVirtualHypervisorClass
*vhc
= PPC_VIRTUAL_HYPERVISOR_CLASS(oc
);
3608 XICSFabricClass
*xic
= XICS_FABRIC_CLASS(oc
);
3609 InterruptStatsProviderClass
*ispc
= INTERRUPT_STATS_PROVIDER_CLASS(oc
);
3611 mc
->desc
= "pSeries Logical Partition (PAPR compliant)";
3614 * We set up the default / latest behaviour here. The class_init
3615 * functions for the specific versioned machine types can override
3616 * these details for backwards compatibility
3618 mc
->init
= ppc_spapr_init
;
3619 mc
->reset
= ppc_spapr_reset
;
3620 mc
->block_default_type
= IF_SCSI
;
3621 mc
->max_cpus
= 1024;
3622 mc
->no_parallel
= 1;
3623 mc
->default_boot_order
= "";
3624 mc
->default_ram_size
= 512 * M_BYTE
;
3625 mc
->kvm_type
= spapr_kvm_type
;
3626 mc
->has_dynamic_sysbus
= true;
3627 mc
->pci_allow_0_address
= true;
3628 mc
->get_hotplug_handler
= spapr_get_hotplug_handler
;
3629 hc
->pre_plug
= spapr_machine_device_pre_plug
;
3630 hc
->plug
= spapr_machine_device_plug
;
3631 mc
->cpu_index_to_instance_props
= spapr_cpu_index_to_props
;
3632 mc
->get_default_cpu_node_id
= spapr_get_default_cpu_node_id
;
3633 mc
->possible_cpu_arch_ids
= spapr_possible_cpu_arch_ids
;
3634 hc
->unplug_request
= spapr_machine_device_unplug_request
;
3636 smc
->dr_lmb_enabled
= true;
3637 mc
->default_cpu_type
= POWERPC_CPU_TYPE_NAME("power8_v2.0");
3638 mc
->has_hotpluggable_cpus
= true;
3639 smc
->resize_hpt_default
= SPAPR_RESIZE_HPT_ENABLED
;
3640 fwc
->get_dev_path
= spapr_get_fw_dev_path
;
3641 nc
->nmi_monitor_handler
= spapr_nmi
;
3642 smc
->phb_placement
= spapr_phb_placement
;
3643 vhc
->hypercall
= emulate_spapr_hypercall
;
3644 vhc
->hpt_mask
= spapr_hpt_mask
;
3645 vhc
->map_hptes
= spapr_map_hptes
;
3646 vhc
->unmap_hptes
= spapr_unmap_hptes
;
3647 vhc
->store_hpte
= spapr_store_hpte
;
3648 vhc
->get_patbe
= spapr_get_patbe
;
3649 vhc
->encode_hpt_for_kvm_pr
= spapr_encode_hpt_for_kvm_pr
;
3650 xic
->ics_get
= spapr_ics_get
;
3651 xic
->ics_resend
= spapr_ics_resend
;
3652 xic
->icp_get
= spapr_icp_get
;
3653 ispc
->print_info
= spapr_pic_print_info
;
3654 /* Force NUMA node memory size to be a multiple of
3655 * SPAPR_MEMORY_BLOCK_SIZE (256M) since that's the granularity
3656 * in which LMBs are represented and hot-added
3658 mc
->numa_mem_align_shift
= 28;
3661 static const TypeInfo spapr_machine_info
= {
3662 .name
= TYPE_SPAPR_MACHINE
,
3663 .parent
= TYPE_MACHINE
,
3665 .instance_size
= sizeof(sPAPRMachineState
),
3666 .instance_init
= spapr_machine_initfn
,
3667 .instance_finalize
= spapr_machine_finalizefn
,
3668 .class_size
= sizeof(sPAPRMachineClass
),
3669 .class_init
= spapr_machine_class_init
,
3670 .interfaces
= (InterfaceInfo
[]) {
3671 { TYPE_FW_PATH_PROVIDER
},
3673 { TYPE_HOTPLUG_HANDLER
},
3674 { TYPE_PPC_VIRTUAL_HYPERVISOR
},
3675 { TYPE_XICS_FABRIC
},
3676 { TYPE_INTERRUPT_STATS_PROVIDER
},
3681 #define DEFINE_SPAPR_MACHINE(suffix, verstr, latest) \
3682 static void spapr_machine_##suffix##_class_init(ObjectClass *oc, \
3685 MachineClass *mc = MACHINE_CLASS(oc); \
3686 spapr_machine_##suffix##_class_options(mc); \
3688 mc->alias = "pseries"; \
3689 mc->is_default = 1; \
3692 static void spapr_machine_##suffix##_instance_init(Object *obj) \
3694 MachineState *machine = MACHINE(obj); \
3695 spapr_machine_##suffix##_instance_options(machine); \
3697 static const TypeInfo spapr_machine_##suffix##_info = { \
3698 .name = MACHINE_TYPE_NAME("pseries-" verstr), \
3699 .parent = TYPE_SPAPR_MACHINE, \
3700 .class_init = spapr_machine_##suffix##_class_init, \
3701 .instance_init = spapr_machine_##suffix##_instance_init, \
3703 static void spapr_machine_register_##suffix(void) \
3705 type_register(&spapr_machine_##suffix##_info); \
3707 type_init(spapr_machine_register_##suffix)
3712 static void spapr_machine_2_11_instance_options(MachineState
*machine
)
3716 static void spapr_machine_2_11_class_options(MachineClass
*mc
)
3718 /* Defaults for the latest behaviour inherited from the base class */
3721 DEFINE_SPAPR_MACHINE(2_11
, "2.11", true);
3726 #define SPAPR_COMPAT_2_10 \
3729 static void spapr_machine_2_10_instance_options(MachineState *machine)
3733 static void spapr_machine_2_10_class_options(MachineClass
*mc
)
3735 spapr_machine_2_11_class_options(mc
);
3736 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_10
);
3739 DEFINE_SPAPR_MACHINE(2_10
, "2.10", false);
3744 #define SPAPR_COMPAT_2_9 \
3747 .driver = TYPE_POWERPC_CPU, \
3748 .property = "pre-2.10-migration", \
3752 static void spapr_machine_2_9_instance_options(MachineState *machine)
3754 spapr_machine_2_10_instance_options(machine
);
3757 static void spapr_machine_2_9_class_options(MachineClass
*mc
)
3759 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
3761 spapr_machine_2_10_class_options(mc
);
3762 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_9
);
3763 mc
->numa_auto_assign_ram
= numa_legacy_auto_assign_ram
;
3764 smc
->pre_2_10_has_unused_icps
= true;
3765 smc
->resize_hpt_default
= SPAPR_RESIZE_HPT_DISABLED
;
3768 DEFINE_SPAPR_MACHINE(2_9
, "2.9", false);
3773 #define SPAPR_COMPAT_2_8 \
3776 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \
3777 .property = "pcie-extended-configuration-space", \
3781 static void spapr_machine_2_8_instance_options(MachineState
*machine
)
3783 spapr_machine_2_9_instance_options(machine
);
3786 static void spapr_machine_2_8_class_options(MachineClass
*mc
)
3788 spapr_machine_2_9_class_options(mc
);
3789 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_8
);
3790 mc
->numa_mem_align_shift
= 23;
3793 DEFINE_SPAPR_MACHINE(2_8
, "2.8", false);
3798 #define SPAPR_COMPAT_2_7 \
3801 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \
3802 .property = "mem_win_size", \
3803 .value = stringify(SPAPR_PCI_2_7_MMIO_WIN_SIZE),\
3806 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \
3807 .property = "mem64_win_size", \
3811 .driver = TYPE_POWERPC_CPU, \
3812 .property = "pre-2.8-migration", \
3816 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \
3817 .property = "pre-2.8-migration", \
3821 static void phb_placement_2_7(sPAPRMachineState
*spapr
, uint32_t index
,
3822 uint64_t *buid
, hwaddr
*pio
,
3823 hwaddr
*mmio32
, hwaddr
*mmio64
,
3824 unsigned n_dma
, uint32_t *liobns
, Error
**errp
)
3826 /* Legacy PHB placement for pseries-2.7 and earlier machine types */
3827 const uint64_t base_buid
= 0x800000020000000ULL
;
3828 const hwaddr phb_spacing
= 0x1000000000ULL
; /* 64 GiB */
3829 const hwaddr mmio_offset
= 0xa0000000; /* 2 GiB + 512 MiB */
3830 const hwaddr pio_offset
= 0x80000000; /* 2 GiB */
3831 const uint32_t max_index
= 255;
3832 const hwaddr phb0_alignment
= 0x10000000000ULL
; /* 1 TiB */
3834 uint64_t ram_top
= MACHINE(spapr
)->ram_size
;
3835 hwaddr phb0_base
, phb_base
;
3838 /* Do we have hotpluggable memory? */
3839 if (MACHINE(spapr
)->maxram_size
> ram_top
) {
3840 /* Can't just use maxram_size, because there may be an
3841 * alignment gap between normal and hotpluggable memory
3843 ram_top
= spapr
->hotplug_memory
.base
+
3844 memory_region_size(&spapr
->hotplug_memory
.mr
);
3847 phb0_base
= QEMU_ALIGN_UP(ram_top
, phb0_alignment
);
3849 if (index
> max_index
) {
3850 error_setg(errp
, "\"index\" for PAPR PHB is too large (max %u)",
3855 *buid
= base_buid
+ index
;
3856 for (i
= 0; i
< n_dma
; ++i
) {
3857 liobns
[i
] = SPAPR_PCI_LIOBN(index
, i
);
3860 phb_base
= phb0_base
+ index
* phb_spacing
;
3861 *pio
= phb_base
+ pio_offset
;
3862 *mmio32
= phb_base
+ mmio_offset
;
3864 * We don't set the 64-bit MMIO window, relying on the PHB's
3865 * fallback behaviour of automatically splitting a large "32-bit"
3866 * window into contiguous 32-bit and 64-bit windows
3870 static void spapr_machine_2_7_instance_options(MachineState
*machine
)
3872 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
3874 spapr_machine_2_8_instance_options(machine
);
3875 spapr
->use_hotplug_event_source
= false;
3878 static void spapr_machine_2_7_class_options(MachineClass
*mc
)
3880 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
3882 spapr_machine_2_8_class_options(mc
);
3883 mc
->default_cpu_type
= POWERPC_CPU_TYPE_NAME("power7_v2.3");
3884 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_7
);
3885 smc
->phb_placement
= phb_placement_2_7
;
3888 DEFINE_SPAPR_MACHINE(2_7
, "2.7", false);
3893 #define SPAPR_COMPAT_2_6 \
3896 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,\
3898 .value = stringify(off),\
3901 static void spapr_machine_2_6_instance_options(MachineState
*machine
)
3903 spapr_machine_2_7_instance_options(machine
);
3906 static void spapr_machine_2_6_class_options(MachineClass
*mc
)
3908 spapr_machine_2_7_class_options(mc
);
3909 mc
->has_hotpluggable_cpus
= false;
3910 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_6
);
3913 DEFINE_SPAPR_MACHINE(2_6
, "2.6", false);
3918 #define SPAPR_COMPAT_2_5 \
3921 .driver = "spapr-vlan", \
3922 .property = "use-rx-buffer-pools", \
3926 static void spapr_machine_2_5_instance_options(MachineState
*machine
)
3928 spapr_machine_2_6_instance_options(machine
);
3931 static void spapr_machine_2_5_class_options(MachineClass
*mc
)
3933 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
3935 spapr_machine_2_6_class_options(mc
);
3936 smc
->use_ohci_by_default
= true;
3937 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_5
);
3940 DEFINE_SPAPR_MACHINE(2_5
, "2.5", false);
3945 #define SPAPR_COMPAT_2_4 \
3948 static void spapr_machine_2_4_instance_options(MachineState
*machine
)
3950 spapr_machine_2_5_instance_options(machine
);
3953 static void spapr_machine_2_4_class_options(MachineClass
*mc
)
3955 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
3957 spapr_machine_2_5_class_options(mc
);
3958 smc
->dr_lmb_enabled
= false;
3959 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_4
);
3962 DEFINE_SPAPR_MACHINE(2_4
, "2.4", false);
3967 #define SPAPR_COMPAT_2_3 \
3970 .driver = "spapr-pci-host-bridge",\
3971 .property = "dynamic-reconfiguration",\
3975 static void spapr_machine_2_3_instance_options(MachineState
*machine
)
3977 spapr_machine_2_4_instance_options(machine
);
3980 static void spapr_machine_2_3_class_options(MachineClass
*mc
)
3982 spapr_machine_2_4_class_options(mc
);
3983 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_3
);
3985 DEFINE_SPAPR_MACHINE(2_3
, "2.3", false);
3991 #define SPAPR_COMPAT_2_2 \
3994 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,\
3995 .property = "mem_win_size",\
3996 .value = "0x20000000",\
3999 static void spapr_machine_2_2_instance_options(MachineState
*machine
)
4001 spapr_machine_2_3_instance_options(machine
);
4002 machine
->suppress_vmdesc
= true;
4005 static void spapr_machine_2_2_class_options(MachineClass
*mc
)
4007 spapr_machine_2_3_class_options(mc
);
4008 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_2
);
4010 DEFINE_SPAPR_MACHINE(2_2
, "2.2", false);
4015 #define SPAPR_COMPAT_2_1 \
4018 static void spapr_machine_2_1_instance_options(MachineState
*machine
)
4020 spapr_machine_2_2_instance_options(machine
);
4023 static void spapr_machine_2_1_class_options(MachineClass
*mc
)
4025 spapr_machine_2_2_class_options(mc
);
4026 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_1
);
4028 DEFINE_SPAPR_MACHINE(2_1
, "2.1", false);
4030 static void spapr_machine_register_types(void)
4032 type_register_static(&spapr_machine_info
);
4035 type_init(spapr_machine_register_types
)