linux-user, trivial: display "0x%x" instead of "0x%d"
[qemu/rayw.git] / target-cris / op_helper.c
blob504303913c6c044fade39f33e9264a698b5c7274
1 /*
2 * CRIS helper routines
4 * Copyright (c) 2007 AXIS Communications
5 * Written by Edgar E. Iglesias
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
21 #include "qemu/osdep.h"
22 #include "cpu.h"
23 #include "mmu.h"
24 #include "exec/helper-proto.h"
25 #include "qemu/host-utils.h"
26 #include "exec/exec-all.h"
27 #include "exec/cpu_ldst.h"
29 //#define CRIS_OP_HELPER_DEBUG
32 #ifdef CRIS_OP_HELPER_DEBUG
33 #define D(x) x
34 #define D_LOG(...) qemu_log(__VA_ARGS__)
35 #else
36 #define D(x)
37 #define D_LOG(...) do { } while (0)
38 #endif
40 #if !defined(CONFIG_USER_ONLY)
41 /* Try to fill the TLB and return an exception if error. If retaddr is
42 NULL, it means that the function was called in C code (i.e. not
43 from generated code or from helper.c) */
44 void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
45 int mmu_idx, uintptr_t retaddr)
47 CRISCPU *cpu = CRIS_CPU(cs);
48 CPUCRISState *env = &cpu->env;
49 int ret;
51 D_LOG("%s pc=%x tpc=%x ra=%p\n", __func__,
52 env->pc, env->pregs[PR_EDA], (void *)retaddr);
53 ret = cris_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
54 if (unlikely(ret)) {
55 if (retaddr) {
56 /* now we have a real cpu fault */
57 if (cpu_restore_state(cs, retaddr)) {
58 /* Evaluate flags after retranslation. */
59 helper_top_evaluate_flags(env);
62 cpu_loop_exit(cs);
66 #endif
68 void helper_raise_exception(CPUCRISState *env, uint32_t index)
70 CPUState *cs = CPU(cris_env_get_cpu(env));
72 cs->exception_index = index;
73 cpu_loop_exit(cs);
76 void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid)
78 #if !defined(CONFIG_USER_ONLY)
79 pid &= 0xff;
80 if (pid != (env->pregs[PR_PID] & 0xff))
81 cris_mmu_flush_pid(env, env->pregs[PR_PID]);
82 #endif
85 void helper_spc_write(CPUCRISState *env, uint32_t new_spc)
87 #if !defined(CONFIG_USER_ONLY)
88 CRISCPU *cpu = cris_env_get_cpu(env);
89 CPUState *cs = CPU(cpu);
91 tlb_flush_page(cs, env->pregs[PR_SPC]);
92 tlb_flush_page(cs, new_spc);
93 #endif
96 /* Used by the tlb decoder. */
97 #define EXTRACT_FIELD(src, start, end) \
98 (((src) >> start) & ((1 << (end - start + 1)) - 1))
100 void helper_movl_sreg_reg(CPUCRISState *env, uint32_t sreg, uint32_t reg)
102 #if !defined(CONFIG_USER_ONLY)
103 CRISCPU *cpu = cris_env_get_cpu(env);
104 #endif
105 uint32_t srs;
106 srs = env->pregs[PR_SRS];
107 srs &= 3;
108 env->sregs[srs][sreg] = env->regs[reg];
110 #if !defined(CONFIG_USER_ONLY)
111 if (srs == 1 || srs == 2) {
112 if (sreg == 6) {
113 /* Writes to tlb-hi write to mm_cause as a side
114 effect. */
115 env->sregs[SFR_RW_MM_TLB_HI] = env->regs[reg];
116 env->sregs[SFR_R_MM_CAUSE] = env->regs[reg];
118 else if (sreg == 5) {
119 uint32_t set;
120 uint32_t idx;
121 uint32_t lo, hi;
122 uint32_t vaddr;
123 int tlb_v;
125 idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
126 set >>= 4;
127 set &= 3;
129 idx &= 15;
130 /* We've just made a write to tlb_lo. */
131 lo = env->sregs[SFR_RW_MM_TLB_LO];
132 /* Writes are done via r_mm_cause. */
133 hi = env->sregs[SFR_R_MM_CAUSE];
135 vaddr = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].hi,
136 13, 31);
137 vaddr <<= TARGET_PAGE_BITS;
138 tlb_v = EXTRACT_FIELD(env->tlbsets[srs-1][set][idx].lo,
139 3, 3);
140 env->tlbsets[srs - 1][set][idx].lo = lo;
141 env->tlbsets[srs - 1][set][idx].hi = hi;
143 D_LOG("tlb flush vaddr=%x v=%d pc=%x\n",
144 vaddr, tlb_v, env->pc);
145 if (tlb_v) {
146 tlb_flush_page(CPU(cpu), vaddr);
150 #endif
153 void helper_movl_reg_sreg(CPUCRISState *env, uint32_t reg, uint32_t sreg)
155 uint32_t srs;
156 env->pregs[PR_SRS] &= 3;
157 srs = env->pregs[PR_SRS];
159 #if !defined(CONFIG_USER_ONLY)
160 if (srs == 1 || srs == 2)
162 uint32_t set;
163 uint32_t idx;
164 uint32_t lo, hi;
166 idx = set = env->sregs[SFR_RW_MM_TLB_SEL];
167 set >>= 4;
168 set &= 3;
169 idx &= 15;
171 /* Update the mirror regs. */
172 hi = env->tlbsets[srs - 1][set][idx].hi;
173 lo = env->tlbsets[srs - 1][set][idx].lo;
174 env->sregs[SFR_RW_MM_TLB_HI] = hi;
175 env->sregs[SFR_RW_MM_TLB_LO] = lo;
177 #endif
178 env->regs[reg] = env->sregs[srs][sreg];
181 static void cris_ccs_rshift(CPUCRISState *env)
183 uint32_t ccs;
185 /* Apply the ccs shift. */
186 ccs = env->pregs[PR_CCS];
187 ccs = (ccs & 0xc0000000) | ((ccs & 0x0fffffff) >> 10);
188 if (ccs & U_FLAG)
190 /* Enter user mode. */
191 env->ksp = env->regs[R_SP];
192 env->regs[R_SP] = env->pregs[PR_USP];
195 env->pregs[PR_CCS] = ccs;
198 void helper_rfe(CPUCRISState *env)
200 int rflag = env->pregs[PR_CCS] & R_FLAG;
202 D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
203 env->pregs[PR_ERP], env->pregs[PR_PID],
204 env->pregs[PR_CCS],
205 env->btarget);
207 cris_ccs_rshift(env);
209 /* RFE sets the P_FLAG only if the R_FLAG is not set. */
210 if (!rflag)
211 env->pregs[PR_CCS] |= P_FLAG;
214 void helper_rfn(CPUCRISState *env)
216 int rflag = env->pregs[PR_CCS] & R_FLAG;
218 D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n",
219 env->pregs[PR_ERP], env->pregs[PR_PID],
220 env->pregs[PR_CCS],
221 env->btarget);
223 cris_ccs_rshift(env);
225 /* Set the P_FLAG only if the R_FLAG is not set. */
226 if (!rflag)
227 env->pregs[PR_CCS] |= P_FLAG;
229 /* Always set the M flag. */
230 env->pregs[PR_CCS] |= M_FLAG_V32;
233 uint32_t helper_lz(uint32_t t0)
235 return clz32(t0);
238 uint32_t helper_btst(CPUCRISState *env, uint32_t t0, uint32_t t1, uint32_t ccs)
240 /* FIXME: clean this up. */
242 /* des ref:
243 The N flag is set according to the selected bit in the dest reg.
244 The Z flag is set if the selected bit and all bits to the right are
245 zero.
246 The X flag is cleared.
247 Other flags are left untouched.
248 The destination reg is not affected.*/
249 unsigned int fz, sbit, bset, mask, masked_t0;
251 sbit = t1 & 31;
252 bset = !!(t0 & (1 << sbit));
253 mask = sbit == 31 ? -1 : (1 << (sbit + 1)) - 1;
254 masked_t0 = t0 & mask;
255 fz = !(masked_t0 | bset);
257 /* Clear the X, N and Z flags. */
258 ccs = ccs & ~(X_FLAG | N_FLAG | Z_FLAG);
259 if (env->pregs[PR_VR] < 32)
260 ccs &= ~(V_FLAG | C_FLAG);
261 /* Set the N and Z flags accordingly. */
262 ccs |= (bset << 3) | (fz << 2);
263 return ccs;
266 static inline uint32_t evaluate_flags_writeback(CPUCRISState *env,
267 uint32_t flags, uint32_t ccs)
269 unsigned int x, z, mask;
271 /* Extended arithmetics, leave the z flag alone. */
272 x = env->cc_x;
273 mask = env->cc_mask | X_FLAG;
274 if (x) {
275 z = flags & Z_FLAG;
276 mask = mask & ~z;
278 flags &= mask;
280 /* all insn clear the x-flag except setf or clrf. */
281 ccs &= ~mask;
282 ccs |= flags;
283 return ccs;
286 uint32_t helper_evaluate_flags_muls(CPUCRISState *env,
287 uint32_t ccs, uint32_t res, uint32_t mof)
289 uint32_t flags = 0;
290 int64_t tmp;
291 int dneg;
293 dneg = ((int32_t)res) < 0;
295 tmp = mof;
296 tmp <<= 32;
297 tmp |= res;
298 if (tmp == 0)
299 flags |= Z_FLAG;
300 else if (tmp < 0)
301 flags |= N_FLAG;
302 if ((dneg && mof != -1)
303 || (!dneg && mof != 0))
304 flags |= V_FLAG;
305 return evaluate_flags_writeback(env, flags, ccs);
308 uint32_t helper_evaluate_flags_mulu(CPUCRISState *env,
309 uint32_t ccs, uint32_t res, uint32_t mof)
311 uint32_t flags = 0;
312 uint64_t tmp;
314 tmp = mof;
315 tmp <<= 32;
316 tmp |= res;
317 if (tmp == 0)
318 flags |= Z_FLAG;
319 else if (tmp >> 63)
320 flags |= N_FLAG;
321 if (mof)
322 flags |= V_FLAG;
324 return evaluate_flags_writeback(env, flags, ccs);
327 uint32_t helper_evaluate_flags_mcp(CPUCRISState *env, uint32_t ccs,
328 uint32_t src, uint32_t dst, uint32_t res)
330 uint32_t flags = 0;
332 src = src & 0x80000000;
333 dst = dst & 0x80000000;
335 if ((res & 0x80000000L) != 0L)
337 flags |= N_FLAG;
338 if (!src && !dst)
339 flags |= V_FLAG;
340 else if (src & dst)
341 flags |= R_FLAG;
343 else
345 if (res == 0L)
346 flags |= Z_FLAG;
347 if (src & dst)
348 flags |= V_FLAG;
349 if (dst | src)
350 flags |= R_FLAG;
353 return evaluate_flags_writeback(env, flags, ccs);
356 uint32_t helper_evaluate_flags_alu_4(CPUCRISState *env, uint32_t ccs,
357 uint32_t src, uint32_t dst, uint32_t res)
359 uint32_t flags = 0;
361 src = src & 0x80000000;
362 dst = dst & 0x80000000;
364 if ((res & 0x80000000L) != 0L)
366 flags |= N_FLAG;
367 if (!src && !dst)
368 flags |= V_FLAG;
369 else if (src & dst)
370 flags |= C_FLAG;
372 else
374 if (res == 0L)
375 flags |= Z_FLAG;
376 if (src & dst)
377 flags |= V_FLAG;
378 if (dst | src)
379 flags |= C_FLAG;
382 return evaluate_flags_writeback(env, flags, ccs);
385 uint32_t helper_evaluate_flags_sub_4(CPUCRISState *env, uint32_t ccs,
386 uint32_t src, uint32_t dst, uint32_t res)
388 uint32_t flags = 0;
390 src = (~src) & 0x80000000;
391 dst = dst & 0x80000000;
393 if ((res & 0x80000000L) != 0L)
395 flags |= N_FLAG;
396 if (!src && !dst)
397 flags |= V_FLAG;
398 else if (src & dst)
399 flags |= C_FLAG;
401 else
403 if (res == 0L)
404 flags |= Z_FLAG;
405 if (src & dst)
406 flags |= V_FLAG;
407 if (dst | src)
408 flags |= C_FLAG;
411 flags ^= C_FLAG;
412 return evaluate_flags_writeback(env, flags, ccs);
415 uint32_t helper_evaluate_flags_move_4(CPUCRISState *env,
416 uint32_t ccs, uint32_t res)
418 uint32_t flags = 0;
420 if ((int32_t)res < 0)
421 flags |= N_FLAG;
422 else if (res == 0L)
423 flags |= Z_FLAG;
425 return evaluate_flags_writeback(env, flags, ccs);
427 uint32_t helper_evaluate_flags_move_2(CPUCRISState *env,
428 uint32_t ccs, uint32_t res)
430 uint32_t flags = 0;
432 if ((int16_t)res < 0L)
433 flags |= N_FLAG;
434 else if (res == 0)
435 flags |= Z_FLAG;
437 return evaluate_flags_writeback(env, flags, ccs);
440 /* TODO: This is expensive. We could split things up and only evaluate part of
441 CCR on a need to know basis. For now, we simply re-evaluate everything. */
442 void helper_evaluate_flags(CPUCRISState *env)
444 uint32_t src, dst, res;
445 uint32_t flags = 0;
447 src = env->cc_src;
448 dst = env->cc_dest;
449 res = env->cc_result;
451 if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
452 src = ~src;
454 /* Now, evaluate the flags. This stuff is based on
455 Per Zander's CRISv10 simulator. */
456 switch (env->cc_size)
458 case 1:
459 if ((res & 0x80L) != 0L)
461 flags |= N_FLAG;
462 if (((src & 0x80L) == 0L)
463 && ((dst & 0x80L) == 0L))
465 flags |= V_FLAG;
467 else if (((src & 0x80L) != 0L)
468 && ((dst & 0x80L) != 0L))
470 flags |= C_FLAG;
473 else
475 if ((res & 0xFFL) == 0L)
477 flags |= Z_FLAG;
479 if (((src & 0x80L) != 0L)
480 && ((dst & 0x80L) != 0L))
482 flags |= V_FLAG;
484 if ((dst & 0x80L) != 0L
485 || (src & 0x80L) != 0L)
487 flags |= C_FLAG;
490 break;
491 case 2:
492 if ((res & 0x8000L) != 0L)
494 flags |= N_FLAG;
495 if (((src & 0x8000L) == 0L)
496 && ((dst & 0x8000L) == 0L))
498 flags |= V_FLAG;
500 else if (((src & 0x8000L) != 0L)
501 && ((dst & 0x8000L) != 0L))
503 flags |= C_FLAG;
506 else
508 if ((res & 0xFFFFL) == 0L)
510 flags |= Z_FLAG;
512 if (((src & 0x8000L) != 0L)
513 && ((dst & 0x8000L) != 0L))
515 flags |= V_FLAG;
517 if ((dst & 0x8000L) != 0L
518 || (src & 0x8000L) != 0L)
520 flags |= C_FLAG;
523 break;
524 case 4:
525 if ((res & 0x80000000L) != 0L)
527 flags |= N_FLAG;
528 if (((src & 0x80000000L) == 0L)
529 && ((dst & 0x80000000L) == 0L))
531 flags |= V_FLAG;
533 else if (((src & 0x80000000L) != 0L) &&
534 ((dst & 0x80000000L) != 0L))
536 flags |= C_FLAG;
539 else
541 if (res == 0L)
542 flags |= Z_FLAG;
543 if (((src & 0x80000000L) != 0L)
544 && ((dst & 0x80000000L) != 0L))
545 flags |= V_FLAG;
546 if ((dst & 0x80000000L) != 0L
547 || (src & 0x80000000L) != 0L)
548 flags |= C_FLAG;
550 break;
551 default:
552 break;
555 if (env->cc_op == CC_OP_SUB || env->cc_op == CC_OP_CMP)
556 flags ^= C_FLAG;
558 env->pregs[PR_CCS] = evaluate_flags_writeback(env, flags,
559 env->pregs[PR_CCS]);
562 void helper_top_evaluate_flags(CPUCRISState *env)
564 switch (env->cc_op)
566 case CC_OP_MCP:
567 env->pregs[PR_CCS] = helper_evaluate_flags_mcp(env,
568 env->pregs[PR_CCS], env->cc_src,
569 env->cc_dest, env->cc_result);
570 break;
571 case CC_OP_MULS:
572 env->pregs[PR_CCS] = helper_evaluate_flags_muls(env,
573 env->pregs[PR_CCS], env->cc_result,
574 env->pregs[PR_MOF]);
575 break;
576 case CC_OP_MULU:
577 env->pregs[PR_CCS] = helper_evaluate_flags_mulu(env,
578 env->pregs[PR_CCS], env->cc_result,
579 env->pregs[PR_MOF]);
580 break;
581 case CC_OP_MOVE:
582 case CC_OP_AND:
583 case CC_OP_OR:
584 case CC_OP_XOR:
585 case CC_OP_ASR:
586 case CC_OP_LSR:
587 case CC_OP_LSL:
588 switch (env->cc_size)
590 case 4:
591 env->pregs[PR_CCS] =
592 helper_evaluate_flags_move_4(env,
593 env->pregs[PR_CCS],
594 env->cc_result);
595 break;
596 case 2:
597 env->pregs[PR_CCS] =
598 helper_evaluate_flags_move_2(env,
599 env->pregs[PR_CCS],
600 env->cc_result);
601 break;
602 default:
603 helper_evaluate_flags(env);
604 break;
606 break;
607 case CC_OP_FLAGS:
608 /* live. */
609 break;
610 case CC_OP_SUB:
611 case CC_OP_CMP:
612 if (env->cc_size == 4)
613 env->pregs[PR_CCS] =
614 helper_evaluate_flags_sub_4(env,
615 env->pregs[PR_CCS],
616 env->cc_src, env->cc_dest,
617 env->cc_result);
618 else
619 helper_evaluate_flags(env);
620 break;
621 default:
623 switch (env->cc_size)
625 case 4:
626 env->pregs[PR_CCS] =
627 helper_evaluate_flags_alu_4(env,
628 env->pregs[PR_CCS],
629 env->cc_src, env->cc_dest,
630 env->cc_result);
631 break;
632 default:
633 helper_evaluate_flags(env);
634 break;
637 break;