target/ppc: Filter mtmsr[d] input before setting MSR
[qemu/rayw.git] / hw / arm / mcimx7d-sabre.c
blob935d4b0f1cdf46c2b8c620827211cdac638ac1ee
1 /*
2 * Copyright (c) 2018, Impinj, Inc.
4 * MCIMX7D_SABRE Board System emulation.
6 * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
8 * This code is licensed under the GPL, version 2 or later.
9 * See the file `COPYING' in the top level directory.
11 * It (partially) emulates a mcimx7d_sabre board, with a Freescale
12 * i.MX7 SoC
15 #include "qemu/osdep.h"
16 #include "qapi/error.h"
17 #include "hw/arm/fsl-imx7.h"
18 #include "hw/boards.h"
19 #include "hw/qdev-properties.h"
20 #include "qemu/error-report.h"
21 #include "sysemu/qtest.h"
23 static void mcimx7d_sabre_init(MachineState *machine)
25 static struct arm_boot_info boot_info;
26 FslIMX7State *s;
27 int i;
29 if (machine->ram_size > FSL_IMX7_MMDC_SIZE) {
30 error_report("RAM size " RAM_ADDR_FMT " above max supported (%08x)",
31 machine->ram_size, FSL_IMX7_MMDC_SIZE);
32 exit(1);
35 boot_info = (struct arm_boot_info) {
36 .loader_start = FSL_IMX7_MMDC_ADDR,
37 .board_id = -1,
38 .ram_size = machine->ram_size,
39 .nb_cpus = machine->smp.cpus,
42 s = FSL_IMX7(object_new(TYPE_FSL_IMX7));
43 object_property_add_child(OBJECT(machine), "soc", OBJECT(s));
44 qdev_realize(DEVICE(s), NULL, &error_fatal);
46 memory_region_add_subregion(get_system_memory(), FSL_IMX7_MMDC_ADDR,
47 machine->ram);
49 for (i = 0; i < FSL_IMX7_NUM_USDHCS; i++) {
50 BusState *bus;
51 DeviceState *carddev;
52 DriveInfo *di;
53 BlockBackend *blk;
55 di = drive_get_next(IF_SD);
56 blk = di ? blk_by_legacy_dinfo(di) : NULL;
57 bus = qdev_get_child_bus(DEVICE(&s->usdhc[i]), "sd-bus");
58 carddev = qdev_new(TYPE_SD_CARD);
59 qdev_prop_set_drive_err(carddev, "drive", blk, &error_fatal);
60 qdev_realize_and_unref(carddev, bus, &error_fatal);
63 if (!qtest_enabled()) {
64 arm_load_kernel(&s->cpu[0], machine, &boot_info);
68 static void mcimx7d_sabre_machine_init(MachineClass *mc)
70 mc->desc = "Freescale i.MX7 DUAL SABRE (Cortex-A7)";
71 mc->init = mcimx7d_sabre_init;
72 mc->max_cpus = FSL_IMX7_NUM_CPUS;
73 mc->default_ram_id = "mcimx7d-sabre.ram";
75 DEFINE_MACHINE("mcimx7d-sabre", mcimx7d_sabre_machine_init)