target/ppc: Filter mtmsr[d] input before setting MSR
[qemu/rayw.git] / hw / arm / bcm2835_peripherals.c
blob48538c9360ce9afa9c0b3471d6e7707f695c9667
1 /*
2 * Raspberry Pi emulation (c) 2012 Gregory Estrade
3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
5 * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
6 * Written by Andrew Baumann
8 * This work is licensed under the terms of the GNU GPL, version 2 or later.
9 * See the COPYING file in the top-level directory.
12 #include "qemu/osdep.h"
13 #include "qapi/error.h"
14 #include "qemu/module.h"
15 #include "hw/arm/bcm2835_peripherals.h"
16 #include "hw/misc/bcm2835_mbox_defs.h"
17 #include "hw/arm/raspi_platform.h"
18 #include "sysemu/sysemu.h"
20 /* Peripheral base address on the VC (GPU) system bus */
21 #define BCM2835_VC_PERI_BASE 0x7e000000
23 /* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */
24 #define BCM2835_SDHC_CAPAREG 0x52134b4
26 static void create_unimp(BCM2835PeripheralState *ps,
27 UnimplementedDeviceState *uds,
28 const char *name, hwaddr ofs, hwaddr size)
30 object_initialize_child(OBJECT(ps), name, uds, TYPE_UNIMPLEMENTED_DEVICE);
31 qdev_prop_set_string(DEVICE(uds), "name", name);
32 qdev_prop_set_uint64(DEVICE(uds), "size", size);
33 sysbus_realize(SYS_BUS_DEVICE(uds), &error_fatal);
34 memory_region_add_subregion_overlap(&ps->peri_mr, ofs,
35 sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0), -1000);
38 static void bcm2835_peripherals_init(Object *obj)
40 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj);
42 /* Memory region for peripheral devices, which we export to our parent */
43 memory_region_init(&s->peri_mr, obj,"bcm2835-peripherals", 0x1000000);
44 sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_mr);
46 /* Internal memory region for peripheral bus addresses (not exported) */
47 memory_region_init(&s->gpu_bus_mr, obj, "bcm2835-gpu", (uint64_t)1 << 32);
49 /* Internal memory region for request/response communication with
50 * mailbox-addressable peripherals (not exported)
52 memory_region_init(&s->mbox_mr, obj, "bcm2835-mbox",
53 MBOX_CHAN_COUNT << MBOX_AS_CHAN_SHIFT);
55 /* Interrupt Controller */
56 object_initialize_child(obj, "ic", &s->ic, TYPE_BCM2835_IC);
58 /* SYS Timer */
59 object_initialize_child(obj, "systimer", &s->systmr,
60 TYPE_BCM2835_SYSTIMER);
62 /* UART0 */
63 object_initialize_child(obj, "uart0", &s->uart0, TYPE_PL011);
65 /* AUX / UART1 */
66 object_initialize_child(obj, "aux", &s->aux, TYPE_BCM2835_AUX);
68 /* Mailboxes */
69 object_initialize_child(obj, "mbox", &s->mboxes, TYPE_BCM2835_MBOX);
71 object_property_add_const_link(OBJECT(&s->mboxes), "mbox-mr",
72 OBJECT(&s->mbox_mr));
74 /* Framebuffer */
75 object_initialize_child(obj, "fb", &s->fb, TYPE_BCM2835_FB);
76 object_property_add_alias(obj, "vcram-size", OBJECT(&s->fb), "vcram-size");
78 object_property_add_const_link(OBJECT(&s->fb), "dma-mr",
79 OBJECT(&s->gpu_bus_mr));
81 /* Property channel */
82 object_initialize_child(obj, "property", &s->property,
83 TYPE_BCM2835_PROPERTY);
84 object_property_add_alias(obj, "board-rev", OBJECT(&s->property),
85 "board-rev");
87 object_property_add_const_link(OBJECT(&s->property), "fb",
88 OBJECT(&s->fb));
89 object_property_add_const_link(OBJECT(&s->property), "dma-mr",
90 OBJECT(&s->gpu_bus_mr));
92 /* Random Number Generator */
93 object_initialize_child(obj, "rng", &s->rng, TYPE_BCM2835_RNG);
95 /* Extended Mass Media Controller */
96 object_initialize_child(obj, "sdhci", &s->sdhci, TYPE_SYSBUS_SDHCI);
98 /* SDHOST */
99 object_initialize_child(obj, "sdhost", &s->sdhost, TYPE_BCM2835_SDHOST);
101 /* DMA Channels */
102 object_initialize_child(obj, "dma", &s->dma, TYPE_BCM2835_DMA);
104 object_property_add_const_link(OBJECT(&s->dma), "dma-mr",
105 OBJECT(&s->gpu_bus_mr));
107 /* Thermal */
108 object_initialize_child(obj, "thermal", &s->thermal, TYPE_BCM2835_THERMAL);
110 /* GPIO */
111 object_initialize_child(obj, "gpio", &s->gpio, TYPE_BCM2835_GPIO);
113 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci",
114 OBJECT(&s->sdhci.sdbus));
115 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhost",
116 OBJECT(&s->sdhost.sdbus));
118 /* Mphi */
119 object_initialize_child(obj, "mphi", &s->mphi, TYPE_BCM2835_MPHI);
121 /* DWC2 */
122 object_initialize_child(obj, "dwc2", &s->dwc2, TYPE_DWC2_USB);
124 /* CPRMAN clock manager */
125 object_initialize_child(obj, "cprman", &s->cprman, TYPE_BCM2835_CPRMAN);
127 object_property_add_const_link(OBJECT(&s->dwc2), "dma-mr",
128 OBJECT(&s->gpu_bus_mr));
130 /* Power Management */
131 object_initialize_child(obj, "powermgt", &s->powermgt,
132 TYPE_BCM2835_POWERMGT);
135 static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
137 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(dev);
138 Object *obj;
139 MemoryRegion *ram;
140 Error *err = NULL;
141 uint64_t ram_size, vcram_size;
142 int n;
144 obj = object_property_get_link(OBJECT(dev), "ram", &error_abort);
146 ram = MEMORY_REGION(obj);
147 ram_size = memory_region_size(ram);
149 /* Map peripherals and RAM into the GPU address space. */
150 memory_region_init_alias(&s->peri_mr_alias, OBJECT(s),
151 "bcm2835-peripherals", &s->peri_mr, 0,
152 memory_region_size(&s->peri_mr));
154 memory_region_add_subregion_overlap(&s->gpu_bus_mr, BCM2835_VC_PERI_BASE,
155 &s->peri_mr_alias, 1);
157 /* RAM is aliased four times (different cache configurations) on the GPU */
158 for (n = 0; n < 4; n++) {
159 memory_region_init_alias(&s->ram_alias[n], OBJECT(s),
160 "bcm2835-gpu-ram-alias[*]", ram, 0, ram_size);
161 memory_region_add_subregion_overlap(&s->gpu_bus_mr, (hwaddr)n << 30,
162 &s->ram_alias[n], 0);
165 /* Interrupt Controller */
166 if (!sysbus_realize(SYS_BUS_DEVICE(&s->ic), errp)) {
167 return;
170 /* CPRMAN clock manager */
171 if (!sysbus_realize(SYS_BUS_DEVICE(&s->cprman), errp)) {
172 return;
174 memory_region_add_subregion(&s->peri_mr, CPRMAN_OFFSET,
175 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cprman), 0));
176 qdev_connect_clock_in(DEVICE(&s->uart0), "clk",
177 qdev_get_clock_out(DEVICE(&s->cprman), "uart-out"));
179 memory_region_add_subregion(&s->peri_mr, ARMCTRL_IC_OFFSET,
180 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0));
181 sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic));
183 /* Sys Timer */
184 if (!sysbus_realize(SYS_BUS_DEVICE(&s->systmr), errp)) {
185 return;
187 memory_region_add_subregion(&s->peri_mr, ST_OFFSET,
188 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systmr), 0));
189 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 0,
190 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
191 INTERRUPT_TIMER0));
192 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 1,
193 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
194 INTERRUPT_TIMER1));
195 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 2,
196 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
197 INTERRUPT_TIMER2));
198 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 3,
199 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
200 INTERRUPT_TIMER3));
202 /* UART0 */
203 qdev_prop_set_chr(DEVICE(&s->uart0), "chardev", serial_hd(0));
204 if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart0), errp)) {
205 return;
208 memory_region_add_subregion(&s->peri_mr, UART0_OFFSET,
209 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart0), 0));
210 sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart0), 0,
211 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
212 INTERRUPT_UART0));
214 /* AUX / UART1 */
215 qdev_prop_set_chr(DEVICE(&s->aux), "chardev", serial_hd(1));
217 if (!sysbus_realize(SYS_BUS_DEVICE(&s->aux), errp)) {
218 return;
221 memory_region_add_subregion(&s->peri_mr, AUX_OFFSET,
222 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->aux), 0));
223 sysbus_connect_irq(SYS_BUS_DEVICE(&s->aux), 0,
224 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
225 INTERRUPT_AUX));
227 /* Mailboxes */
228 if (!sysbus_realize(SYS_BUS_DEVICE(&s->mboxes), errp)) {
229 return;
232 memory_region_add_subregion(&s->peri_mr, ARMCTRL_0_SBM_OFFSET,
233 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mboxes), 0));
234 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mboxes), 0,
235 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ,
236 INTERRUPT_ARM_MAILBOX));
238 /* Framebuffer */
239 vcram_size = object_property_get_uint(OBJECT(s), "vcram-size", &err);
240 if (err) {
241 error_propagate(errp, err);
242 return;
245 if (!object_property_set_uint(OBJECT(&s->fb), "vcram-base",
246 ram_size - vcram_size, errp)) {
247 return;
250 if (!sysbus_realize(SYS_BUS_DEVICE(&s->fb), errp)) {
251 return;
254 memory_region_add_subregion(&s->mbox_mr, MBOX_CHAN_FB << MBOX_AS_CHAN_SHIFT,
255 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->fb), 0));
256 sysbus_connect_irq(SYS_BUS_DEVICE(&s->fb), 0,
257 qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_FB));
259 /* Property channel */
260 if (!sysbus_realize(SYS_BUS_DEVICE(&s->property), errp)) {
261 return;
264 memory_region_add_subregion(&s->mbox_mr,
265 MBOX_CHAN_PROPERTY << MBOX_AS_CHAN_SHIFT,
266 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->property), 0));
267 sysbus_connect_irq(SYS_BUS_DEVICE(&s->property), 0,
268 qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_PROPERTY));
270 /* Random Number Generator */
271 if (!sysbus_realize(SYS_BUS_DEVICE(&s->rng), errp)) {
272 return;
275 memory_region_add_subregion(&s->peri_mr, RNG_OFFSET,
276 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->rng), 0));
278 /* Extended Mass Media Controller
280 * Compatible with:
281 * - SD Host Controller Specification Version 3.0 Draft 1.0
282 * - SDIO Specification Version 3.0
283 * - MMC Specification Version 4.4
285 * For the exact details please refer to the Arasan documentation:
286 * SD3.0_Host_AHB_eMMC4.4_Usersguide_ver5.9_jan11_10.pdf
288 object_property_set_uint(OBJECT(&s->sdhci), "sd-spec-version", 3,
289 &error_abort);
290 object_property_set_uint(OBJECT(&s->sdhci), "capareg",
291 BCM2835_SDHC_CAPAREG, &error_abort);
292 object_property_set_bool(OBJECT(&s->sdhci), "pending-insert-quirk", true,
293 &error_abort);
294 if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) {
295 return;
298 memory_region_add_subregion(&s->peri_mr, EMMC1_OFFSET,
299 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0));
300 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0,
301 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
302 INTERRUPT_ARASANSDIO));
304 /* SDHOST */
305 if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhost), errp)) {
306 return;
309 memory_region_add_subregion(&s->peri_mr, MMCI0_OFFSET,
310 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhost), 0));
311 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhost), 0,
312 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
313 INTERRUPT_SDIO));
315 /* DMA Channels */
316 if (!sysbus_realize(SYS_BUS_DEVICE(&s->dma), errp)) {
317 return;
320 memory_region_add_subregion(&s->peri_mr, DMA_OFFSET,
321 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 0));
322 memory_region_add_subregion(&s->peri_mr, DMA15_OFFSET,
323 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 1));
325 for (n = 0; n <= 12; n++) {
326 sysbus_connect_irq(SYS_BUS_DEVICE(&s->dma), n,
327 qdev_get_gpio_in_named(DEVICE(&s->ic),
328 BCM2835_IC_GPU_IRQ,
329 INTERRUPT_DMA0 + n));
332 /* THERMAL */
333 if (!sysbus_realize(SYS_BUS_DEVICE(&s->thermal), errp)) {
334 return;
336 memory_region_add_subregion(&s->peri_mr, THERMAL_OFFSET,
337 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->thermal), 0));
339 /* GPIO */
340 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) {
341 return;
344 memory_region_add_subregion(&s->peri_mr, GPIO_OFFSET,
345 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gpio), 0));
347 object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->gpio), "sd-bus");
349 /* Mphi */
350 if (!sysbus_realize(SYS_BUS_DEVICE(&s->mphi), errp)) {
351 return;
354 memory_region_add_subregion(&s->peri_mr, MPHI_OFFSET,
355 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mphi), 0));
356 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mphi), 0,
357 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
358 INTERRUPT_HOSTPORT));
360 /* DWC2 */
361 if (!sysbus_realize(SYS_BUS_DEVICE(&s->dwc2), errp)) {
362 return;
365 memory_region_add_subregion(&s->peri_mr, USB_OTG_OFFSET,
366 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dwc2), 0));
367 sysbus_connect_irq(SYS_BUS_DEVICE(&s->dwc2), 0,
368 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
369 INTERRUPT_USB));
371 /* Power Management */
372 if (!sysbus_realize(SYS_BUS_DEVICE(&s->powermgt), errp)) {
373 return;
376 memory_region_add_subregion(&s->peri_mr, PM_OFFSET,
377 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->powermgt), 0));
379 create_unimp(s, &s->txp, "bcm2835-txp", TXP_OFFSET, 0x1000);
380 create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
381 create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
382 create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100);
383 create_unimp(s, &s->spi[0], "bcm2835-spi0", SPI0_OFFSET, 0x20);
384 create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, 0x100);
385 create_unimp(s, &s->i2c[0], "bcm2835-i2c0", BSC0_OFFSET, 0x20);
386 create_unimp(s, &s->i2c[1], "bcm2835-i2c1", BSC1_OFFSET, 0x20);
387 create_unimp(s, &s->i2c[2], "bcm2835-i2c2", BSC2_OFFSET, 0x20);
388 create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80);
389 create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000);
390 create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000);
391 create_unimp(s, &s->v3d, "bcm2835-v3d", V3D_OFFSET, 0x1000);
392 create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100);
395 static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data)
397 DeviceClass *dc = DEVICE_CLASS(oc);
399 dc->realize = bcm2835_peripherals_realize;
402 static const TypeInfo bcm2835_peripherals_type_info = {
403 .name = TYPE_BCM2835_PERIPHERALS,
404 .parent = TYPE_SYS_BUS_DEVICE,
405 .instance_size = sizeof(BCM2835PeripheralState),
406 .instance_init = bcm2835_peripherals_init,
407 .class_init = bcm2835_peripherals_class_init,
410 static void bcm2835_peripherals_register_types(void)
412 type_register_static(&bcm2835_peripherals_type_info);
415 type_init(bcm2835_peripherals_register_types)