target/mips: Convert CFCMSA opcode to decodetree
[qemu/rayw.git] / include / hw / or-irq.h
blobf2f0a27381065df9ce69bf3d785a7dace608eeac
1 /*
2 * QEMU IRQ/GPIO common code.
4 * Copyright (c) 2016 Alistair Francis <alistair@alistair23.me>.
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
25 #ifndef HW_OR_IRQ_H
26 #define HW_OR_IRQ_H
28 #include "hw/sysbus.h"
29 #include "qom/object.h"
31 #define TYPE_OR_IRQ "or-irq"
33 /* This can safely be increased if necessary without breaking
34 * migration compatibility (as long as it remains greater than 15).
36 #define MAX_OR_LINES 48
38 typedef struct OrIRQState qemu_or_irq;
40 DECLARE_INSTANCE_CHECKER(qemu_or_irq, OR_IRQ,
41 TYPE_OR_IRQ)
43 struct OrIRQState {
44 DeviceState parent_obj;
46 qemu_irq out_irq;
47 bool levels[MAX_OR_LINES];
48 uint16_t num_lines;
51 #endif