target/mips: Convert CFCMSA opcode to decodetree
[qemu/rayw.git] / include / hw / arm / aspeed.h
blobcbeacb214ca45278cd57709a737f0b5b101f8b2a
1 /*
2 * Aspeed Machines
4 * Copyright 2018 IBM Corp.
6 * This code is licensed under the GPL version 2 or later. See
7 * the COPYING file in the top-level directory.
8 */
9 #ifndef ARM_ASPEED_H
10 #define ARM_ASPEED_H
12 #include "hw/boards.h"
13 #include "qom/object.h"
15 typedef struct AspeedMachineState AspeedMachineState;
17 #define TYPE_ASPEED_MACHINE MACHINE_TYPE_NAME("aspeed")
18 typedef struct AspeedMachineClass AspeedMachineClass;
19 DECLARE_OBJ_CHECKERS(AspeedMachineState, AspeedMachineClass,
20 ASPEED_MACHINE, TYPE_ASPEED_MACHINE)
22 #define ASPEED_MAC0_ON (1 << 0)
23 #define ASPEED_MAC1_ON (1 << 1)
24 #define ASPEED_MAC2_ON (1 << 2)
25 #define ASPEED_MAC3_ON (1 << 3)
28 struct AspeedMachineClass {
29 MachineClass parent_obj;
31 const char *name;
32 const char *desc;
33 const char *soc_name;
34 uint32_t hw_strap1;
35 uint32_t hw_strap2;
36 const char *fmc_model;
37 const char *spi_model;
38 uint32_t num_cs;
39 uint32_t macs_mask;
40 void (*i2c_init)(AspeedMachineState *bmc);
41 uint32_t uart_default;
45 #endif