2 * ASPEED GPIO Controller
4 * Copyright (C) 2017-2018 IBM Corp.
6 * This code is licensed under the GPL version 2 or later. See
7 * the COPYING file in the top-level directory.
13 #include "hw/sysbus.h"
15 #define TYPE_ASPEED_GPIO "aspeed.gpio"
16 #define ASPEED_GPIO(obj) OBJECT_CHECK(AspeedGPIOState, (obj), TYPE_ASPEED_GPIO)
17 #define ASPEED_GPIO_CLASS(klass) \
18 OBJECT_CLASS_CHECK(AspeedGPIOClass, (klass), TYPE_ASPEED_GPIO)
19 #define ASPEED_GPIO_GET_CLASS(obj) \
20 OBJECT_GET_CLASS(AspeedGPIOClass, (obj), TYPE_ASPEED_GPIO)
22 #define ASPEED_GPIO_MAX_NR_SETS 8
23 #define ASPEED_REGS_PER_BANK 14
24 #define ASPEED_GPIO_MAX_NR_REGS (ASPEED_REGS_PER_BANK * ASPEED_GPIO_MAX_NR_SETS)
25 #define ASPEED_GPIO_NR_PINS 228
26 #define ASPEED_GROUPS_PER_SET 4
27 #define ASPEED_GPIO_NR_DEBOUNCE_REGS 3
28 #define ASPEED_CHARS_PER_GROUP_LABEL 4
30 typedef struct GPIOSets GPIOSets
;
32 typedef struct GPIOSetProperties
{
35 char group_label
[ASPEED_GROUPS_PER_SET
][ASPEED_CHARS_PER_GROUP_LABEL
];
47 gpio_reg_reset_tolerant
,
50 gpio_reg_cmd_source_0
,
51 gpio_reg_cmd_source_1
,
56 typedef struct AspeedGPIOReg
{
58 enum GPIORegType type
;
61 typedef struct AspeedGPIOClass
{
62 SysBusDevice parent_obj
;
63 const GPIOSetProperties
*props
;
64 uint32_t nr_gpio_pins
;
65 uint32_t nr_gpio_sets
;
67 const AspeedGPIOReg
*reg_table
;
70 typedef struct AspeedGPIOState
{
78 qemu_irq gpios
[ASPEED_GPIO_NR_PINS
];
80 /* Parallel GPIO Registers */
81 uint32_t debounce_regs
[ASPEED_GPIO_NR_DEBOUNCE_REGS
];
83 uint32_t data_value
; /* Reflects pin values */
84 uint32_t data_read
; /* Contains last value written to data value */
92 uint32_t cmd_source_0
;
93 uint32_t cmd_source_1
;
97 } sets
[ASPEED_GPIO_MAX_NR_SETS
];
100 #endif /* _ASPEED_GPIO_H_ */