4 * Copyright (c) 2012 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
23 #include "hw/qdev-core.h"
24 #include "disas/dis-asm.h"
25 #include "exec/cpu-common.h"
26 #include "exec/hwaddr.h"
27 #include "exec/memattrs.h"
28 #include "qapi/qapi-types-run-state.h"
29 #include "qemu/bitmap.h"
30 #include "qemu/rcu_queue.h"
31 #include "qemu/queue.h"
32 #include "qemu/thread.h"
33 #include "qemu/plugin.h"
34 #include "qom/object.h"
36 typedef int (*WriteCoreDumpFunction
)(const void *buf
, size_t size
,
41 * @section_id: QEMU-cpu
43 * @short_description: Base class for all CPUs
46 #define TYPE_CPU "cpu"
48 /* Since this macro is used a lot in hot code paths and in conjunction with
49 * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
52 #define CPU(obj) ((CPUState *)(obj))
54 typedef struct CPUClass CPUClass
;
55 DECLARE_CLASS_CHECKERS(CPUClass
, CPU
,
59 * OBJECT_DECLARE_CPU_TYPE:
60 * @CpuInstanceType: instance struct name
61 * @CpuClassType: class struct name
62 * @CPU_MODULE_OBJ_NAME: the CPU name in uppercase with underscore separators
64 * This macro is typically used in "cpu-qom.h" header file, and will:
66 * - create the typedefs for the CPU object and class structs
67 * - register the type for use with g_autoptr
68 * - provide three standard type cast functions
70 * The object struct and class struct need to be declared manually.
72 #define OBJECT_DECLARE_CPU_TYPE(CpuInstanceType, CpuClassType, CPU_MODULE_OBJ_NAME) \
73 typedef struct ArchCPU CpuInstanceType; \
74 OBJECT_DECLARE_TYPE(ArchCPU, CpuClassType, CPU_MODULE_OBJ_NAME);
76 typedef enum MMUAccessType
{
82 typedef struct CPUWatchpoint CPUWatchpoint
;
84 /* see tcg-cpu-ops.h */
90 /* see sysemu-cpu-ops.h */
95 * @class_by_name: Callback to map -cpu command line model name to an
96 * instantiatable CPU type.
97 * @parse_features: Callback to parse command line arguments.
98 * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
99 * @has_work: Callback for checking if there is work to do.
100 * @memory_rw_debug: Callback for GDB memory access.
101 * @dump_state: Callback for dumping state.
102 * @get_arch_id: Callback for getting architecture-dependent CPU ID.
103 * @set_pc: Callback for setting the Program Counter register. This
104 * should have the semantics used by the target architecture when
105 * setting the PC from a source such as an ELF file entry point;
106 * for example on Arm it will also set the Thumb mode bit based
107 * on the least significant bit of the new PC value.
108 * If the target behaviour here is anything other than "set
109 * the PC register to the value passed in" then the target must
110 * also implement the synchronize_from_tb hook.
111 * @gdb_read_register: Callback for letting GDB read a register.
112 * @gdb_write_register: Callback for letting GDB write a register.
113 * @gdb_adjust_breakpoint: Callback for adjusting the address of a
114 * breakpoint. Used by AVR to handle a gdb mis-feature with
115 * its Harvard architecture split code and data.
116 * @gdb_num_core_regs: Number of core registers accessible to GDB.
117 * @gdb_core_xml_file: File name for core registers GDB XML description.
118 * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop
119 * before the insn which triggers a watchpoint rather than after it.
120 * @gdb_arch_name: Optional callback that returns the architecture name known
121 * to GDB. The caller must free the returned string with g_free.
122 * @gdb_get_dynamic_xml: Callback to return dynamically generated XML for the
123 * gdb stub. Returns a pointer to the XML contents for the specified XML file
124 * or NULL if the CPU doesn't have a dynamically generated content for it.
125 * @disas_set_info: Setup architecture specific components of disassembly info
126 * @adjust_watchpoint_address: Perform a target-specific adjustment to an
127 * address before attempting to match it against watchpoints.
128 * @deprecation_note: If this CPUClass is deprecated, this field provides
129 * related information.
131 * Represents a CPU family or model.
135 DeviceClass parent_class
;
138 ObjectClass
*(*class_by_name
)(const char *cpu_model
);
139 void (*parse_features
)(const char *typename
, char *str
, Error
**errp
);
141 bool (*has_work
)(CPUState
*cpu
);
142 int (*memory_rw_debug
)(CPUState
*cpu
, vaddr addr
,
143 uint8_t *buf
, int len
, bool is_write
);
144 void (*dump_state
)(CPUState
*cpu
, FILE *, int flags
);
145 int64_t (*get_arch_id
)(CPUState
*cpu
);
146 void (*set_pc
)(CPUState
*cpu
, vaddr value
);
147 int (*gdb_read_register
)(CPUState
*cpu
, GByteArray
*buf
, int reg
);
148 int (*gdb_write_register
)(CPUState
*cpu
, uint8_t *buf
, int reg
);
149 vaddr (*gdb_adjust_breakpoint
)(CPUState
*cpu
, vaddr addr
);
151 const char *gdb_core_xml_file
;
152 gchar
* (*gdb_arch_name
)(CPUState
*cpu
);
153 const char * (*gdb_get_dynamic_xml
)(CPUState
*cpu
, const char *xmlname
);
155 void (*disas_set_info
)(CPUState
*cpu
, disassemble_info
*info
);
157 const char *deprecation_note
;
158 struct AccelCPUClass
*accel_cpu
;
160 /* when system emulation is not available, this pointer is NULL */
161 const struct SysemuCPUOps
*sysemu_ops
;
163 /* when TCG is not available, this pointer is NULL */
164 const struct TCGCPUOps
*tcg_ops
;
167 * if not NULL, this is called in order for the CPUClass to initialize
168 * class data that depends on the accelerator, see accel/accel-common.c.
170 void (*init_accel_cpu
)(struct AccelCPUClass
*accel_cpu
, CPUClass
*cc
);
173 * Keep non-pointer data at the end to minimize holes.
175 int reset_dump_flags
;
176 int gdb_num_core_regs
;
177 bool gdb_stop_before_watchpoint
;
181 * Low 16 bits: number of cycles left, used only in icount mode.
182 * High 16 bits: Set to -1 to force TCG to stop executing linked TBs
183 * for this CPU and return to its top level loop (even in non-icount mode).
184 * This allows a single read-compare-cbranch-write sequence to test
185 * for both decrementer underflow and exceptions.
187 typedef union IcountDecr
{
200 typedef struct CPUBreakpoint
{
202 int flags
; /* BP_* */
203 QTAILQ_ENTRY(CPUBreakpoint
) entry
;
206 struct CPUWatchpoint
{
211 int flags
; /* BP_* */
212 QTAILQ_ENTRY(CPUWatchpoint
) entry
;
217 * For plugins we sometime need to save the resolved iotlb data before
218 * the memory regions get moved around by io_writex.
220 typedef struct SavedIOTLB
{
222 MemoryRegionSection
*section
;
230 struct hax_vcpu_state
;
231 struct hvf_vcpu_state
;
233 #define TB_JMP_CACHE_BITS 12
234 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
238 /* The union type allows passing of 64 bit target pointers on 32 bit
239 * hosts in a single parameter
243 unsigned long host_ulong
;
248 #define RUN_ON_CPU_HOST_PTR(p) ((run_on_cpu_data){.host_ptr = (p)})
249 #define RUN_ON_CPU_HOST_INT(i) ((run_on_cpu_data){.host_int = (i)})
250 #define RUN_ON_CPU_HOST_ULONG(ul) ((run_on_cpu_data){.host_ulong = (ul)})
251 #define RUN_ON_CPU_TARGET_PTR(v) ((run_on_cpu_data){.target_ptr = (v)})
252 #define RUN_ON_CPU_NULL RUN_ON_CPU_HOST_PTR(NULL)
254 typedef void (*run_on_cpu_func
)(CPUState
*cpu
, run_on_cpu_data data
);
256 struct qemu_work_item
;
258 #define CPU_UNSET_NUMA_NODE_ID -1
259 #define CPU_TRACE_DSTATE_MAX_EVENTS 32
263 * @cpu_index: CPU index (informative).
264 * @cluster_index: Identifies which cluster this CPU is in.
265 * For boards which don't define clusters or for "loose" CPUs not assigned
266 * to a cluster this will be UNASSIGNED_CLUSTER_INDEX; otherwise it will
267 * be the same as the cluster-id property of the CPU object's TYPE_CPU_CLUSTER
269 * @tcg_cflags: Pre-computed cflags for this cpu.
270 * @nr_cores: Number of cores within this CPU package.
271 * @nr_threads: Number of threads within this CPU.
272 * @running: #true if CPU is currently running (lockless).
273 * @has_waiter: #true if a CPU is currently waiting for the cpu_exec_end;
274 * valid under cpu_list_lock.
275 * @created: Indicates whether the CPU thread has been successfully created.
276 * @interrupt_request: Indicates a pending interrupt request.
277 * @halted: Nonzero if the CPU is in suspended state.
278 * @stop: Indicates a pending stop request.
279 * @stopped: Indicates the CPU has been artificially stopped.
280 * @unplug: Indicates a pending CPU unplug request.
281 * @crash_occurred: Indicates the OS reported a crash (panic) for this CPU
282 * @singlestep_enabled: Flags for single-stepping.
283 * @icount_extra: Instructions until next timer event.
284 * @can_do_io: Nonzero if memory-mapped IO is safe. Deterministic execution
285 * requires that IO only be performed on the last instruction of a TB
286 * so that interrupts take effect immediately.
287 * @cpu_ases: Pointer to array of CPUAddressSpaces (which define the
288 * AddressSpaces this CPU has)
289 * @num_ases: number of CPUAddressSpaces in @cpu_ases
290 * @as: Pointer to the first AddressSpace, for the convenience of targets which
291 * only have a single AddressSpace
292 * @env_ptr: Pointer to subclass-specific CPUArchState field.
293 * @icount_decr_ptr: Pointer to IcountDecr field within subclass.
294 * @gdb_regs: Additional GDB registers.
295 * @gdb_num_regs: Number of total registers accessible to GDB.
296 * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
297 * @next_cpu: Next CPU sharing TB cache.
298 * @opaque: User data.
299 * @mem_io_pc: Host Program Counter at which the memory was accessed.
300 * @kvm_fd: vCPU file descriptor for KVM.
301 * @work_mutex: Lock to prevent multiple access to @work_list.
302 * @work_list: List of pending asynchronous work.
303 * @trace_dstate_delayed: Delayed changes to trace_dstate (includes all changes
305 * @trace_dstate: Dynamic tracing state of events for this vCPU (bitmask).
306 * @plugin_mask: Plugin event bitmap. Modified only via async work.
307 * @ignore_memory_transaction_failures: Cached copy of the MachineState
308 * flag of the same name: allows the board to suppress calling of the
309 * CPU do_transaction_failed hook function.
310 * @kvm_dirty_gfns: Points to the KVM dirty ring for this CPU when KVM dirty
312 * @kvm_fetch_index: Keeps the index that we last fetched from the per-vCPU
313 * dirty ring structure.
315 * State of one CPU core or thread.
319 DeviceState parent_obj
;
325 struct QemuThread
*thread
;
330 bool running
, has_waiter
;
331 struct QemuCond
*halt_cond
;
337 /* Should CPU start in powered-off state? */
338 bool start_powered_off
;
343 bool in_exclusive_context
;
344 uint32_t cflags_next_tb
;
345 /* updates protected by BQL */
346 uint32_t interrupt_request
;
347 int singlestep_enabled
;
348 int64_t icount_budget
;
349 int64_t icount_extra
;
350 uint64_t random_seed
;
353 QemuMutex work_mutex
;
354 QSIMPLEQ_HEAD(, qemu_work_item
) work_list
;
356 CPUAddressSpace
*cpu_ases
;
359 MemoryRegion
*memory
;
361 CPUArchState
*env_ptr
;
362 IcountDecr
*icount_decr_ptr
;
364 /* Accessed in parallel; all accesses must be atomic */
365 TranslationBlock
*tb_jmp_cache
[TB_JMP_CACHE_SIZE
];
367 struct GDBRegisterState
*gdb_regs
;
370 QTAILQ_ENTRY(CPUState
) node
;
372 /* ice debug support */
373 QTAILQ_HEAD(, CPUBreakpoint
) breakpoints
;
375 QTAILQ_HEAD(, CPUWatchpoint
) watchpoints
;
376 CPUWatchpoint
*watchpoint_hit
;
380 /* In order to avoid passing too many arguments to the MMIO helpers,
381 * we store some rarely used information in the CPU context.
385 /* Only used in KVM */
387 struct KVMState
*kvm_state
;
388 struct kvm_run
*kvm_run
;
389 struct kvm_dirty_gfn
*kvm_dirty_gfns
;
390 uint32_t kvm_fetch_index
;
391 uint64_t dirty_pages
;
393 /* Used for events with 'vcpu' and *without* the 'disabled' properties */
394 DECLARE_BITMAP(trace_dstate_delayed
, CPU_TRACE_DSTATE_MAX_EVENTS
);
395 DECLARE_BITMAP(trace_dstate
, CPU_TRACE_DSTATE_MAX_EVENTS
);
397 DECLARE_BITMAP(plugin_mask
, QEMU_PLUGIN_EV_MAX
);
400 GArray
*plugin_mem_cbs
;
401 /* saved iotlb data from io_writex */
402 SavedIOTLB saved_iotlb
;
405 /* TODO Move common fields from CPUArchState here. */
411 int32_t exception_index
;
413 /* shared by kvm, hax and hvf */
416 /* Used to keep track of an outstanding cpu throttle thread for migration
419 bool throttle_thread_scheduled
;
421 bool ignore_memory_transaction_failures
;
423 /* Used for user-only emulation of prctl(PR_SET_UNALIGN). */
424 bool prctl_unalign_sigbus
;
426 struct hax_vcpu_state
*hax_vcpu
;
428 struct hvf_vcpu_state
*hvf
;
430 /* track IOMMUs whose translations we've cached in the TCG TLB */
431 GArray
*iommu_notifiers
;
434 typedef QTAILQ_HEAD(CPUTailQ
, CPUState
) CPUTailQ
;
435 extern CPUTailQ cpus
;
437 #define first_cpu QTAILQ_FIRST_RCU(&cpus)
438 #define CPU_NEXT(cpu) QTAILQ_NEXT_RCU(cpu, node)
439 #define CPU_FOREACH(cpu) QTAILQ_FOREACH_RCU(cpu, &cpus, node)
440 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
441 QTAILQ_FOREACH_SAFE_RCU(cpu, &cpus, node, next_cpu)
443 extern __thread CPUState
*current_cpu
;
445 static inline void cpu_tb_jmp_cache_clear(CPUState
*cpu
)
449 for (i
= 0; i
< TB_JMP_CACHE_SIZE
; i
++) {
450 qatomic_set(&cpu
->tb_jmp_cache
[i
], NULL
);
455 * qemu_tcg_mttcg_enabled:
456 * Check whether we are running MultiThread TCG or not.
458 * Returns: %true if we are in MTTCG mode %false otherwise.
460 extern bool mttcg_enabled
;
461 #define qemu_tcg_mttcg_enabled() (mttcg_enabled)
464 * cpu_paging_enabled:
465 * @cpu: The CPU whose state is to be inspected.
467 * Returns: %true if paging is enabled, %false otherwise.
469 bool cpu_paging_enabled(const CPUState
*cpu
);
472 * cpu_get_memory_mapping:
473 * @cpu: The CPU whose memory mappings are to be obtained.
474 * @list: Where to write the memory mappings to.
475 * @errp: Pointer for reporting an #Error.
477 void cpu_get_memory_mapping(CPUState
*cpu
, MemoryMappingList
*list
,
480 #if !defined(CONFIG_USER_ONLY)
483 * cpu_write_elf64_note:
484 * @f: pointer to a function that writes memory to a file
485 * @cpu: The CPU whose memory is to be dumped
486 * @cpuid: ID number of the CPU
487 * @opaque: pointer to the CPUState struct
489 int cpu_write_elf64_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
490 int cpuid
, void *opaque
);
493 * cpu_write_elf64_qemunote:
494 * @f: pointer to a function that writes memory to a file
495 * @cpu: The CPU whose memory is to be dumped
496 * @cpuid: ID number of the CPU
497 * @opaque: pointer to the CPUState struct
499 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
503 * cpu_write_elf32_note:
504 * @f: pointer to a function that writes memory to a file
505 * @cpu: The CPU whose memory is to be dumped
506 * @cpuid: ID number of the CPU
507 * @opaque: pointer to the CPUState struct
509 int cpu_write_elf32_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
510 int cpuid
, void *opaque
);
513 * cpu_write_elf32_qemunote:
514 * @f: pointer to a function that writes memory to a file
515 * @cpu: The CPU whose memory is to be dumped
516 * @cpuid: ID number of the CPU
517 * @opaque: pointer to the CPUState struct
519 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
523 * cpu_get_crash_info:
524 * @cpu: The CPU to get crash information for
526 * Gets the previously saved crash information.
527 * Caller is responsible for freeing the data.
529 GuestPanicInformation
*cpu_get_crash_info(CPUState
*cpu
);
531 #endif /* !CONFIG_USER_ONLY */
536 * @CPU_DUMP_FPU: dump FPU register state, not just integer
537 * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
540 CPU_DUMP_CODE
= 0x00010000,
541 CPU_DUMP_FPU
= 0x00020000,
542 CPU_DUMP_CCOP
= 0x00040000,
547 * @cpu: The CPU whose state is to be dumped.
548 * @f: If non-null, dump to this stream, else to current print sink.
552 void cpu_dump_state(CPUState
*cpu
, FILE *f
, int flags
);
554 #ifndef CONFIG_USER_ONLY
556 * cpu_get_phys_page_attrs_debug:
557 * @cpu: The CPU to obtain the physical page address for.
558 * @addr: The virtual address.
559 * @attrs: Updated on return with the memory transaction attributes to use
562 * Obtains the physical page corresponding to a virtual one, together
563 * with the corresponding memory transaction attributes to use for the access.
564 * Use it only for debugging because no protection checks are done.
566 * Returns: Corresponding physical page address or -1 if no page found.
568 hwaddr
cpu_get_phys_page_attrs_debug(CPUState
*cpu
, vaddr addr
,
572 * cpu_get_phys_page_debug:
573 * @cpu: The CPU to obtain the physical page address for.
574 * @addr: The virtual address.
576 * Obtains the physical page corresponding to a virtual one.
577 * Use it only for debugging because no protection checks are done.
579 * Returns: Corresponding physical page address or -1 if no page found.
581 hwaddr
cpu_get_phys_page_debug(CPUState
*cpu
, vaddr addr
);
583 /** cpu_asidx_from_attrs:
585 * @attrs: memory transaction attributes
587 * Returns the address space index specifying the CPU AddressSpace
588 * to use for a memory access with the given transaction attributes.
590 int cpu_asidx_from_attrs(CPUState
*cpu
, MemTxAttrs attrs
);
593 * cpu_virtio_is_big_endian:
596 * Returns %true if a CPU which supports runtime configurable endianness
597 * is currently big-endian.
599 bool cpu_virtio_is_big_endian(CPUState
*cpu
);
601 #endif /* CONFIG_USER_ONLY */
605 * @cpu: The CPU to be added to the list of CPUs.
607 void cpu_list_add(CPUState
*cpu
);
611 * @cpu: The CPU to be removed from the list of CPUs.
613 void cpu_list_remove(CPUState
*cpu
);
617 * @cpu: The CPU whose state is to be reset.
619 void cpu_reset(CPUState
*cpu
);
623 * @typename: The CPU base type.
624 * @cpu_model: The model string without any parameters.
626 * Looks up a CPU #ObjectClass matching name @cpu_model.
628 * Returns: A #CPUClass or %NULL if not matching class is found.
630 ObjectClass
*cpu_class_by_name(const char *typename
, const char *cpu_model
);
634 * @typename: The CPU type.
636 * Instantiates a CPU and realizes the CPU.
638 * Returns: A #CPUState or %NULL if an error occurred.
640 CPUState
*cpu_create(const char *typename
);
644 * @cpu_option: The -cpu option including optional parameters.
646 * processes optional parameters and registers them as global properties
648 * Returns: type of CPU to create or prints error and terminates process
649 * if an error occurred.
651 const char *parse_cpu_option(const char *cpu_option
);
655 * @cpu: The vCPU to check.
657 * Checks whether the CPU has work to do.
659 * Returns: %true if the CPU has work, %false otherwise.
661 static inline bool cpu_has_work(CPUState
*cpu
)
663 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
665 g_assert(cc
->has_work
);
666 return cc
->has_work(cpu
);
671 * @cpu: The vCPU to check against.
673 * Checks whether the caller is executing on the vCPU thread.
675 * Returns: %true if called from @cpu's thread, %false otherwise.
677 bool qemu_cpu_is_self(CPUState
*cpu
);
681 * @cpu: The vCPU to kick.
683 * Kicks @cpu's thread.
685 void qemu_cpu_kick(CPUState
*cpu
);
689 * @cpu: The CPU to check.
691 * Checks whether the CPU is stopped.
693 * Returns: %true if run state is not running or if artificially stopped;
696 bool cpu_is_stopped(CPUState
*cpu
);
700 * @cpu: The vCPU to run on.
701 * @func: The function to be executed.
702 * @data: Data to pass to the function.
703 * @mutex: Mutex to release while waiting for @func to run.
705 * Used internally in the implementation of run_on_cpu.
707 void do_run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
,
712 * @cpu: The vCPU to run on.
713 * @func: The function to be executed.
714 * @data: Data to pass to the function.
716 * Schedules the function @func for execution on the vCPU @cpu.
718 void run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
);
722 * @cpu: The vCPU to run on.
723 * @func: The function to be executed.
724 * @data: Data to pass to the function.
726 * Schedules the function @func for execution on the vCPU @cpu asynchronously.
728 void async_run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
);
731 * async_safe_run_on_cpu:
732 * @cpu: The vCPU to run on.
733 * @func: The function to be executed.
734 * @data: Data to pass to the function.
736 * Schedules the function @func for execution on the vCPU @cpu asynchronously,
737 * while all other vCPUs are sleeping.
739 * Unlike run_on_cpu and async_run_on_cpu, the function is run outside the
742 void async_safe_run_on_cpu(CPUState
*cpu
, run_on_cpu_func func
, run_on_cpu_data data
);
745 * cpu_in_exclusive_context()
746 * @cpu: The vCPU to check
748 * Returns true if @cpu is an exclusive context, for example running
749 * something which has previously been queued via async_safe_run_on_cpu().
751 static inline bool cpu_in_exclusive_context(const CPUState
*cpu
)
753 return cpu
->in_exclusive_context
;
758 * @index: The CPUState@cpu_index value of the CPU to obtain.
760 * Gets a CPU matching @index.
762 * Returns: The CPU or %NULL if there is no matching CPU.
764 CPUState
*qemu_get_cpu(int index
);
768 * @id: Guest-exposed CPU ID to lookup.
770 * Search for CPU with specified ID.
772 * Returns: %true - CPU is found, %false - CPU isn't found.
774 bool cpu_exists(int64_t id
);
778 * @id: Guest-exposed CPU ID of the CPU to obtain.
780 * Get a CPU with matching @id.
782 * Returns: The CPU or %NULL if there is no matching CPU.
784 CPUState
*cpu_by_arch_id(int64_t id
);
788 * @cpu: The CPU to set an interrupt on.
789 * @mask: The interrupts to set.
791 * Invokes the interrupt handler.
794 void cpu_interrupt(CPUState
*cpu
, int mask
);
798 * @cpu: The CPU to set the program counter for.
799 * @addr: Program counter value.
801 * Sets the program counter for a CPU.
803 static inline void cpu_set_pc(CPUState
*cpu
, vaddr addr
)
805 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
807 cc
->set_pc(cpu
, addr
);
811 * cpu_reset_interrupt:
812 * @cpu: The CPU to clear the interrupt on.
813 * @mask: The interrupt mask to clear.
815 * Resets interrupts on the vCPU @cpu.
817 void cpu_reset_interrupt(CPUState
*cpu
, int mask
);
821 * @cpu: The CPU to exit.
823 * Requests the CPU @cpu to exit execution.
825 void cpu_exit(CPUState
*cpu
);
829 * @cpu: The CPU to resume.
831 * Resumes CPU, i.e. puts CPU into runnable state.
833 void cpu_resume(CPUState
*cpu
);
837 * @cpu: The CPU to remove.
839 * Requests the CPU to be removed and waits till it is removed.
841 void cpu_remove_sync(CPUState
*cpu
);
844 * process_queued_cpu_work() - process all items on CPU work queue
845 * @cpu: The CPU which work queue to process.
847 void process_queued_cpu_work(CPUState
*cpu
);
851 * @cpu: The CPU for the current thread.
853 * Record that a CPU has started execution and can be interrupted with
856 void cpu_exec_start(CPUState
*cpu
);
860 * @cpu: The CPU for the current thread.
862 * Record that a CPU has stopped execution and exclusive sections
863 * can be executed without interrupting it.
865 void cpu_exec_end(CPUState
*cpu
);
870 * Wait for a concurrent exclusive section to end, and then start
871 * a section of work that is run while other CPUs are not running
872 * between cpu_exec_start and cpu_exec_end. CPUs that are running
873 * cpu_exec are exited immediately. CPUs that call cpu_exec_start
874 * during the exclusive section go to sleep until this CPU calls
877 void start_exclusive(void);
882 * Concludes an exclusive execution section started by start_exclusive.
884 void end_exclusive(void);
888 * @cpu: The vCPU to initialize.
890 * Initializes a vCPU.
892 void qemu_init_vcpu(CPUState
*cpu
);
894 #define SSTEP_ENABLE 0x1 /* Enable simulated HW single stepping */
895 #define SSTEP_NOIRQ 0x2 /* Do not use IRQ while single stepping */
896 #define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
900 * @cpu: CPU to the flags for.
901 * @enabled: Flags to enable.
903 * Enables or disables single-stepping for @cpu.
905 void cpu_single_step(CPUState
*cpu
, int enabled
);
907 /* Breakpoint/watchpoint flags */
908 #define BP_MEM_READ 0x01
909 #define BP_MEM_WRITE 0x02
910 #define BP_MEM_ACCESS (BP_MEM_READ | BP_MEM_WRITE)
911 #define BP_STOP_BEFORE_ACCESS 0x04
912 /* 0x08 currently unused */
915 #define BP_ANY (BP_GDB | BP_CPU)
916 #define BP_WATCHPOINT_HIT_READ 0x40
917 #define BP_WATCHPOINT_HIT_WRITE 0x80
918 #define BP_WATCHPOINT_HIT (BP_WATCHPOINT_HIT_READ | BP_WATCHPOINT_HIT_WRITE)
920 int cpu_breakpoint_insert(CPUState
*cpu
, vaddr pc
, int flags
,
921 CPUBreakpoint
**breakpoint
);
922 int cpu_breakpoint_remove(CPUState
*cpu
, vaddr pc
, int flags
);
923 void cpu_breakpoint_remove_by_ref(CPUState
*cpu
, CPUBreakpoint
*breakpoint
);
924 void cpu_breakpoint_remove_all(CPUState
*cpu
, int mask
);
926 /* Return true if PC matches an installed breakpoint. */
927 static inline bool cpu_breakpoint_test(CPUState
*cpu
, vaddr pc
, int mask
)
931 if (unlikely(!QTAILQ_EMPTY(&cpu
->breakpoints
))) {
932 QTAILQ_FOREACH(bp
, &cpu
->breakpoints
, entry
) {
933 if (bp
->pc
== pc
&& (bp
->flags
& mask
)) {
941 #ifdef CONFIG_USER_ONLY
942 static inline int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
943 int flags
, CPUWatchpoint
**watchpoint
)
948 static inline int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
,
949 vaddr len
, int flags
)
954 static inline void cpu_watchpoint_remove_by_ref(CPUState
*cpu
,
959 static inline void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
)
963 static inline void cpu_check_watchpoint(CPUState
*cpu
, vaddr addr
, vaddr len
,
964 MemTxAttrs atr
, int fl
, uintptr_t ra
)
968 static inline int cpu_watchpoint_address_matches(CPUState
*cpu
,
969 vaddr addr
, vaddr len
)
974 int cpu_watchpoint_insert(CPUState
*cpu
, vaddr addr
, vaddr len
,
975 int flags
, CPUWatchpoint
**watchpoint
);
976 int cpu_watchpoint_remove(CPUState
*cpu
, vaddr addr
,
977 vaddr len
, int flags
);
978 void cpu_watchpoint_remove_by_ref(CPUState
*cpu
, CPUWatchpoint
*watchpoint
);
979 void cpu_watchpoint_remove_all(CPUState
*cpu
, int mask
);
982 * cpu_check_watchpoint:
984 * @addr: guest virtual address
985 * @len: access length
986 * @attrs: memory access attributes
987 * @flags: watchpoint access type
988 * @ra: unwind return address
990 * Check for a watchpoint hit in [addr, addr+len) of the type
991 * specified by @flags. Exit via exception with a hit.
993 void cpu_check_watchpoint(CPUState
*cpu
, vaddr addr
, vaddr len
,
994 MemTxAttrs attrs
, int flags
, uintptr_t ra
);
997 * cpu_watchpoint_address_matches:
999 * @addr: guest virtual address
1000 * @len: access length
1002 * Return the watchpoint flags that apply to [addr, addr+len).
1003 * If no watchpoint is registered for the range, the result is 0.
1005 int cpu_watchpoint_address_matches(CPUState
*cpu
, vaddr addr
, vaddr len
);
1009 * cpu_get_address_space:
1010 * @cpu: CPU to get address space from
1011 * @asidx: index identifying which address space to get
1013 * Return the requested address space of this CPU. @asidx
1014 * specifies which address space to read.
1016 AddressSpace
*cpu_get_address_space(CPUState
*cpu
, int asidx
);
1018 G_NORETURN
void cpu_abort(CPUState
*cpu
, const char *fmt
, ...)
1019 G_GNUC_PRINTF(2, 3);
1021 /* $(top_srcdir)/cpu.c */
1022 void cpu_class_init_props(DeviceClass
*dc
);
1023 void cpu_exec_initfn(CPUState
*cpu
);
1024 void cpu_exec_realizefn(CPUState
*cpu
, Error
**errp
);
1025 void cpu_exec_unrealizefn(CPUState
*cpu
);
1028 * target_words_bigendian:
1029 * Returns true if the (default) endianness of the target is big endian,
1030 * false otherwise. Note that in target-specific code, you can use
1031 * TARGET_BIG_ENDIAN directly instead. On the other hand, common
1032 * code should normally never need to know about the endianness of the
1033 * target, so please do *not* use this function unless you know very well
1034 * what you are doing!
1036 bool target_words_bigendian(void);
1038 void page_size_init(void);
1042 #ifdef CONFIG_SOFTMMU
1044 extern const VMStateDescription vmstate_cpu_common
;
1046 #define VMSTATE_CPU() { \
1047 .name = "parent_obj", \
1048 .size = sizeof(CPUState), \
1049 .vmsd = &vmstate_cpu_common, \
1050 .flags = VMS_STRUCT, \
1053 #endif /* CONFIG_SOFTMMU */
1055 #endif /* NEED_CPU_H */
1057 #define UNASSIGNED_CPU_INDEX -1
1058 #define UNASSIGNED_CLUSTER_INDEX -1