pc: Set fw_cfg data based on APIC ID calculation
[qemu/rayw.git] / hw / ssi.h
bloba05d60beb4ad6e5a394ff864fd2230bb93da6620
1 /* QEMU Synchronous Serial Interface support. */
3 /* In principle SSI is a point-point interface. As such the qemu
4 implementation has a single slave device on a "bus".
5 However it is fairly common for boards to have multiple slaves
6 connected to a single master, and select devices with an external
7 chip select. This is implemented in qemu by having an explicit mux device.
8 It is assumed that master and slave are both using the same transfer width.
9 */
11 #ifndef QEMU_SSI_H
12 #define QEMU_SSI_H
14 #include "qdev.h"
16 typedef struct SSISlave SSISlave;
18 #define TYPE_SSI_SLAVE "ssi-slave"
19 #define SSI_SLAVE(obj) \
20 OBJECT_CHECK(SSISlave, (obj), TYPE_SSI_SLAVE)
21 #define SSI_SLAVE_CLASS(klass) \
22 OBJECT_CLASS_CHECK(SSISlaveClass, (klass), TYPE_SSI_SLAVE)
23 #define SSI_SLAVE_GET_CLASS(obj) \
24 OBJECT_GET_CLASS(SSISlaveClass, (obj), TYPE_SSI_SLAVE)
26 typedef enum {
27 SSI_CS_NONE = 0,
28 SSI_CS_LOW,
29 SSI_CS_HIGH,
30 } SSICSMode;
32 /* Slave devices. */
33 typedef struct SSISlaveClass {
34 DeviceClass parent_class;
36 int (*init)(SSISlave *dev);
38 /* if you have standard or no CS behaviour, just override transfer.
39 * This is called when the device cs is active (true by default).
41 uint32_t (*transfer)(SSISlave *dev, uint32_t val);
42 /* called when the CS line changes. Optional, devices only need to implement
43 * this if they have side effects associated with the cs line (beyond
44 * tristating the txrx lines).
46 int (*set_cs)(SSISlave *dev, bool select);
47 /* define whether or not CS exists and is active low/high */
48 SSICSMode cs_polarity;
50 /* if you have non-standard CS behaviour override this to take control
51 * of the CS behaviour at the device level. transfer, set_cs, and
52 * cs_polarity are unused if this is overwritten. Transfer_raw will
53 * always be called for the device for every txrx access to the parent bus
55 uint32_t (*transfer_raw)(SSISlave *dev, uint32_t val);
56 } SSISlaveClass;
58 struct SSISlave {
59 DeviceState qdev;
61 /* Chip select state */
62 bool cs;
65 #define SSI_SLAVE_FROM_QDEV(dev) DO_UPCAST(SSISlave, qdev, dev)
66 #define FROM_SSI_SLAVE(type, dev) DO_UPCAST(type, ssidev, dev)
68 extern const VMStateDescription vmstate_ssi_slave;
70 #define VMSTATE_SSI_SLAVE(_field, _state) { \
71 .name = (stringify(_field)), \
72 .size = sizeof(SSISlave), \
73 .vmsd = &vmstate_ssi_slave, \
74 .flags = VMS_STRUCT, \
75 .offset = vmstate_offset_value(_state, _field, SSISlave), \
78 DeviceState *ssi_create_slave(SSIBus *bus, const char *name);
79 DeviceState *ssi_create_slave_no_init(SSIBus *bus, const char *name);
81 /* Master interface. */
82 SSIBus *ssi_create_bus(DeviceState *parent, const char *name);
84 uint32_t ssi_transfer(SSIBus *bus, uint32_t val);
86 /* Automatically connect all children nodes a spi controller as slaves */
87 void ssi_auto_connect_slaves(DeviceState *parent, qemu_irq *cs_lines,
88 SSIBus *bus);
90 /* max111x.c */
91 void max111x_set_input(DeviceState *dev, int line, uint8_t value);
93 #endif