pc: Set fw_cfg data based on APIC ID calculation
[qemu/rayw.git] / hw / pc-testdev.c
blobcf64a1f20356ac6fc7985c516195097585093b07
1 /*
2 * QEMU x86 ISA testdev
4 * Copyright (c) 2012 Avi Kivity, Gerd Hoffmann, Marcelo Tosatti
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
26 * This device is used to test KVM features specific to the x86 port, such
27 * as emulation, power management, interrupt routing, among others. It's meant
28 * to be used like:
30 * qemu-system-x86_64 -device pc-testdev -serial stdio \
31 * -device isa-debug-exit,iobase=0xf4,iosize=0x4 \
32 * -kernel /home/lmr/Code/virt-test.git/kvm/unittests/msr.flat
34 * Where msr.flat is one of the KVM unittests, present on a separate repo,
35 * git://git.kernel.org/pub/scm/virt/kvm/kvm-unit-tests.git
38 #include "config-host.h"
39 #if defined(CONFIG_POSIX)
40 #include <sys/mman.h>
41 #endif
42 #include "hw.h"
43 #include "qdev.h"
44 #include "isa.h"
46 #define IOMEM_LEN 0x10000
48 typedef struct PCTestdev {
49 ISADevice parent_obj;
51 MemoryRegion ioport;
52 MemoryRegion flush;
53 MemoryRegion irq;
54 MemoryRegion iomem;
55 uint32_t ioport_data;
56 char iomem_buf[IOMEM_LEN];
57 } PCTestdev;
59 #define TYPE_TESTDEV "pc-testdev"
60 #define TESTDEV(obj) \
61 OBJECT_CHECK(PCTestdev, (obj), TYPE_TESTDEV)
63 static void test_irq_line(void *opaque, hwaddr addr, uint64_t data,
64 unsigned len)
66 PCTestdev *dev = opaque;
67 ISADevice *isa = ISA_DEVICE(dev);
69 qemu_set_irq(isa_get_irq(isa, addr), !!data);
72 static const MemoryRegionOps test_irq_ops = {
73 .write = test_irq_line,
74 .valid.min_access_size = 1,
75 .valid.max_access_size = 1,
76 .endianness = DEVICE_LITTLE_ENDIAN,
79 static void test_ioport_write(void *opaque, hwaddr addr, uint64_t data,
80 unsigned len)
82 PCTestdev *dev = opaque;
83 dev->ioport_data = data;
86 static uint64_t test_ioport_read(void *opaque, hwaddr addr, unsigned len)
88 PCTestdev *dev = opaque;
89 return dev->ioport_data;
92 static const MemoryRegionOps test_ioport_ops = {
93 .read = test_ioport_read,
94 .write = test_ioport_write,
95 .endianness = DEVICE_LITTLE_ENDIAN,
98 static void test_flush_page(void *opaque, hwaddr addr, uint64_t data,
99 unsigned len)
101 hwaddr page = 4096;
102 void *a = cpu_physical_memory_map(data & ~0xffful, &page, 0);
104 /* We might not be able to get the full page, only mprotect what we actually
105 have mapped */
106 #if defined(CONFIG_POSIX)
107 mprotect(a, page, PROT_NONE);
108 mprotect(a, page, PROT_READ|PROT_WRITE);
109 #endif
110 cpu_physical_memory_unmap(a, page, 0, 0);
113 static const MemoryRegionOps test_flush_ops = {
114 .write = test_flush_page,
115 .valid.min_access_size = 4,
116 .valid.max_access_size = 4,
117 .endianness = DEVICE_LITTLE_ENDIAN,
120 static uint64_t test_iomem_read(void *opaque, hwaddr addr, unsigned len)
122 PCTestdev *dev = opaque;
123 uint64_t ret = 0;
124 memcpy(&ret, &dev->iomem_buf[addr], len);
125 ret = le64_to_cpu(ret);
127 return ret;
130 static void test_iomem_write(void *opaque, hwaddr addr, uint64_t val,
131 unsigned len)
133 PCTestdev *dev = opaque;
134 val = cpu_to_le64(val);
135 memcpy(&dev->iomem_buf[addr], &val, len);
136 dev->iomem_buf[addr] = val;
139 static const MemoryRegionOps test_iomem_ops = {
140 .read = test_iomem_read,
141 .write = test_iomem_write,
142 .endianness = DEVICE_LITTLE_ENDIAN,
145 static int init_test_device(ISADevice *isa)
147 PCTestdev *dev = TESTDEV(isa);
148 MemoryRegion *mem = isa_address_space(isa);
149 MemoryRegion *io = isa_address_space_io(isa);
151 memory_region_init_io(&dev->ioport, &test_ioport_ops, dev,
152 "pc-testdev-ioport", 4);
153 memory_region_init_io(&dev->flush, &test_flush_ops, dev,
154 "pc-testdev-flush-page", 4);
155 memory_region_init_io(&dev->irq, &test_irq_ops, dev,
156 "pc-testdev-irq-line", 24);
157 memory_region_init_io(&dev->iomem, &test_iomem_ops, dev,
158 "pc-testdev-iomem", IOMEM_LEN);
160 memory_region_add_subregion(io, 0xe0, &dev->ioport);
161 memory_region_add_subregion(io, 0xe4, &dev->flush);
162 memory_region_add_subregion(io, 0x2000, &dev->irq);
163 memory_region_add_subregion(mem, 0xff000000, &dev->iomem);
165 return 0;
168 static void testdev_class_init(ObjectClass *klass, void *data)
170 ISADeviceClass *k = ISA_DEVICE_CLASS(klass);
172 k->init = init_test_device;
175 static const TypeInfo testdev_info = {
176 .name = TYPE_TESTDEV,
177 .parent = TYPE_ISA_DEVICE,
178 .instance_size = sizeof(PCTestdev),
179 .class_init = testdev_class_init,
182 static void testdev_register_types(void)
184 type_register_static(&testdev_info);
187 type_init(testdev_register_types)