1 /* General "disassemble this chunk" code. Used for debugging. */
8 #include "disas/disas.h"
10 typedef struct CPUDebug
{
11 struct disassemble_info info
;
15 /* Filled in by elfload.c. Simplistic, but will do for now. */
16 struct syminfo
*syminfos
= NULL
;
18 /* Get LENGTH bytes from info's buffer, at target address memaddr.
19 Transfer them to myaddr. */
21 buffer_read_memory(bfd_vma memaddr
, bfd_byte
*myaddr
, int length
,
22 struct disassemble_info
*info
)
24 if (memaddr
< info
->buffer_vma
25 || memaddr
+ length
> info
->buffer_vma
+ info
->buffer_length
)
26 /* Out of bounds. Use EIO because GDB uses it. */
28 memcpy (myaddr
, info
->buffer
+ (memaddr
- info
->buffer_vma
), length
);
32 /* Get LENGTH bytes from info's buffer, at target address memaddr.
33 Transfer them to myaddr. */
35 target_read_memory (bfd_vma memaddr
,
38 struct disassemble_info
*info
)
40 CPUDebug
*s
= container_of(info
, CPUDebug
, info
);
42 cpu_memory_rw_debug(ENV_GET_CPU(s
->env
), memaddr
, myaddr
, length
, 0);
46 /* Print an error message. We can assume that this is in response to
47 an error return from buffer_read_memory. */
49 perror_memory (int status
, bfd_vma memaddr
, struct disassemble_info
*info
)
53 (*info
->fprintf_func
) (info
->stream
, "Unknown error %d\n", status
);
55 /* Actually, address between memaddr and memaddr + len was
57 (*info
->fprintf_func
) (info
->stream
,
58 "Address 0x%" PRIx64
" is out of bounds.\n", memaddr
);
61 /* This could be in a separate file, to save minuscule amounts of space
62 in statically linked executables. */
64 /* Just print the address is hex. This is included for completeness even
65 though both GDB and objdump provide their own (to print symbolic
69 generic_print_address (bfd_vma addr
, struct disassemble_info
*info
)
71 (*info
->fprintf_func
) (info
->stream
, "0x%" PRIx64
, addr
);
74 /* Print address in hex, truncated to the width of a target virtual address. */
76 generic_print_target_address(bfd_vma addr
, struct disassemble_info
*info
)
78 uint64_t mask
= ~0ULL >> (64 - TARGET_VIRT_ADDR_SPACE_BITS
);
79 generic_print_address(addr
& mask
, info
);
82 /* Print address in hex, truncated to the width of a host virtual address. */
84 generic_print_host_address(bfd_vma addr
, struct disassemble_info
*info
)
86 uint64_t mask
= ~0ULL >> (64 - (sizeof(void *) * 8));
87 generic_print_address(addr
& mask
, info
);
90 /* Just return the given address. */
93 generic_symbol_at_address (bfd_vma addr
, struct disassemble_info
*info
)
98 bfd_vma
bfd_getl64 (const bfd_byte
*addr
)
100 unsigned long long v
;
102 v
= (unsigned long long) addr
[0];
103 v
|= (unsigned long long) addr
[1] << 8;
104 v
|= (unsigned long long) addr
[2] << 16;
105 v
|= (unsigned long long) addr
[3] << 24;
106 v
|= (unsigned long long) addr
[4] << 32;
107 v
|= (unsigned long long) addr
[5] << 40;
108 v
|= (unsigned long long) addr
[6] << 48;
109 v
|= (unsigned long long) addr
[7] << 56;
113 bfd_vma
bfd_getl32 (const bfd_byte
*addr
)
117 v
= (unsigned long) addr
[0];
118 v
|= (unsigned long) addr
[1] << 8;
119 v
|= (unsigned long) addr
[2] << 16;
120 v
|= (unsigned long) addr
[3] << 24;
124 bfd_vma
bfd_getb32 (const bfd_byte
*addr
)
128 v
= (unsigned long) addr
[0] << 24;
129 v
|= (unsigned long) addr
[1] << 16;
130 v
|= (unsigned long) addr
[2] << 8;
131 v
|= (unsigned long) addr
[3];
135 bfd_vma
bfd_getl16 (const bfd_byte
*addr
)
139 v
= (unsigned long) addr
[0];
140 v
|= (unsigned long) addr
[1] << 8;
144 bfd_vma
bfd_getb16 (const bfd_byte
*addr
)
148 v
= (unsigned long) addr
[0] << 24;
149 v
|= (unsigned long) addr
[1] << 16;
155 print_insn_thumb1(bfd_vma pc
, disassemble_info
*info
)
157 return print_insn_arm(pc
| 1, info
);
161 /* Disassemble this for me please... (debugging). 'flags' has the following
163 i386 - 1 means 16 bit code, 2 means 64 bit code
164 arm - bit 0 = thumb, bit 1 = reverse endian
165 ppc - nonzero means little endian
166 other targets - unused
168 void target_disas(FILE *out
, CPUArchState
*env
, target_ulong code
,
169 target_ulong size
, int flags
)
174 int (*print_insn
)(bfd_vma pc
, disassemble_info
*info
);
176 INIT_DISASSEMBLE_INFO(s
.info
, out
, fprintf
);
179 s
.info
.read_memory_func
= target_read_memory
;
180 s
.info
.buffer_vma
= code
;
181 s
.info
.buffer_length
= size
;
182 s
.info
.print_address_func
= generic_print_target_address
;
184 #ifdef TARGET_WORDS_BIGENDIAN
185 s
.info
.endian
= BFD_ENDIAN_BIG
;
187 s
.info
.endian
= BFD_ENDIAN_LITTLE
;
189 #if defined(TARGET_I386)
191 s
.info
.mach
= bfd_mach_x86_64
;
192 } else if (flags
== 1) {
193 s
.info
.mach
= bfd_mach_i386_i8086
;
195 s
.info
.mach
= bfd_mach_i386_i386
;
197 print_insn
= print_insn_i386
;
198 #elif defined(TARGET_ARM)
200 print_insn
= print_insn_thumb1
;
202 print_insn
= print_insn_arm
;
205 #ifdef TARGET_WORDS_BIGENDIAN
206 s
.info
.endian
= BFD_ENDIAN_LITTLE
;
208 s
.info
.endian
= BFD_ENDIAN_BIG
;
211 #elif defined(TARGET_SPARC)
212 print_insn
= print_insn_sparc
;
213 #ifdef TARGET_SPARC64
214 s
.info
.mach
= bfd_mach_sparc_v9b
;
216 #elif defined(TARGET_PPC)
218 s
.info
.endian
= BFD_ENDIAN_LITTLE
;
220 if (flags
& 0xFFFF) {
221 /* If we have a precise definitions of the instructions set, use it */
222 s
.info
.mach
= flags
& 0xFFFF;
225 s
.info
.mach
= bfd_mach_ppc64
;
227 s
.info
.mach
= bfd_mach_ppc
;
230 s
.info
.disassembler_options
= (char *)"any";
231 print_insn
= print_insn_ppc
;
232 #elif defined(TARGET_M68K)
233 print_insn
= print_insn_m68k
;
234 #elif defined(TARGET_MIPS)
235 #ifdef TARGET_WORDS_BIGENDIAN
236 print_insn
= print_insn_big_mips
;
238 print_insn
= print_insn_little_mips
;
240 #elif defined(TARGET_SH4)
241 s
.info
.mach
= bfd_mach_sh4
;
242 print_insn
= print_insn_sh
;
243 #elif defined(TARGET_ALPHA)
244 s
.info
.mach
= bfd_mach_alpha_ev6
;
245 print_insn
= print_insn_alpha
;
246 #elif defined(TARGET_CRIS)
248 s
.info
.mach
= bfd_mach_cris_v0_v10
;
249 print_insn
= print_insn_crisv10
;
251 s
.info
.mach
= bfd_mach_cris_v32
;
252 print_insn
= print_insn_crisv32
;
254 #elif defined(TARGET_S390X)
255 s
.info
.mach
= bfd_mach_s390_64
;
256 print_insn
= print_insn_s390
;
257 #elif defined(TARGET_MICROBLAZE)
258 s
.info
.mach
= bfd_arch_microblaze
;
259 print_insn
= print_insn_microblaze
;
260 #elif defined(TARGET_MOXIE)
261 s
.info
.mach
= bfd_arch_moxie
;
262 print_insn
= print_insn_moxie
;
263 #elif defined(TARGET_LM32)
264 s
.info
.mach
= bfd_mach_lm32
;
265 print_insn
= print_insn_lm32
;
267 fprintf(out
, "0x" TARGET_FMT_lx
268 ": Asm output not supported on this arch\n", code
);
272 for (pc
= code
; size
> 0; pc
+= count
, size
-= count
) {
273 fprintf(out
, "0x" TARGET_FMT_lx
": ", pc
);
274 count
= print_insn(pc
, &s
.info
);
280 for(i
= 0; i
< count
; i
++) {
281 target_read_memory(pc
+ i
, &b
, 1, &s
.info
);
282 fprintf(out
, " %02x", b
);
292 "Disassembler disagrees with translator over instruction "
294 "Please report this to qemu-devel@nongnu.org\n");
300 /* Disassemble this for me please... (debugging). */
301 void disas(FILE *out
, void *code
, unsigned long size
)
306 int (*print_insn
)(bfd_vma pc
, disassemble_info
*info
);
308 INIT_DISASSEMBLE_INFO(s
.info
, out
, fprintf
);
309 s
.info
.print_address_func
= generic_print_host_address
;
311 s
.info
.buffer
= code
;
312 s
.info
.buffer_vma
= (uintptr_t)code
;
313 s
.info
.buffer_length
= size
;
315 #ifdef HOST_WORDS_BIGENDIAN
316 s
.info
.endian
= BFD_ENDIAN_BIG
;
318 s
.info
.endian
= BFD_ENDIAN_LITTLE
;
320 #if defined(CONFIG_TCG_INTERPRETER)
321 print_insn
= print_insn_tci
;
322 #elif defined(__i386__)
323 s
.info
.mach
= bfd_mach_i386_i386
;
324 print_insn
= print_insn_i386
;
325 #elif defined(__x86_64__)
326 s
.info
.mach
= bfd_mach_x86_64
;
327 print_insn
= print_insn_i386
;
328 #elif defined(_ARCH_PPC)
329 s
.info
.disassembler_options
= (char *)"any";
330 print_insn
= print_insn_ppc
;
331 #elif defined(__alpha__)
332 print_insn
= print_insn_alpha
;
333 #elif defined(__sparc__)
334 print_insn
= print_insn_sparc
;
335 s
.info
.mach
= bfd_mach_sparc_v9b
;
336 #elif defined(__arm__)
337 print_insn
= print_insn_arm
;
338 #elif defined(__MIPSEB__)
339 print_insn
= print_insn_big_mips
;
340 #elif defined(__MIPSEL__)
341 print_insn
= print_insn_little_mips
;
342 #elif defined(__m68k__)
343 print_insn
= print_insn_m68k
;
344 #elif defined(__s390__)
345 print_insn
= print_insn_s390
;
346 #elif defined(__hppa__)
347 print_insn
= print_insn_hppa
;
348 #elif defined(__ia64__)
349 print_insn
= print_insn_ia64
;
351 fprintf(out
, "0x%lx: Asm output not supported on this arch\n",
355 for (pc
= (uintptr_t)code
; size
> 0; pc
+= count
, size
-= count
) {
356 fprintf(out
, "0x%08" PRIxPTR
": ", pc
);
357 count
= print_insn(pc
, &s
.info
);
364 /* Look up symbol for debugging purpose. Returns "" if unknown. */
365 const char *lookup_symbol(target_ulong orig_addr
)
367 const char *symbol
= "";
370 for (s
= syminfos
; s
; s
= s
->next
) {
371 symbol
= s
->lookup_symbol(s
, orig_addr
);
372 if (symbol
[0] != '\0') {
380 #if !defined(CONFIG_USER_ONLY)
382 #include "monitor/monitor.h"
384 static int monitor_disas_is_physical
;
387 monitor_read_memory (bfd_vma memaddr
, bfd_byte
*myaddr
, int length
,
388 struct disassemble_info
*info
)
390 CPUDebug
*s
= container_of(info
, CPUDebug
, info
);
392 if (monitor_disas_is_physical
) {
393 cpu_physical_memory_read(memaddr
, myaddr
, length
);
395 cpu_memory_rw_debug(ENV_GET_CPU(s
->env
), memaddr
, myaddr
, length
, 0);
400 static int GCC_FMT_ATTR(2, 3)
401 monitor_fprintf(FILE *stream
, const char *fmt
, ...)
405 monitor_vprintf((Monitor
*)stream
, fmt
, ap
);
410 void monitor_disas(Monitor
*mon
, CPUArchState
*env
,
411 target_ulong pc
, int nb_insn
, int is_physical
, int flags
)
415 int (*print_insn
)(bfd_vma pc
, disassemble_info
*info
);
417 INIT_DISASSEMBLE_INFO(s
.info
, (FILE *)mon
, monitor_fprintf
);
420 monitor_disas_is_physical
= is_physical
;
421 s
.info
.read_memory_func
= monitor_read_memory
;
422 s
.info
.print_address_func
= generic_print_target_address
;
424 s
.info
.buffer_vma
= pc
;
426 #ifdef TARGET_WORDS_BIGENDIAN
427 s
.info
.endian
= BFD_ENDIAN_BIG
;
429 s
.info
.endian
= BFD_ENDIAN_LITTLE
;
431 #if defined(TARGET_I386)
433 s
.info
.mach
= bfd_mach_x86_64
;
434 } else if (flags
== 1) {
435 s
.info
.mach
= bfd_mach_i386_i8086
;
437 s
.info
.mach
= bfd_mach_i386_i386
;
439 print_insn
= print_insn_i386
;
440 #elif defined(TARGET_ARM)
441 print_insn
= print_insn_arm
;
442 #elif defined(TARGET_ALPHA)
443 print_insn
= print_insn_alpha
;
444 #elif defined(TARGET_SPARC)
445 print_insn
= print_insn_sparc
;
446 #ifdef TARGET_SPARC64
447 s
.info
.mach
= bfd_mach_sparc_v9b
;
449 #elif defined(TARGET_PPC)
451 s
.info
.mach
= bfd_mach_ppc64
;
453 s
.info
.mach
= bfd_mach_ppc
;
455 print_insn
= print_insn_ppc
;
456 #elif defined(TARGET_M68K)
457 print_insn
= print_insn_m68k
;
458 #elif defined(TARGET_MIPS)
459 #ifdef TARGET_WORDS_BIGENDIAN
460 print_insn
= print_insn_big_mips
;
462 print_insn
= print_insn_little_mips
;
464 #elif defined(TARGET_SH4)
465 s
.info
.mach
= bfd_mach_sh4
;
466 print_insn
= print_insn_sh
;
467 #elif defined(TARGET_S390X)
468 s
.info
.mach
= bfd_mach_s390_64
;
469 print_insn
= print_insn_s390
;
470 #elif defined(TARGET_MOXIE)
471 s
.info
.mach
= bfd_arch_moxie
;
472 print_insn
= print_insn_moxie
;
473 #elif defined(TARGET_LM32)
474 s
.info
.mach
= bfd_mach_lm32
;
475 print_insn
= print_insn_lm32
;
477 monitor_printf(mon
, "0x" TARGET_FMT_lx
478 ": Asm output not supported on this arch\n", pc
);
482 for(i
= 0; i
< nb_insn
; i
++) {
483 monitor_printf(mon
, "0x" TARGET_FMT_lx
": ", pc
);
484 count
= print_insn(pc
, &s
.info
);
485 monitor_printf(mon
, "\n");