Merge tag 'pull-la-20220704' of https://gitlab.com/rth7680/qemu into staging
[qemu/rayw.git] / hw / core / machine.c
bloba673302ccec58ada93cece0cb3c7b912fbc09447
1 /*
2 * QEMU Machine
4 * Copyright (C) 2014 Red Hat Inc
6 * Authors:
7 * Marcel Apfelbaum <marcel.a@redhat.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
13 #include "qemu/osdep.h"
14 #include "qemu/option.h"
15 #include "qapi/qmp/qerror.h"
16 #include "sysemu/replay.h"
17 #include "qemu/units.h"
18 #include "hw/boards.h"
19 #include "hw/loader.h"
20 #include "qapi/error.h"
21 #include "qapi/qapi-visit-common.h"
22 #include "qapi/qapi-visit-machine.h"
23 #include "qapi/visitor.h"
24 #include "qom/object_interfaces.h"
25 #include "hw/sysbus.h"
26 #include "sysemu/cpus.h"
27 #include "sysemu/sysemu.h"
28 #include "sysemu/reset.h"
29 #include "sysemu/runstate.h"
30 #include "sysemu/numa.h"
31 #include "sysemu/xen.h"
32 #include "qemu/error-report.h"
33 #include "sysemu/qtest.h"
34 #include "hw/pci/pci.h"
35 #include "hw/mem/nvdimm.h"
36 #include "migration/global_state.h"
37 #include "migration/vmstate.h"
38 #include "exec/confidential-guest-support.h"
39 #include "hw/virtio/virtio.h"
40 #include "hw/virtio/virtio-pci.h"
41 #include "qom/object_interfaces.h"
43 GlobalProperty hw_compat_7_0[] = {
44 { "arm-gicv3-common", "force-8-bit-prio", "on" },
45 { "nvme-ns", "eui64-default", "on"},
47 const size_t hw_compat_7_0_len = G_N_ELEMENTS(hw_compat_7_0);
49 GlobalProperty hw_compat_6_2[] = {
50 { "PIIX4_PM", "x-not-migrate-acpi-index", "on"},
52 const size_t hw_compat_6_2_len = G_N_ELEMENTS(hw_compat_6_2);
54 GlobalProperty hw_compat_6_1[] = {
55 { "vhost-user-vsock-device", "seqpacket", "off" },
56 { "nvme-ns", "shared", "off" },
58 const size_t hw_compat_6_1_len = G_N_ELEMENTS(hw_compat_6_1);
60 GlobalProperty hw_compat_6_0[] = {
61 { "gpex-pcihost", "allow-unmapped-accesses", "false" },
62 { "i8042", "extended-state", "false"},
63 { "nvme-ns", "eui64-default", "off"},
64 { "e1000", "init-vet", "off" },
65 { "e1000e", "init-vet", "off" },
66 { "vhost-vsock-device", "seqpacket", "off" },
68 const size_t hw_compat_6_0_len = G_N_ELEMENTS(hw_compat_6_0);
70 GlobalProperty hw_compat_5_2[] = {
71 { "ICH9-LPC", "smm-compat", "on"},
72 { "PIIX4_PM", "smm-compat", "on"},
73 { "virtio-blk-device", "report-discard-granularity", "off" },
74 { "virtio-net-pci-base", "vectors", "3"},
76 const size_t hw_compat_5_2_len = G_N_ELEMENTS(hw_compat_5_2);
78 GlobalProperty hw_compat_5_1[] = {
79 { "vhost-scsi", "num_queues", "1"},
80 { "vhost-user-blk", "num-queues", "1"},
81 { "vhost-user-scsi", "num_queues", "1"},
82 { "virtio-blk-device", "num-queues", "1"},
83 { "virtio-scsi-device", "num_queues", "1"},
84 { "nvme", "use-intel-id", "on"},
85 { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */
86 { "pl011", "migrate-clk", "off" },
87 { "virtio-pci", "x-ats-page-aligned", "off"},
89 const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1);
91 GlobalProperty hw_compat_5_0[] = {
92 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" },
93 { "virtio-balloon-device", "page-poison", "false" },
94 { "vmport", "x-read-set-eax", "off" },
95 { "vmport", "x-signal-unsupported-cmd", "off" },
96 { "vmport", "x-report-vmx-type", "off" },
97 { "vmport", "x-cmds-v2", "off" },
98 { "virtio-device", "x-disable-legacy-check", "true" },
100 const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0);
102 GlobalProperty hw_compat_4_2[] = {
103 { "virtio-blk-device", "queue-size", "128"},
104 { "virtio-scsi-device", "virtqueue_size", "128"},
105 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" },
106 { "virtio-blk-device", "seg-max-adjust", "off"},
107 { "virtio-scsi-device", "seg_max_adjust", "off"},
108 { "vhost-blk-device", "seg_max_adjust", "off"},
109 { "usb-host", "suppress-remote-wake", "off" },
110 { "usb-redir", "suppress-remote-wake", "off" },
111 { "qxl", "revision", "4" },
112 { "qxl-vga", "revision", "4" },
113 { "fw_cfg", "acpi-mr-restore", "false" },
114 { "virtio-device", "use-disabled-flag", "false" },
116 const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2);
118 GlobalProperty hw_compat_4_1[] = {
119 { "virtio-pci", "x-pcie-flr-init", "off" },
121 const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1);
123 GlobalProperty hw_compat_4_0[] = {
124 { "VGA", "edid", "false" },
125 { "secondary-vga", "edid", "false" },
126 { "bochs-display", "edid", "false" },
127 { "virtio-vga", "edid", "false" },
128 { "virtio-gpu-device", "edid", "false" },
129 { "virtio-device", "use-started", "false" },
130 { "virtio-balloon-device", "qemu-4-0-config-size", "true" },
131 { "pl031", "migrate-tick-offset", "false" },
133 const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0);
135 GlobalProperty hw_compat_3_1[] = {
136 { "pcie-root-port", "x-speed", "2_5" },
137 { "pcie-root-port", "x-width", "1" },
138 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
139 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
140 { "tpm-crb", "ppi", "false" },
141 { "tpm-tis", "ppi", "false" },
142 { "usb-kbd", "serial", "42" },
143 { "usb-mouse", "serial", "42" },
144 { "usb-tablet", "serial", "42" },
145 { "virtio-blk-device", "discard", "false" },
146 { "virtio-blk-device", "write-zeroes", "false" },
147 { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
148 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
150 const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1);
152 GlobalProperty hw_compat_3_0[] = {};
153 const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0);
155 GlobalProperty hw_compat_2_12[] = {
156 { "migration", "decompress-error-check", "off" },
157 { "hda-audio", "use-timer", "false" },
158 { "cirrus-vga", "global-vmstate", "true" },
159 { "VGA", "global-vmstate", "true" },
160 { "vmware-svga", "global-vmstate", "true" },
161 { "qxl-vga", "global-vmstate", "true" },
163 const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12);
165 GlobalProperty hw_compat_2_11[] = {
166 { "hpet", "hpet-offset-saved", "false" },
167 { "virtio-blk-pci", "vectors", "2" },
168 { "vhost-user-blk-pci", "vectors", "2" },
169 { "e1000", "migrate_tso_props", "off" },
171 const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11);
173 GlobalProperty hw_compat_2_10[] = {
174 { "virtio-mouse-device", "wheel-axis", "false" },
175 { "virtio-tablet-device", "wheel-axis", "false" },
177 const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10);
179 GlobalProperty hw_compat_2_9[] = {
180 { "pci-bridge", "shpc", "off" },
181 { "intel-iommu", "pt", "off" },
182 { "virtio-net-device", "x-mtu-bypass-backend", "off" },
183 { "pcie-root-port", "x-migrate-msix", "false" },
185 const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9);
187 GlobalProperty hw_compat_2_8[] = {
188 { "fw_cfg_mem", "x-file-slots", "0x10" },
189 { "fw_cfg_io", "x-file-slots", "0x10" },
190 { "pflash_cfi01", "old-multiple-chip-handling", "on" },
191 { "pci-bridge", "shpc", "on" },
192 { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" },
193 { "virtio-pci", "x-pcie-deverr-init", "off" },
194 { "virtio-pci", "x-pcie-lnkctl-init", "off" },
195 { "virtio-pci", "x-pcie-pm-init", "off" },
196 { "cirrus-vga", "vgamem_mb", "8" },
197 { "isa-cirrus-vga", "vgamem_mb", "8" },
199 const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8);
201 GlobalProperty hw_compat_2_7[] = {
202 { "virtio-pci", "page-per-vq", "on" },
203 { "virtio-serial-device", "emergency-write", "off" },
204 { "ioapic", "version", "0x11" },
205 { "intel-iommu", "x-buggy-eim", "true" },
206 { "virtio-pci", "x-ignore-backend-features", "on" },
208 const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7);
210 GlobalProperty hw_compat_2_6[] = {
211 { "virtio-mmio", "format_transport_address", "off" },
212 /* Optional because not all virtio-pci devices support legacy mode */
213 { "virtio-pci", "disable-modern", "on", .optional = true },
214 { "virtio-pci", "disable-legacy", "off", .optional = true },
216 const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6);
218 GlobalProperty hw_compat_2_5[] = {
219 { "isa-fdc", "fallback", "144" },
220 { "pvscsi", "x-old-pci-configuration", "on" },
221 { "pvscsi", "x-disable-pcie", "on" },
222 { "vmxnet3", "x-old-msi-offsets", "on" },
223 { "vmxnet3", "x-disable-pcie", "on" },
225 const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5);
227 GlobalProperty hw_compat_2_4[] = {
228 /* Optional because the 'scsi' property is Linux-only */
229 { "virtio-blk-device", "scsi", "true", .optional = true },
230 { "e1000", "extra_mac_registers", "off" },
231 { "virtio-pci", "x-disable-pcie", "on" },
232 { "virtio-pci", "migrate-extra", "off" },
233 { "fw_cfg_mem", "dma_enabled", "off" },
234 { "fw_cfg_io", "dma_enabled", "off" }
236 const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4);
238 GlobalProperty hw_compat_2_3[] = {
239 { "virtio-blk-pci", "any_layout", "off" },
240 { "virtio-balloon-pci", "any_layout", "off" },
241 { "virtio-serial-pci", "any_layout", "off" },
242 { "virtio-9p-pci", "any_layout", "off" },
243 { "virtio-rng-pci", "any_layout", "off" },
244 { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" },
245 { "migration", "send-configuration", "off" },
246 { "migration", "send-section-footer", "off" },
247 { "migration", "store-global-state", "off" },
249 const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3);
251 GlobalProperty hw_compat_2_2[] = {};
252 const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2);
254 GlobalProperty hw_compat_2_1[] = {
255 { "intel-hda", "old_msi_addr", "on" },
256 { "VGA", "qemu-extended-regs", "off" },
257 { "secondary-vga", "qemu-extended-regs", "off" },
258 { "virtio-scsi-pci", "any_layout", "off" },
259 { "usb-mouse", "usb_version", "1" },
260 { "usb-kbd", "usb_version", "1" },
261 { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
263 const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1);
265 MachineState *current_machine;
267 static char *machine_get_kernel(Object *obj, Error **errp)
269 MachineState *ms = MACHINE(obj);
271 return g_strdup(ms->kernel_filename);
274 static void machine_set_kernel(Object *obj, const char *value, Error **errp)
276 MachineState *ms = MACHINE(obj);
278 g_free(ms->kernel_filename);
279 ms->kernel_filename = g_strdup(value);
282 static char *machine_get_initrd(Object *obj, Error **errp)
284 MachineState *ms = MACHINE(obj);
286 return g_strdup(ms->initrd_filename);
289 static void machine_set_initrd(Object *obj, const char *value, Error **errp)
291 MachineState *ms = MACHINE(obj);
293 g_free(ms->initrd_filename);
294 ms->initrd_filename = g_strdup(value);
297 static char *machine_get_append(Object *obj, Error **errp)
299 MachineState *ms = MACHINE(obj);
301 return g_strdup(ms->kernel_cmdline);
304 static void machine_set_append(Object *obj, const char *value, Error **errp)
306 MachineState *ms = MACHINE(obj);
308 g_free(ms->kernel_cmdline);
309 ms->kernel_cmdline = g_strdup(value);
312 static char *machine_get_dtb(Object *obj, Error **errp)
314 MachineState *ms = MACHINE(obj);
316 return g_strdup(ms->dtb);
319 static void machine_set_dtb(Object *obj, const char *value, Error **errp)
321 MachineState *ms = MACHINE(obj);
323 g_free(ms->dtb);
324 ms->dtb = g_strdup(value);
327 static char *machine_get_dumpdtb(Object *obj, Error **errp)
329 MachineState *ms = MACHINE(obj);
331 return g_strdup(ms->dumpdtb);
334 static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp)
336 MachineState *ms = MACHINE(obj);
338 g_free(ms->dumpdtb);
339 ms->dumpdtb = g_strdup(value);
342 static void machine_get_phandle_start(Object *obj, Visitor *v,
343 const char *name, void *opaque,
344 Error **errp)
346 MachineState *ms = MACHINE(obj);
347 int64_t value = ms->phandle_start;
349 visit_type_int(v, name, &value, errp);
352 static void machine_set_phandle_start(Object *obj, Visitor *v,
353 const char *name, void *opaque,
354 Error **errp)
356 MachineState *ms = MACHINE(obj);
357 int64_t value;
359 if (!visit_type_int(v, name, &value, errp)) {
360 return;
363 ms->phandle_start = value;
366 static char *machine_get_dt_compatible(Object *obj, Error **errp)
368 MachineState *ms = MACHINE(obj);
370 return g_strdup(ms->dt_compatible);
373 static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp)
375 MachineState *ms = MACHINE(obj);
377 g_free(ms->dt_compatible);
378 ms->dt_compatible = g_strdup(value);
381 static bool machine_get_dump_guest_core(Object *obj, Error **errp)
383 MachineState *ms = MACHINE(obj);
385 return ms->dump_guest_core;
388 static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp)
390 MachineState *ms = MACHINE(obj);
392 ms->dump_guest_core = value;
395 static bool machine_get_mem_merge(Object *obj, Error **errp)
397 MachineState *ms = MACHINE(obj);
399 return ms->mem_merge;
402 static void machine_set_mem_merge(Object *obj, bool value, Error **errp)
404 MachineState *ms = MACHINE(obj);
406 ms->mem_merge = value;
409 static bool machine_get_usb(Object *obj, Error **errp)
411 MachineState *ms = MACHINE(obj);
413 return ms->usb;
416 static void machine_set_usb(Object *obj, bool value, Error **errp)
418 MachineState *ms = MACHINE(obj);
420 ms->usb = value;
421 ms->usb_disabled = !value;
424 static bool machine_get_graphics(Object *obj, Error **errp)
426 MachineState *ms = MACHINE(obj);
428 return ms->enable_graphics;
431 static void machine_set_graphics(Object *obj, bool value, Error **errp)
433 MachineState *ms = MACHINE(obj);
435 ms->enable_graphics = value;
438 static char *machine_get_firmware(Object *obj, Error **errp)
440 MachineState *ms = MACHINE(obj);
442 return g_strdup(ms->firmware);
445 static void machine_set_firmware(Object *obj, const char *value, Error **errp)
447 MachineState *ms = MACHINE(obj);
449 g_free(ms->firmware);
450 ms->firmware = g_strdup(value);
453 static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp)
455 MachineState *ms = MACHINE(obj);
457 ms->suppress_vmdesc = value;
460 static bool machine_get_suppress_vmdesc(Object *obj, Error **errp)
462 MachineState *ms = MACHINE(obj);
464 return ms->suppress_vmdesc;
467 static char *machine_get_memory_encryption(Object *obj, Error **errp)
469 MachineState *ms = MACHINE(obj);
471 if (ms->cgs) {
472 return g_strdup(object_get_canonical_path_component(OBJECT(ms->cgs)));
475 return NULL;
478 static void machine_set_memory_encryption(Object *obj, const char *value,
479 Error **errp)
481 Object *cgs =
482 object_resolve_path_component(object_get_objects_root(), value);
484 if (!cgs) {
485 error_setg(errp, "No such memory encryption object '%s'", value);
486 return;
489 object_property_set_link(obj, "confidential-guest-support", cgs, errp);
492 static void machine_check_confidential_guest_support(const Object *obj,
493 const char *name,
494 Object *new_target,
495 Error **errp)
498 * So far the only constraint is that the target has the
499 * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked
500 * by the QOM core
504 static bool machine_get_nvdimm(Object *obj, Error **errp)
506 MachineState *ms = MACHINE(obj);
508 return ms->nvdimms_state->is_enabled;
511 static void machine_set_nvdimm(Object *obj, bool value, Error **errp)
513 MachineState *ms = MACHINE(obj);
515 ms->nvdimms_state->is_enabled = value;
518 static bool machine_get_hmat(Object *obj, Error **errp)
520 MachineState *ms = MACHINE(obj);
522 return ms->numa_state->hmat_enabled;
525 static void machine_set_hmat(Object *obj, bool value, Error **errp)
527 MachineState *ms = MACHINE(obj);
529 ms->numa_state->hmat_enabled = value;
532 static void machine_get_mem(Object *obj, Visitor *v, const char *name,
533 void *opaque, Error **errp)
535 MachineState *ms = MACHINE(obj);
536 MemorySizeConfiguration mem = {
537 .has_size = true,
538 .size = ms->ram_size,
539 .has_max_size = !!ms->ram_slots,
540 .max_size = ms->maxram_size,
541 .has_slots = !!ms->ram_slots,
542 .slots = ms->ram_slots,
544 MemorySizeConfiguration *p_mem = &mem;
546 visit_type_MemorySizeConfiguration(v, name, &p_mem, &error_abort);
549 static void machine_set_mem(Object *obj, Visitor *v, const char *name,
550 void *opaque, Error **errp)
552 MachineState *ms = MACHINE(obj);
553 MachineClass *mc = MACHINE_GET_CLASS(obj);
554 MemorySizeConfiguration *mem;
556 ERRP_GUARD();
558 if (!visit_type_MemorySizeConfiguration(v, name, &mem, errp)) {
559 return;
562 if (!mem->has_size) {
563 mem->has_size = true;
564 mem->size = mc->default_ram_size;
566 mem->size = QEMU_ALIGN_UP(mem->size, 8192);
567 if (mc->fixup_ram_size) {
568 mem->size = mc->fixup_ram_size(mem->size);
570 if ((ram_addr_t)mem->size != mem->size) {
571 error_setg(errp, "ram size too large");
572 goto out_free;
575 if (mem->has_max_size) {
576 if (mem->max_size < mem->size) {
577 error_setg(errp, "invalid value of maxmem: "
578 "maximum memory size (0x%" PRIx64 ") must be at least "
579 "the initial memory size (0x%" PRIx64 ")",
580 mem->max_size, mem->size);
581 goto out_free;
583 if (mem->has_slots && mem->slots && mem->max_size == mem->size) {
584 error_setg(errp, "invalid value of maxmem: "
585 "memory slots were specified but maximum memory size "
586 "(0x%" PRIx64 ") is equal to the initial memory size "
587 "(0x%" PRIx64 ")", mem->max_size, mem->size);
588 goto out_free;
590 ms->maxram_size = mem->max_size;
591 } else {
592 if (mem->has_slots) {
593 error_setg(errp, "slots specified but no max-size");
594 goto out_free;
596 ms->maxram_size = mem->size;
598 ms->ram_size = mem->size;
599 ms->ram_slots = mem->has_slots ? mem->slots : 0;
600 out_free:
601 qapi_free_MemorySizeConfiguration(mem);
604 static char *machine_get_nvdimm_persistence(Object *obj, Error **errp)
606 MachineState *ms = MACHINE(obj);
608 return g_strdup(ms->nvdimms_state->persistence_string);
611 static void machine_set_nvdimm_persistence(Object *obj, const char *value,
612 Error **errp)
614 MachineState *ms = MACHINE(obj);
615 NVDIMMState *nvdimms_state = ms->nvdimms_state;
617 if (strcmp(value, "cpu") == 0) {
618 nvdimms_state->persistence = 3;
619 } else if (strcmp(value, "mem-ctrl") == 0) {
620 nvdimms_state->persistence = 2;
621 } else {
622 error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option",
623 value);
624 return;
627 g_free(nvdimms_state->persistence_string);
628 nvdimms_state->persistence_string = g_strdup(value);
631 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type)
633 QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type));
636 bool device_is_dynamic_sysbus(MachineClass *mc, DeviceState *dev)
638 Object *obj = OBJECT(dev);
640 if (!object_dynamic_cast(obj, TYPE_SYS_BUS_DEVICE)) {
641 return false;
644 return device_type_is_dynamic_sysbus(mc, object_get_typename(obj));
647 bool device_type_is_dynamic_sysbus(MachineClass *mc, const char *type)
649 bool allowed = false;
650 strList *wl;
651 ObjectClass *klass = object_class_by_name(type);
653 for (wl = mc->allowed_dynamic_sysbus_devices;
654 !allowed && wl;
655 wl = wl->next) {
656 allowed |= !!object_class_dynamic_cast(klass, wl->value);
659 return allowed;
662 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine)
664 int i;
665 HotpluggableCPUList *head = NULL;
666 MachineClass *mc = MACHINE_GET_CLASS(machine);
668 /* force board to initialize possible_cpus if it hasn't been done yet */
669 mc->possible_cpu_arch_ids(machine);
671 for (i = 0; i < machine->possible_cpus->len; i++) {
672 Object *cpu;
673 HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1);
675 cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type);
676 cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count;
677 cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props,
678 sizeof(*cpu_item->props));
680 cpu = machine->possible_cpus->cpus[i].cpu;
681 if (cpu) {
682 cpu_item->has_qom_path = true;
683 cpu_item->qom_path = object_get_canonical_path(cpu);
685 QAPI_LIST_PREPEND(head, cpu_item);
687 return head;
691 * machine_set_cpu_numa_node:
692 * @machine: machine object to modify
693 * @props: specifies which cpu objects to assign to
694 * numa node specified by @props.node_id
695 * @errp: if an error occurs, a pointer to an area to store the error
697 * Associate NUMA node specified by @props.node_id with cpu slots that
698 * match socket/core/thread-ids specified by @props. It's recommended to use
699 * query-hotpluggable-cpus.props values to specify affected cpu slots,
700 * which would lead to exact 1:1 mapping of cpu slots to NUMA node.
702 * However for CLI convenience it's possible to pass in subset of properties,
703 * which would affect all cpu slots that match it.
704 * Ex for pc machine:
705 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
706 * -numa cpu,node-id=0,socket_id=0 \
707 * -numa cpu,node-id=1,socket_id=1
708 * will assign all child cores of socket 0 to node 0 and
709 * of socket 1 to node 1.
711 * On attempt of reassigning (already assigned) cpu slot to another NUMA node,
712 * return error.
713 * Empty subset is disallowed and function will return with error in this case.
715 void machine_set_cpu_numa_node(MachineState *machine,
716 const CpuInstanceProperties *props, Error **errp)
718 MachineClass *mc = MACHINE_GET_CLASS(machine);
719 NodeInfo *numa_info = machine->numa_state->nodes;
720 bool match = false;
721 int i;
723 if (!mc->possible_cpu_arch_ids) {
724 error_setg(errp, "mapping of CPUs to NUMA node is not supported");
725 return;
728 /* disabling node mapping is not supported, forbid it */
729 assert(props->has_node_id);
731 /* force board to initialize possible_cpus if it hasn't been done yet */
732 mc->possible_cpu_arch_ids(machine);
734 for (i = 0; i < machine->possible_cpus->len; i++) {
735 CPUArchId *slot = &machine->possible_cpus->cpus[i];
737 /* reject unsupported by board properties */
738 if (props->has_thread_id && !slot->props.has_thread_id) {
739 error_setg(errp, "thread-id is not supported");
740 return;
743 if (props->has_core_id && !slot->props.has_core_id) {
744 error_setg(errp, "core-id is not supported");
745 return;
748 if (props->has_cluster_id && !slot->props.has_cluster_id) {
749 error_setg(errp, "cluster-id is not supported");
750 return;
753 if (props->has_socket_id && !slot->props.has_socket_id) {
754 error_setg(errp, "socket-id is not supported");
755 return;
758 if (props->has_die_id && !slot->props.has_die_id) {
759 error_setg(errp, "die-id is not supported");
760 return;
763 /* skip slots with explicit mismatch */
764 if (props->has_thread_id && props->thread_id != slot->props.thread_id) {
765 continue;
768 if (props->has_core_id && props->core_id != slot->props.core_id) {
769 continue;
772 if (props->has_cluster_id &&
773 props->cluster_id != slot->props.cluster_id) {
774 continue;
777 if (props->has_die_id && props->die_id != slot->props.die_id) {
778 continue;
781 if (props->has_socket_id && props->socket_id != slot->props.socket_id) {
782 continue;
785 /* reject assignment if slot is already assigned, for compatibility
786 * of legacy cpu_index mapping with SPAPR core based mapping do not
787 * error out if cpu thread and matched core have the same node-id */
788 if (slot->props.has_node_id &&
789 slot->props.node_id != props->node_id) {
790 error_setg(errp, "CPU is already assigned to node-id: %" PRId64,
791 slot->props.node_id);
792 return;
795 /* assign slot to node as it's matched '-numa cpu' key */
796 match = true;
797 slot->props.node_id = props->node_id;
798 slot->props.has_node_id = props->has_node_id;
800 if (machine->numa_state->hmat_enabled) {
801 if ((numa_info[props->node_id].initiator < MAX_NODES) &&
802 (props->node_id != numa_info[props->node_id].initiator)) {
803 error_setg(errp, "The initiator of CPU NUMA node %" PRId64
804 " should be itself (got %" PRIu16 ")",
805 props->node_id, numa_info[props->node_id].initiator);
806 return;
808 numa_info[props->node_id].has_cpu = true;
809 numa_info[props->node_id].initiator = props->node_id;
813 if (!match) {
814 error_setg(errp, "no match found");
818 static void machine_get_smp(Object *obj, Visitor *v, const char *name,
819 void *opaque, Error **errp)
821 MachineState *ms = MACHINE(obj);
822 SMPConfiguration *config = &(SMPConfiguration){
823 .has_cpus = true, .cpus = ms->smp.cpus,
824 .has_sockets = true, .sockets = ms->smp.sockets,
825 .has_dies = true, .dies = ms->smp.dies,
826 .has_clusters = true, .clusters = ms->smp.clusters,
827 .has_cores = true, .cores = ms->smp.cores,
828 .has_threads = true, .threads = ms->smp.threads,
829 .has_maxcpus = true, .maxcpus = ms->smp.max_cpus,
832 if (!visit_type_SMPConfiguration(v, name, &config, &error_abort)) {
833 return;
837 static void machine_set_smp(Object *obj, Visitor *v, const char *name,
838 void *opaque, Error **errp)
840 MachineState *ms = MACHINE(obj);
841 g_autoptr(SMPConfiguration) config = NULL;
843 if (!visit_type_SMPConfiguration(v, name, &config, errp)) {
844 return;
847 machine_parse_smp_config(ms, config, errp);
850 static void machine_get_boot(Object *obj, Visitor *v, const char *name,
851 void *opaque, Error **errp)
853 MachineState *ms = MACHINE(obj);
854 BootConfiguration *config = &ms->boot_config;
855 visit_type_BootConfiguration(v, name, &config, &error_abort);
858 static void machine_free_boot_config(MachineState *ms)
860 g_free(ms->boot_config.order);
861 g_free(ms->boot_config.once);
862 g_free(ms->boot_config.splash);
865 static void machine_copy_boot_config(MachineState *ms, BootConfiguration *config)
867 MachineClass *machine_class = MACHINE_GET_CLASS(ms);
869 machine_free_boot_config(ms);
870 ms->boot_config = *config;
871 if (!config->has_order) {
872 ms->boot_config.has_order = true;
873 ms->boot_config.order = g_strdup(machine_class->default_boot_order);
877 static void machine_set_boot(Object *obj, Visitor *v, const char *name,
878 void *opaque, Error **errp)
880 ERRP_GUARD();
881 MachineState *ms = MACHINE(obj);
882 BootConfiguration *config = NULL;
884 if (!visit_type_BootConfiguration(v, name, &config, errp)) {
885 return;
887 if (config->has_order) {
888 validate_bootdevices(config->order, errp);
889 if (*errp) {
890 goto out_free;
893 if (config->has_once) {
894 validate_bootdevices(config->once, errp);
895 if (*errp) {
896 goto out_free;
900 machine_copy_boot_config(ms, config);
901 /* Strings live in ms->boot_config. */
902 free(config);
903 return;
905 out_free:
906 qapi_free_BootConfiguration(config);
909 static void machine_class_init(ObjectClass *oc, void *data)
911 MachineClass *mc = MACHINE_CLASS(oc);
913 /* Default 128 MB as guest ram size */
914 mc->default_ram_size = 128 * MiB;
915 mc->rom_file_has_mr = true;
917 /* numa node memory size aligned on 8MB by default.
918 * On Linux, each node's border has to be 8MB aligned
920 mc->numa_mem_align_shift = 23;
922 object_class_property_add_str(oc, "kernel",
923 machine_get_kernel, machine_set_kernel);
924 object_class_property_set_description(oc, "kernel",
925 "Linux kernel image file");
927 object_class_property_add_str(oc, "initrd",
928 machine_get_initrd, machine_set_initrd);
929 object_class_property_set_description(oc, "initrd",
930 "Linux initial ramdisk file");
932 object_class_property_add_str(oc, "append",
933 machine_get_append, machine_set_append);
934 object_class_property_set_description(oc, "append",
935 "Linux kernel command line");
937 object_class_property_add_str(oc, "dtb",
938 machine_get_dtb, machine_set_dtb);
939 object_class_property_set_description(oc, "dtb",
940 "Linux kernel device tree file");
942 object_class_property_add_str(oc, "dumpdtb",
943 machine_get_dumpdtb, machine_set_dumpdtb);
944 object_class_property_set_description(oc, "dumpdtb",
945 "Dump current dtb to a file and quit");
947 object_class_property_add(oc, "boot", "BootConfiguration",
948 machine_get_boot, machine_set_boot,
949 NULL, NULL);
950 object_class_property_set_description(oc, "boot",
951 "Boot configuration");
953 object_class_property_add(oc, "smp", "SMPConfiguration",
954 machine_get_smp, machine_set_smp,
955 NULL, NULL);
956 object_class_property_set_description(oc, "smp",
957 "CPU topology");
959 object_class_property_add(oc, "phandle-start", "int",
960 machine_get_phandle_start, machine_set_phandle_start,
961 NULL, NULL);
962 object_class_property_set_description(oc, "phandle-start",
963 "The first phandle ID we may generate dynamically");
965 object_class_property_add_str(oc, "dt-compatible",
966 machine_get_dt_compatible, machine_set_dt_compatible);
967 object_class_property_set_description(oc, "dt-compatible",
968 "Overrides the \"compatible\" property of the dt root node");
970 object_class_property_add_bool(oc, "dump-guest-core",
971 machine_get_dump_guest_core, machine_set_dump_guest_core);
972 object_class_property_set_description(oc, "dump-guest-core",
973 "Include guest memory in a core dump");
975 object_class_property_add_bool(oc, "mem-merge",
976 machine_get_mem_merge, machine_set_mem_merge);
977 object_class_property_set_description(oc, "mem-merge",
978 "Enable/disable memory merge support");
980 object_class_property_add_bool(oc, "usb",
981 machine_get_usb, machine_set_usb);
982 object_class_property_set_description(oc, "usb",
983 "Set on/off to enable/disable usb");
985 object_class_property_add_bool(oc, "graphics",
986 machine_get_graphics, machine_set_graphics);
987 object_class_property_set_description(oc, "graphics",
988 "Set on/off to enable/disable graphics emulation");
990 object_class_property_add_str(oc, "firmware",
991 machine_get_firmware, machine_set_firmware);
992 object_class_property_set_description(oc, "firmware",
993 "Firmware image");
995 object_class_property_add_bool(oc, "suppress-vmdesc",
996 machine_get_suppress_vmdesc, machine_set_suppress_vmdesc);
997 object_class_property_set_description(oc, "suppress-vmdesc",
998 "Set on to disable self-describing migration");
1000 object_class_property_add_link(oc, "confidential-guest-support",
1001 TYPE_CONFIDENTIAL_GUEST_SUPPORT,
1002 offsetof(MachineState, cgs),
1003 machine_check_confidential_guest_support,
1004 OBJ_PROP_LINK_STRONG);
1005 object_class_property_set_description(oc, "confidential-guest-support",
1006 "Set confidential guest scheme to support");
1008 /* For compatibility */
1009 object_class_property_add_str(oc, "memory-encryption",
1010 machine_get_memory_encryption, machine_set_memory_encryption);
1011 object_class_property_set_description(oc, "memory-encryption",
1012 "Set memory encryption object to use");
1014 object_class_property_add_link(oc, "memory-backend", TYPE_MEMORY_BACKEND,
1015 offsetof(MachineState, memdev), object_property_allow_set_link,
1016 OBJ_PROP_LINK_STRONG);
1017 object_class_property_set_description(oc, "memory-backend",
1018 "Set RAM backend"
1019 "Valid value is ID of hostmem based backend");
1021 object_class_property_add(oc, "memory", "MemorySizeConfiguration",
1022 machine_get_mem, machine_set_mem,
1023 NULL, NULL);
1024 object_class_property_set_description(oc, "memory",
1025 "Memory size configuration");
1028 static void machine_class_base_init(ObjectClass *oc, void *data)
1030 MachineClass *mc = MACHINE_CLASS(oc);
1031 mc->max_cpus = mc->max_cpus ?: 1;
1032 mc->min_cpus = mc->min_cpus ?: 1;
1033 mc->default_cpus = mc->default_cpus ?: 1;
1035 if (!object_class_is_abstract(oc)) {
1036 const char *cname = object_class_get_name(oc);
1037 assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX));
1038 mc->name = g_strndup(cname,
1039 strlen(cname) - strlen(TYPE_MACHINE_SUFFIX));
1040 mc->compat_props = g_ptr_array_new();
1044 static void machine_initfn(Object *obj)
1046 MachineState *ms = MACHINE(obj);
1047 MachineClass *mc = MACHINE_GET_CLASS(obj);
1049 container_get(obj, "/peripheral");
1050 container_get(obj, "/peripheral-anon");
1052 ms->dump_guest_core = true;
1053 ms->mem_merge = true;
1054 ms->enable_graphics = true;
1055 ms->kernel_cmdline = g_strdup("");
1056 ms->ram_size = mc->default_ram_size;
1057 ms->maxram_size = mc->default_ram_size;
1059 if (mc->nvdimm_supported) {
1060 Object *obj = OBJECT(ms);
1062 ms->nvdimms_state = g_new0(NVDIMMState, 1);
1063 object_property_add_bool(obj, "nvdimm",
1064 machine_get_nvdimm, machine_set_nvdimm);
1065 object_property_set_description(obj, "nvdimm",
1066 "Set on/off to enable/disable "
1067 "NVDIMM instantiation");
1069 object_property_add_str(obj, "nvdimm-persistence",
1070 machine_get_nvdimm_persistence,
1071 machine_set_nvdimm_persistence);
1072 object_property_set_description(obj, "nvdimm-persistence",
1073 "Set NVDIMM persistence"
1074 "Valid values are cpu, mem-ctrl");
1077 if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) {
1078 ms->numa_state = g_new0(NumaState, 1);
1079 object_property_add_bool(obj, "hmat",
1080 machine_get_hmat, machine_set_hmat);
1081 object_property_set_description(obj, "hmat",
1082 "Set on/off to enable/disable "
1083 "ACPI Heterogeneous Memory Attribute "
1084 "Table (HMAT)");
1087 /* default to mc->default_cpus */
1088 ms->smp.cpus = mc->default_cpus;
1089 ms->smp.max_cpus = mc->default_cpus;
1090 ms->smp.sockets = 1;
1091 ms->smp.dies = 1;
1092 ms->smp.clusters = 1;
1093 ms->smp.cores = 1;
1094 ms->smp.threads = 1;
1096 machine_copy_boot_config(ms, &(BootConfiguration){ 0 });
1099 static void machine_finalize(Object *obj)
1101 MachineState *ms = MACHINE(obj);
1103 machine_free_boot_config(ms);
1104 g_free(ms->kernel_filename);
1105 g_free(ms->initrd_filename);
1106 g_free(ms->kernel_cmdline);
1107 g_free(ms->dtb);
1108 g_free(ms->dumpdtb);
1109 g_free(ms->dt_compatible);
1110 g_free(ms->firmware);
1111 g_free(ms->device_memory);
1112 g_free(ms->nvdimms_state);
1113 g_free(ms->numa_state);
1116 bool machine_usb(MachineState *machine)
1118 return machine->usb;
1121 int machine_phandle_start(MachineState *machine)
1123 return machine->phandle_start;
1126 bool machine_dump_guest_core(MachineState *machine)
1128 return machine->dump_guest_core;
1131 bool machine_mem_merge(MachineState *machine)
1133 return machine->mem_merge;
1136 static char *cpu_slot_to_string(const CPUArchId *cpu)
1138 GString *s = g_string_new(NULL);
1139 if (cpu->props.has_socket_id) {
1140 g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id);
1142 if (cpu->props.has_die_id) {
1143 if (s->len) {
1144 g_string_append_printf(s, ", ");
1146 g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id);
1148 if (cpu->props.has_cluster_id) {
1149 if (s->len) {
1150 g_string_append_printf(s, ", ");
1152 g_string_append_printf(s, "cluster-id: %"PRId64, cpu->props.cluster_id);
1154 if (cpu->props.has_core_id) {
1155 if (s->len) {
1156 g_string_append_printf(s, ", ");
1158 g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id);
1160 if (cpu->props.has_thread_id) {
1161 if (s->len) {
1162 g_string_append_printf(s, ", ");
1164 g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id);
1166 return g_string_free(s, false);
1169 static void numa_validate_initiator(NumaState *numa_state)
1171 int i;
1172 NodeInfo *numa_info = numa_state->nodes;
1174 for (i = 0; i < numa_state->num_nodes; i++) {
1175 if (numa_info[i].initiator == MAX_NODES) {
1176 error_report("The initiator of NUMA node %d is missing, use "
1177 "'-numa node,initiator' option to declare it", i);
1178 exit(1);
1181 if (!numa_info[numa_info[i].initiator].present) {
1182 error_report("NUMA node %" PRIu16 " is missing, use "
1183 "'-numa node' option to declare it first",
1184 numa_info[i].initiator);
1185 exit(1);
1188 if (!numa_info[numa_info[i].initiator].has_cpu) {
1189 error_report("The initiator of NUMA node %d is invalid", i);
1190 exit(1);
1195 static void machine_numa_finish_cpu_init(MachineState *machine)
1197 int i;
1198 bool default_mapping;
1199 GString *s = g_string_new(NULL);
1200 MachineClass *mc = MACHINE_GET_CLASS(machine);
1201 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine);
1203 assert(machine->numa_state->num_nodes);
1204 for (i = 0; i < possible_cpus->len; i++) {
1205 if (possible_cpus->cpus[i].props.has_node_id) {
1206 break;
1209 default_mapping = (i == possible_cpus->len);
1211 for (i = 0; i < possible_cpus->len; i++) {
1212 const CPUArchId *cpu_slot = &possible_cpus->cpus[i];
1214 if (!cpu_slot->props.has_node_id) {
1215 /* fetch default mapping from board and enable it */
1216 CpuInstanceProperties props = cpu_slot->props;
1218 props.node_id = mc->get_default_cpu_node_id(machine, i);
1219 if (!default_mapping) {
1220 /* record slots with not set mapping,
1221 * TODO: make it hard error in future */
1222 char *cpu_str = cpu_slot_to_string(cpu_slot);
1223 g_string_append_printf(s, "%sCPU %d [%s]",
1224 s->len ? ", " : "", i, cpu_str);
1225 g_free(cpu_str);
1227 /* non mapped cpus used to fallback to node 0 */
1228 props.node_id = 0;
1231 props.has_node_id = true;
1232 machine_set_cpu_numa_node(machine, &props, &error_fatal);
1236 if (machine->numa_state->hmat_enabled) {
1237 numa_validate_initiator(machine->numa_state);
1240 if (s->len && !qtest_enabled()) {
1241 warn_report("CPU(s) not present in any NUMA nodes: %s",
1242 s->str);
1243 warn_report("All CPU(s) up to maxcpus should be described "
1244 "in NUMA config, ability to start up with partial NUMA "
1245 "mappings is obsoleted and will be removed in future");
1247 g_string_free(s, true);
1250 MemoryRegion *machine_consume_memdev(MachineState *machine,
1251 HostMemoryBackend *backend)
1253 MemoryRegion *ret = host_memory_backend_get_memory(backend);
1255 if (host_memory_backend_is_mapped(backend)) {
1256 error_report("memory backend %s can't be used multiple times.",
1257 object_get_canonical_path_component(OBJECT(backend)));
1258 exit(EXIT_FAILURE);
1260 host_memory_backend_set_mapped(backend, true);
1261 vmstate_register_ram_global(ret);
1262 return ret;
1265 static bool create_default_memdev(MachineState *ms, const char *path, Error **errp)
1267 Object *obj;
1268 MachineClass *mc = MACHINE_GET_CLASS(ms);
1269 bool r = false;
1271 obj = object_new(path ? TYPE_MEMORY_BACKEND_FILE : TYPE_MEMORY_BACKEND_RAM);
1272 if (path) {
1273 if (!object_property_set_str(obj, "mem-path", path, errp)) {
1274 goto out;
1277 if (!object_property_set_int(obj, "size", ms->ram_size, errp)) {
1278 goto out;
1280 object_property_add_child(object_get_objects_root(), mc->default_ram_id,
1281 obj);
1282 /* Ensure backend's memory region name is equal to mc->default_ram_id */
1283 if (!object_property_set_bool(obj, "x-use-canonical-path-for-ramblock-id",
1284 false, errp)) {
1285 goto out;
1287 if (!user_creatable_complete(USER_CREATABLE(obj), errp)) {
1288 goto out;
1290 r = object_property_set_link(OBJECT(ms), "memory-backend", obj, errp);
1292 out:
1293 object_unref(obj);
1294 return r;
1298 void machine_run_board_init(MachineState *machine, const char *mem_path, Error **errp)
1300 MachineClass *machine_class = MACHINE_GET_CLASS(machine);
1301 ObjectClass *oc = object_class_by_name(machine->cpu_type);
1302 CPUClass *cc;
1304 /* This checkpoint is required by replay to separate prior clock
1305 reading from the other reads, because timer polling functions query
1306 clock values from the log. */
1307 replay_checkpoint(CHECKPOINT_INIT);
1309 if (!xen_enabled()) {
1310 /* On 32-bit hosts, QEMU is limited by virtual address space */
1311 if (machine->ram_size > (2047 << 20) && HOST_LONG_BITS == 32) {
1312 error_setg(errp, "at most 2047 MB RAM can be simulated");
1313 return;
1317 if (machine->memdev) {
1318 ram_addr_t backend_size = object_property_get_uint(OBJECT(machine->memdev),
1319 "size", &error_abort);
1320 if (backend_size != machine->ram_size) {
1321 error_setg(errp, "Machine memory size does not match the size of the memory backend");
1322 return;
1324 } else if (machine_class->default_ram_id && machine->ram_size &&
1325 numa_uses_legacy_mem()) {
1326 if (!create_default_memdev(current_machine, mem_path, errp)) {
1327 return;
1331 if (machine->numa_state) {
1332 numa_complete_configuration(machine);
1333 if (machine->numa_state->num_nodes) {
1334 machine_numa_finish_cpu_init(machine);
1338 if (!machine->ram && machine->memdev) {
1339 machine->ram = machine_consume_memdev(machine, machine->memdev);
1342 /* If the machine supports the valid_cpu_types check and the user
1343 * specified a CPU with -cpu check here that the user CPU is supported.
1345 if (machine_class->valid_cpu_types && machine->cpu_type) {
1346 int i;
1348 for (i = 0; machine_class->valid_cpu_types[i]; i++) {
1349 if (object_class_dynamic_cast(oc,
1350 machine_class->valid_cpu_types[i])) {
1351 /* The user specificed CPU is in the valid field, we are
1352 * good to go.
1354 break;
1358 if (!machine_class->valid_cpu_types[i]) {
1359 /* The user specified CPU is not valid */
1360 error_report("Invalid CPU type: %s", machine->cpu_type);
1361 error_printf("The valid types are: %s",
1362 machine_class->valid_cpu_types[0]);
1363 for (i = 1; machine_class->valid_cpu_types[i]; i++) {
1364 error_printf(", %s", machine_class->valid_cpu_types[i]);
1366 error_printf("\n");
1368 exit(1);
1372 /* Check if CPU type is deprecated and warn if so */
1373 cc = CPU_CLASS(oc);
1374 if (cc && cc->deprecation_note) {
1375 warn_report("CPU model %s is deprecated -- %s", machine->cpu_type,
1376 cc->deprecation_note);
1379 if (machine->cgs) {
1381 * With confidential guests, the host can't see the real
1382 * contents of RAM, so there's no point in it trying to merge
1383 * areas.
1385 machine_set_mem_merge(OBJECT(machine), false, &error_abort);
1388 * Virtio devices can't count on directly accessing guest
1389 * memory, so they need iommu_platform=on to use normal DMA
1390 * mechanisms. That requires also disabling legacy virtio
1391 * support for those virtio pci devices which allow it.
1393 object_register_sugar_prop(TYPE_VIRTIO_PCI, "disable-legacy",
1394 "on", true);
1395 object_register_sugar_prop(TYPE_VIRTIO_DEVICE, "iommu_platform",
1396 "on", false);
1399 accel_init_interfaces(ACCEL_GET_CLASS(machine->accelerator));
1400 machine_class->init(machine);
1401 phase_advance(PHASE_MACHINE_INITIALIZED);
1404 static NotifierList machine_init_done_notifiers =
1405 NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers);
1407 void qemu_add_machine_init_done_notifier(Notifier *notify)
1409 notifier_list_add(&machine_init_done_notifiers, notify);
1410 if (phase_check(PHASE_MACHINE_READY)) {
1411 notify->notify(notify, NULL);
1415 void qemu_remove_machine_init_done_notifier(Notifier *notify)
1417 notifier_remove(notify);
1420 void qdev_machine_creation_done(void)
1422 cpu_synchronize_all_post_init();
1424 if (current_machine->boot_config.has_once) {
1425 qemu_boot_set(current_machine->boot_config.once, &error_fatal);
1426 qemu_register_reset(restore_boot_order, g_strdup(current_machine->boot_config.order));
1430 * ok, initial machine setup is done, starting from now we can
1431 * only create hotpluggable devices
1433 phase_advance(PHASE_MACHINE_READY);
1434 qdev_assert_realized_properly();
1436 /* TODO: once all bus devices are qdevified, this should be done
1437 * when bus is created by qdev.c */
1439 * TODO: If we had a main 'reset container' that the whole system
1440 * lived in, we could reset that using the multi-phase reset
1441 * APIs. For the moment, we just reset the sysbus, which will cause
1442 * all devices hanging off it (and all their child buses, recursively)
1443 * to be reset. Note that this will *not* reset any Device objects
1444 * which are not attached to some part of the qbus tree!
1446 qemu_register_reset(resettable_cold_reset_fn, sysbus_get_default());
1448 notifier_list_notify(&machine_init_done_notifiers, NULL);
1450 if (rom_check_and_register_reset() != 0) {
1451 exit(1);
1454 replay_start();
1456 /* This checkpoint is required by replay to separate prior clock
1457 reading from the other reads, because timer polling functions query
1458 clock values from the log. */
1459 replay_checkpoint(CHECKPOINT_RESET);
1460 qemu_system_reset(SHUTDOWN_CAUSE_NONE);
1461 register_global_state();
1464 static const TypeInfo machine_info = {
1465 .name = TYPE_MACHINE,
1466 .parent = TYPE_OBJECT,
1467 .abstract = true,
1468 .class_size = sizeof(MachineClass),
1469 .class_init = machine_class_init,
1470 .class_base_init = machine_class_base_init,
1471 .instance_size = sizeof(MachineState),
1472 .instance_init = machine_initfn,
1473 .instance_finalize = machine_finalize,
1476 static void machine_register_types(void)
1478 type_register_static(&machine_info);
1481 type_init(machine_register_types)