target/openrisc/machine.c

   1 /*
   2  * OpenRISC Machine
   3  *
   4  * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com>
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2.1 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "qemu/osdep.h"
  21 #include "cpu.h"
  22 #include "migration/cpu.h"
  23
  24 static const VMStateDescription vmstate_tlb_entry = {
  25     .name = "tlb_entry",
  26     .version_id = 1,
  27     .minimum_version_id = 1,
  28     .fields = (VMStateField[]) {
  29         VMSTATE_UINTTL(mr, OpenRISCTLBEntry),
  30         VMSTATE_UINTTL(tr, OpenRISCTLBEntry),
  31         VMSTATE_END_OF_LIST()
  32     }
  33 };
  34
  35 static const VMStateDescription vmstate_cpu_tlb = {
  36     .name = "cpu_tlb",
  37     .version_id = 2,
  38     .minimum_version_id = 2,
  39     .fields = (VMStateField[]) {
  40         VMSTATE_STRUCT_ARRAY(itlb, CPUOpenRISCTLBContext, TLB_SIZE, 0,
  41                              vmstate_tlb_entry, OpenRISCTLBEntry),
  42         VMSTATE_STRUCT_ARRAY(dtlb, CPUOpenRISCTLBContext, TLB_SIZE, 0,
  43                              vmstate_tlb_entry, OpenRISCTLBEntry),
  44         VMSTATE_END_OF_LIST()
  45     }
  46 };
  47
  48 static int get_sr(QEMUFile *f, void *opaque, size_t size,
  49                   const VMStateField *field)
  50 {
  51     CPUOpenRISCState *env = opaque;
  52     cpu_set_sr(env, qemu_get_be32(f));
  53     return 0;
  54 }
  55
  56 static int put_sr(QEMUFile *f, void *opaque, size_t size,
  57                   const VMStateField *field, JSONWriter *vmdesc)
  58 {
  59     CPUOpenRISCState *env = opaque;
  60     qemu_put_be32(f, cpu_get_sr(env));
  61     return 0;
  62 }
  63
  64 static const VMStateInfo vmstate_sr = {
  65     .name = "sr",
  66     .get = get_sr,
  67     .put = put_sr,
  68 };
  69
  70 static const VMStateDescription vmstate_env = {
  71     .name = "env",
  72     .version_id = 6,
  73     .minimum_version_id = 6,
  74     .fields = (VMStateField[]) {
  75         VMSTATE_UINTTL_2DARRAY(shadow_gpr, CPUOpenRISCState, 16, 32),
  76         VMSTATE_UINTTL(pc, CPUOpenRISCState),
  77         VMSTATE_UINTTL(ppc, CPUOpenRISCState),
  78         VMSTATE_UINTTL(jmp_pc, CPUOpenRISCState),
  79         VMSTATE_UINTTL(lock_addr, CPUOpenRISCState),
  80         VMSTATE_UINTTL(lock_value, CPUOpenRISCState),
  81         VMSTATE_UINTTL(epcr, CPUOpenRISCState),
  82         VMSTATE_UINTTL(eear, CPUOpenRISCState),
  83
  84         /* Save the architecture value of the SR, not the internally
  85            expanded version.  Since this architecture value does not
  86            exist in memory to be stored, this requires a but of hoop
  87            jumping.  We want OFFSET=0 so that we effectively pass ENV
  88            to the helper functions, and we need to fill in the name by
  89            hand since there's no field of that name.  */
  90         {
  91             .name = "sr",
  92             .version_id = 0,
  93             .size = sizeof(uint32_t),
  94             .info = &vmstate_sr,
  95             .flags = VMS_SINGLE,
  96             .offset = 0
  97         },
  98
  99         VMSTATE_UINT32(vr, CPUOpenRISCState),
 100         VMSTATE_UINT32(upr, CPUOpenRISCState),
 101         VMSTATE_UINT32(cpucfgr, CPUOpenRISCState),
 102         VMSTATE_UINT32(dmmucfgr, CPUOpenRISCState),
 103         VMSTATE_UINT32(immucfgr, CPUOpenRISCState),
 104         VMSTATE_UINT32(evbar, CPUOpenRISCState),
 105         VMSTATE_UINT32(pmr, CPUOpenRISCState),
 106         VMSTATE_UINT32(esr, CPUOpenRISCState),
 107         VMSTATE_UINT32(fpcsr, CPUOpenRISCState),
 108         VMSTATE_UINT64(mac, CPUOpenRISCState),
 109
 110         VMSTATE_STRUCT(tlb, CPUOpenRISCState, 1,
 111                        vmstate_cpu_tlb, CPUOpenRISCTLBContext),
 112
 113         VMSTATE_TIMER_PTR(timer, CPUOpenRISCState),
 114         VMSTATE_UINT32(ttmr, CPUOpenRISCState),
 115
 116         VMSTATE_UINT32(picmr, CPUOpenRISCState),
 117         VMSTATE_UINT32(picsr, CPUOpenRISCState),
 118
 119         VMSTATE_END_OF_LIST()
 120     }
 121 };
 122
 123 static int cpu_post_load(void *opaque, int version_id)
 124 {
 125     OpenRISCCPU *cpu = opaque;
 126     CPUOpenRISCState *env = &cpu->env;
 127
 128     /* Update env->fp_status to match env->fpcsr.  */
 129     cpu_set_fpcsr(env, env->fpcsr);
 130     return 0;
 131 }
 132
 133 const VMStateDescription vmstate_openrisc_cpu = {
 134     .name = "cpu",
 135     .version_id = 1,
 136     .minimum_version_id = 1,
 137     .post_load = cpu_post_load,
 138     .fields = (VMStateField[]) {
 139         VMSTATE_CPU(),
 140         VMSTATE_STRUCT(env, OpenRISCCPU, 1, vmstate_env, CPUOpenRISCState),
 141         VMSTATE_END_OF_LIST()
 142     }
 143 };