Merge remote-tracking branch 'stefanha/net' into staging
[qemu/quintela.git] / target-moxie / cpu.h
blobb96236f76e4f86c4071fad7a637091106e7f2975
1 /*
2 * Moxie emulation
4 * Copyright (c) 2008, 2010, 2013 Anthony Green
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 #ifndef _CPU_MOXIE_H
20 #define _CPU_MOXIE_H
22 #include "config.h"
23 #include "qemu-common.h"
25 #define TARGET_LONG_BITS 32
27 #define CPUArchState struct CPUMoxieState
29 #define TARGET_HAS_ICE 1
31 #define CPU_SAVE_VERSION 1
33 #define ELF_MACHINE 0xFEED /* EM_MOXIE */
35 #define MOXIE_EX_DIV0 0
36 #define MOXIE_EX_BAD 1
37 #define MOXIE_EX_IRQ 2
38 #define MOXIE_EX_SWI 3
39 #define MOXIE_EX_MMU_MISS 4
40 #define MOXIE_EX_BREAK 16
42 #include "exec/cpu-defs.h"
43 #include "fpu/softfloat.h"
45 #define TARGET_PAGE_BITS 12 /* 4k */
47 #define TARGET_PHYS_ADDR_SPACE_BITS 32
48 #define TARGET_VIRT_ADDR_SPACE_BITS 32
50 #define NB_MMU_MODES 1
52 typedef struct CPUMoxieState {
54 uint32_t flags; /* general execution flags */
55 uint32_t gregs[16]; /* general registers */
56 uint32_t sregs[256]; /* special registers */
57 uint32_t pc; /* program counter */
58 /* Instead of saving the cc value, we save the cmp arguments
59 and compute cc on demand. */
60 uint32_t cc_a; /* reg a for condition code calculation */
61 uint32_t cc_b; /* reg b for condition code calculation */
63 void *irq[8];
65 CPU_COMMON
67 } CPUMoxieState;
69 #include "qom/cpu.h"
71 #define TYPE_MOXIE_CPU "moxie-cpu"
73 #define MOXIE_CPU_CLASS(klass) \
74 OBJECT_CLASS_CHECK(MoxieCPUClass, (klass), TYPE_MOXIE_CPU)
75 #define MOXIE_CPU(obj) \
76 OBJECT_CHECK(MoxieCPU, (obj), TYPE_MOXIE_CPU)
77 #define MOXIE_CPU_GET_CLASS(obj) \
78 OBJECT_GET_CLASS(MoxieCPUClass, (obj), TYPE_MOXIE_CPU)
80 /**
81 * MoxieCPUClass:
82 * @parent_reset: The parent class' reset handler.
84 * A Moxie CPU model.
86 typedef struct MoxieCPUClass {
87 /*< private >*/
88 CPUClass parent_class;
89 /*< public >*/
91 DeviceRealize parent_realize;
92 void (*parent_reset)(CPUState *cpu);
93 } MoxieCPUClass;
95 /**
96 * MoxieCPU:
97 * @env: #CPUMoxieState
99 * A Moxie CPU.
101 typedef struct MoxieCPU {
102 /*< private >*/
103 CPUState parent_obj;
104 /*< public >*/
106 CPUMoxieState env;
107 } MoxieCPU;
109 static inline MoxieCPU *moxie_env_get_cpu(CPUMoxieState *env)
111 return MOXIE_CPU(container_of(env, MoxieCPU, env));
114 #define ENV_GET_CPU(e) CPU(moxie_env_get_cpu(e))
116 #define ENV_OFFSET offsetof(MoxieCPU, env)
118 MoxieCPU *cpu_moxie_init(const char *cpu_model);
119 int cpu_moxie_exec(CPUMoxieState *s);
120 void do_interrupt(CPUMoxieState *env);
121 void moxie_translate_init(void);
122 int cpu_moxie_signal_handler(int host_signum, void *pinfo,
123 void *puc);
125 static inline CPUMoxieState *cpu_init(const char *cpu_model)
127 MoxieCPU *cpu = cpu_moxie_init(cpu_model);
128 if (cpu == NULL) {
129 return NULL;
131 return &cpu->env;
134 #define cpu_exec cpu_moxie_exec
135 #define cpu_gen_code cpu_moxie_gen_code
136 #define cpu_signal_handler cpu_moxie_signal_handler
138 static inline int cpu_mmu_index(CPUMoxieState *env)
140 return 0;
143 #include "exec/cpu-all.h"
144 #include "exec/exec-all.h"
146 static inline void cpu_pc_from_tb(CPUMoxieState *env, TranslationBlock *tb)
148 env->pc = tb->pc;
151 static inline void cpu_get_tb_cpu_state(CPUMoxieState *env, target_ulong *pc,
152 target_ulong *cs_base, int *flags)
154 *pc = env->pc;
155 *cs_base = 0;
156 *flags = 0;
159 static inline int cpu_has_work(CPUState *cpu)
161 return cpu->interrupt_request & CPU_INTERRUPT_HARD;
164 int cpu_moxie_handle_mmu_fault(CPUMoxieState *env, target_ulong address,
165 int rw, int mmu_idx);
167 #endif /* _CPU_MOXIE_H */