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acpi: add aml_and() term
[qemu/qmp-unstable.git] / hw / mips / mips_fulong2e.c
blob6a9ebfa91161c798b86c4702096e8738b414f497
1 /*
2 * QEMU fulong 2e mini pc support
3 *
4 * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
5 * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
6 * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com)
7 * This code is licensed under the GNU GPL v2.
8 *
9 * Contributions after 2012-01-13 are licensed under the terms of the
10 * GNU GPL, version 2 or (at your option) any later version.
11 */
12
13 /*
14 * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
15 * http://www.linux-mips.org/wiki/Fulong
16 *
17 * Loongson 2e user manual:
18 * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
19 */
20
21 #include "hw/hw.h"
22 #include "hw/i386/pc.h"
23 #include "hw/char/serial.h"
24 #include "hw/block/fdc.h"
25 #include "net/net.h"
26 #include "hw/boards.h"
27 #include "hw/i2c/smbus.h"
28 #include "sysemu/block-backend.h"
29 #include "hw/block/flash.h"
30 #include "hw/mips/mips.h"
31 #include "hw/mips/cpudevs.h"
32 #include "hw/pci/pci.h"
33 #include "sysemu/char.h"
34 #include "sysemu/sysemu.h"
35 #include "audio/audio.h"
36 #include "qemu/log.h"
37 #include "hw/loader.h"
38 #include "hw/mips/bios.h"
39 #include "hw/ide.h"
40 #include "elf.h"
41 #include "hw/isa/vt82c686.h"
42 #include "hw/timer/mc146818rtc.h"
43 #include "hw/timer/i8254.h"
44 #include "sysemu/blockdev.h"
45 #include "exec/address-spaces.h"
46 #include "sysemu/qtest.h"
47 #include "qemu/error-report.h"
48
49 #define DEBUG_FULONG2E_INIT
50
51 #define ENVP_ADDR 0x80002000l
52 #define ENVP_NB_ENTRIES 16
53 #define ENVP_ENTRY_SIZE 256
54
55 #define MAX_IDE_BUS 2
56
57 /*
58 * PMON is not part of qemu and released with BSD license, anyone
59 * who want to build a pmon binary please first git-clone the source
60 * from the git repository at:
61 * http://www.loongson.cn/support/git/pmon
62 * Then follow the "Compile Guide" available at:
63 * http://dev.lemote.com/code/pmon
64 *
65 * Notes:
66 * 1, don't use the source at http://dev.lemote.com/http_git/pmon.git
67 * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
68 * in the "Compile Guide".
69 */
70 #define FULONG_BIOSNAME "pmon_fulong2e.bin"
71
72 /* PCI SLOT in fulong 2e */
73 #define FULONG2E_VIA_SLOT 5
74 #define FULONG2E_ATI_SLOT 6
75 #define FULONG2E_RTL8139_SLOT 7
76
77 static ISADevice *pit;
78
79 static struct _loaderparams {
80 int ram_size;
81 const char *kernel_filename;
82 const char *kernel_cmdline;
83 const char *initrd_filename;
84 } loaderparams;
85
86 static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t* prom_buf, int index,
87 const char *string, ...)
88 {
89 va_list ap;
90 int32_t table_addr;
91
92 if (index >= ENVP_NB_ENTRIES)
93 return;
94
95 if (string == NULL) {
96 prom_buf[index] = 0;
97 return;
98 }
99
100 table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE;
101 prom_buf[index] = tswap32(ENVP_ADDR + table_addr);
102
103 va_start(ap, string);
104 vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap);
105 va_end(ap);
106 }
107
108 static int64_t load_kernel (CPUMIPSState *env)
109 {
110 int64_t kernel_entry, kernel_low, kernel_high;
111 int index = 0;
112 long initrd_size;
113 ram_addr_t initrd_offset;
114 uint32_t *prom_buf;
115 long prom_size;
116
117 if (load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, NULL,
118 (uint64_t *)&kernel_entry, (uint64_t *)&kernel_low,
119 (uint64_t *)&kernel_high, 0, ELF_MACHINE, 1) < 0) {
120 fprintf(stderr, "qemu: could not load kernel '%s'\n",
121 loaderparams.kernel_filename);
122 exit(1);
123 }
124
125 /* load initrd */
126 initrd_size = 0;
127 initrd_offset = 0;
128 if (loaderparams.initrd_filename) {
129 initrd_size = get_image_size (loaderparams.initrd_filename);
130 if (initrd_size > 0) {
131 initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
132 if (initrd_offset + initrd_size > ram_size) {
133 fprintf(stderr,
134 "qemu: memory too small for initial ram disk '%s'\n",
135 loaderparams.initrd_filename);
136 exit(1);
137 }
138 initrd_size = load_image_targphys(loaderparams.initrd_filename,
139 initrd_offset, ram_size - initrd_offset);
140 }
141 if (initrd_size == (target_ulong) -1) {
142 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
143 loaderparams.initrd_filename);
144 exit(1);
145 }
146 }
147
148 /* Setup prom parameters. */
149 prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE);
150 prom_buf = g_malloc(prom_size);
151
152 prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename);
153 if (initrd_size > 0) {
154 prom_set(prom_buf, index++, "rd_start=0x%" PRIx64 " rd_size=%li %s",
155 cpu_mips_phys_to_kseg0(NULL, initrd_offset), initrd_size,
156 loaderparams.kernel_cmdline);
157 } else {
158 prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline);
159 }
160
161 /* Setup minimum environment variables */
162 prom_set(prom_buf, index++, "busclock=33000000");
163 prom_set(prom_buf, index++, "cpuclock=100000000");
164 prom_set(prom_buf, index++, "memsize=%i", loaderparams.ram_size/1024/1024);
165 prom_set(prom_buf, index++, "modetty0=38400n8r");
166 prom_set(prom_buf, index++, NULL);
167
168 rom_add_blob_fixed("prom", prom_buf, prom_size,
169 cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR));
170
171 return kernel_entry;
172 }
173
174 static void write_bootloader (CPUMIPSState *env, uint8_t *base, int64_t kernel_addr)
175 {
176 uint32_t *p;
177
178 /* Small bootloader */
179 p = (uint32_t *) base;
180
181 stl_p(p++, 0x0bf00010); /* j 0x1fc00040 */
182 stl_p(p++, 0x00000000); /* nop */
183
184 /* Second part of the bootloader */
185 p = (uint32_t *) (base + 0x040);
186
187 stl_p(p++, 0x3c040000); /* lui a0, 0 */
188 stl_p(p++, 0x34840002); /* ori a0, a0, 2 */
189 stl_p(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff)); /* lui a1, high(ENVP_ADDR) */
190 stl_p(p++, 0x34a50000 | (ENVP_ADDR & 0xffff)); /* ori a1, a0, low(ENVP_ADDR) */
191 stl_p(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff)); /* lui a2, high(ENVP_ADDR + 8) */
192 stl_p(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff)); /* ori a2, a2, low(ENVP_ADDR + 8) */
193 stl_p(p++, 0x3c070000 | (loaderparams.ram_size >> 16)); /* lui a3, high(env->ram_size) */
194 stl_p(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff)); /* ori a3, a3, low(env->ram_size) */
195 stl_p(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff)); /* lui ra, high(kernel_addr) */;
196 stl_p(p++, 0x37ff0000 | (kernel_addr & 0xffff)); /* ori ra, ra, low(kernel_addr) */
197 stl_p(p++, 0x03e00008); /* jr ra */
198 stl_p(p++, 0x00000000); /* nop */
199 }
200
201
202 static void main_cpu_reset(void *opaque)
203 {
204 MIPSCPU *cpu = opaque;
205 CPUMIPSState *env = &cpu->env;
206
207 cpu_reset(CPU(cpu));
208 /* TODO: 2E reset stuff */
209 if (loaderparams.kernel_filename) {
210 env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
211 }
212 }
213
214 static const uint8_t eeprom_spd[0x80] = {
215 0x80,0x08,0x07,0x0d,0x09,0x02,0x40,0x00,0x04,0x70,
216 0x70,0x00,0x82,0x10,0x00,0x01,0x0e,0x04,0x0c,0x01,
217 0x02,0x20,0x80,0x75,0x70,0x00,0x00,0x50,0x3c,0x50,
218 0x2d,0x20,0xb0,0xb0,0x50,0x50,0x00,0x00,0x00,0x00,
219 0x00,0x41,0x48,0x3c,0x32,0x75,0x00,0x00,0x00,0x00,
220 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
221 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
222 0x00,0x00,0x00,0x9c,0x7b,0x07,0x00,0x00,0x00,0x00,
223 0x00,0x00,0x00,0x00,0x48,0x42,0x35,0x34,0x41,0x32,
224 0x35,0x36,0x38,0x4b,0x4e,0x2d,0x41,0x37,0x35,0x42,
225 0x20,0x30,0x20
226 };
227
228 /* Audio support */
229 static void audio_init (PCIBus *pci_bus)
230 {
231 vt82c686b_ac97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 5));
232 vt82c686b_mc97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 6));
233 }
234
235 /* Network support */
236 static void network_init (PCIBus *pci_bus)
237 {
238 int i;
239
240 for(i = 0; i < nb_nics; i++) {
241 NICInfo *nd = &nd_table[i];
242 const char *default_devaddr = NULL;
243
244 if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
245 /* The fulong board has a RTL8139 card using PCI SLOT 7 */
246 default_devaddr = "07";
247 }
248
249 pci_nic_init_nofail(nd, pci_bus, "rtl8139", default_devaddr);
250 }
251 }
252
253 static void cpu_request_exit(void *opaque, int irq, int level)
254 {
255 CPUState *cpu = current_cpu;
256
257 if (cpu && level) {
258 cpu_exit(cpu);
259 }
260 }
261
262 static void mips_fulong2e_init(MachineState *machine)
263 {
264 ram_addr_t ram_size = machine->ram_size;
265 const char *cpu_model = machine->cpu_model;
266 const char *kernel_filename = machine->kernel_filename;
267 const char *kernel_cmdline = machine->kernel_cmdline;
268 const char *initrd_filename = machine->initrd_filename;
269 char *filename;
270 MemoryRegion *address_space_mem = get_system_memory();
271 MemoryRegion *ram = g_new(MemoryRegion, 1);
272 MemoryRegion *bios = g_new(MemoryRegion, 1);
273 long bios_size;
274 int64_t kernel_entry;
275 qemu_irq *i8259;
276 qemu_irq *cpu_exit_irq;
277 PCIBus *pci_bus;
278 ISABus *isa_bus;
279 I2CBus *smbus;
280 int i;
281 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
282 MIPSCPU *cpu;
283 CPUMIPSState *env;
284
285 /* init CPUs */
286 if (cpu_model == NULL) {
287 cpu_model = "Loongson-2E";
288 }
289 cpu = cpu_mips_init(cpu_model);
290 if (cpu == NULL) {
291 fprintf(stderr, "Unable to find CPU definition\n");
292 exit(1);
293 }
294 env = &cpu->env;
295
296 qemu_register_reset(main_cpu_reset, cpu);
297
298 /* fulong 2e has 256M ram. */
299 ram_size = 256 * 1024 * 1024;
300
301 /* fulong 2e has a 1M flash.Winbond W39L040AP70Z */
302 bios_size = 1024 * 1024;
303
304 /* allocate RAM */
305 memory_region_init_ram(ram, NULL, "fulong2e.ram", ram_size, &error_abort);
306 vmstate_register_ram_global(ram);
307 memory_region_init_ram(bios, NULL, "fulong2e.bios", bios_size,
308 &error_abort);
309 vmstate_register_ram_global(bios);
310 memory_region_set_readonly(bios, true);
311
312 memory_region_add_subregion(address_space_mem, 0, ram);
313 memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
314
315 /* We do not support flash operation, just loading pmon.bin as raw BIOS.
316 * Please use -L to set the BIOS path and -bios to set bios name. */
317
318 if (kernel_filename) {
319 loaderparams.ram_size = ram_size;
320 loaderparams.kernel_filename = kernel_filename;
321 loaderparams.kernel_cmdline = kernel_cmdline;
322 loaderparams.initrd_filename = initrd_filename;
323 kernel_entry = load_kernel (env);
324 write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
325 } else {
326 if (bios_name == NULL) {
327 bios_name = FULONG_BIOSNAME;
328 }
329 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
330 if (filename) {
331 bios_size = load_image_targphys(filename, 0x1fc00000LL,
332 BIOS_SIZE);
333 g_free(filename);
334 } else {
335 bios_size = -1;
336 }
337
338 if ((bios_size < 0 || bios_size > BIOS_SIZE) &&
339 !kernel_filename && !qtest_enabled()) {
340 error_report("Could not load MIPS bios '%s'", bios_name);
341 exit(1);
342 }
343 }
344
345 /* Init internal devices */
346 cpu_mips_irq_init_cpu(env);
347 cpu_mips_clock_init(env);
348
349 /* North bridge, Bonito --> IP2 */
350 pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
351
352 /* South bridge */
353 ide_drive_get(hd, ARRAY_SIZE(hd));
354
355 isa_bus = vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 0));
356 if (!isa_bus) {
357 fprintf(stderr, "vt82c686b_init error\n");
358 exit(1);
359 }
360
361 /* Interrupt controller */
362 /* The 8259 -> IP5 */
363 i8259 = i8259_init(isa_bus, env->irq[5]);
364 isa_bus_irqs(isa_bus, i8259);
365
366 vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(FULONG2E_VIA_SLOT, 1));
367 pci_create_simple(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 2),
368 "vt82c686b-usb-uhci");
369 pci_create_simple(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 3),
370 "vt82c686b-usb-uhci");
371
372 smbus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 4),
373 0xeee1, NULL);
374 /* TODO: Populate SPD eeprom data. */
375 smbus_eeprom_init(smbus, 1, eeprom_spd, sizeof(eeprom_spd));
376
377 /* init other devices */
378 pit = pit_init(isa_bus, 0x40, 0, NULL);
379 cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
380 DMA_init(0, cpu_exit_irq);
381
382 /* Super I/O */
383 isa_create_simple(isa_bus, "i8042");
384
385 rtc_init(isa_bus, 2000, NULL);
386
387 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
388 if (serial_hds[i]) {
389 serial_isa_init(isa_bus, i, serial_hds[i]);
390 }
391 }
392
393 if (parallel_hds[0]) {
394 parallel_init(isa_bus, 0, parallel_hds[0]);
395 }
396
397 /* Sound card */
398 audio_init(pci_bus);
399 /* Network card */
400 network_init(pci_bus);
401 }
402
403 static QEMUMachine mips_fulong2e_machine = {
404 .name = "fulong2e",
405 .desc = "Fulong 2e mini pc",
406 .init = mips_fulong2e_init,
407 };
408
409 static void mips_fulong2e_machine_init(void)
410 {
411 qemu_register_machine(&mips_fulong2e_machine);
412 }
413
414 machine_init(mips_fulong2e_machine_init);
QEMU Monitor Protocol