2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 /* define it to use liveness analysis (better code) */
26 #define USE_LIVENESS_ANALYSIS
27 #define USE_TCG_OPTIMIZATIONS
31 /* Define to jump the ELF file used to communicate with GDB. */
34 #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG)
35 /* define it to suppress various consistency checks (faster) */
39 #include "qemu-common.h"
40 #include "qemu/cache-utils.h"
41 #include "qemu/host-utils.h"
42 #include "qemu/timer.h"
44 /* Note: the long term plan is to reduce the dependancies on the QEMU
45 CPU definitions. Currently they are used for qemu_ld/st
47 #define NO_CPU_IO_DEFS
52 #if TCG_TARGET_REG_BITS == 64
53 # define ELF_CLASS ELFCLASS64
55 # define ELF_CLASS ELFCLASS32
57 #ifdef HOST_WORDS_BIGENDIAN
58 # define ELF_DATA ELFDATA2MSB
60 # define ELF_DATA ELFDATA2LSB
65 /* Forward declarations for functions declared in tcg-target.c and used here. */
66 static void tcg_target_init(TCGContext
*s
);
67 static void tcg_target_qemu_prologue(TCGContext
*s
);
68 static void patch_reloc(uint8_t *code_ptr
, int type
,
69 tcg_target_long value
, tcg_target_long addend
);
71 /* The CIE and FDE header definitions will be common to all hosts. */
73 uint32_t len
__attribute__((aligned((sizeof(void *)))));
79 uint8_t return_column
;
82 typedef struct QEMU_PACKED
{
83 uint32_t len
__attribute__((aligned((sizeof(void *)))));
85 tcg_target_long func_start
;
86 tcg_target_long func_len
;
87 } DebugFrameFDEHeader
;
89 static void tcg_register_jit_int(void *buf
, size_t size
,
90 void *debug_frame
, size_t debug_frame_size
)
91 __attribute__((unused
));
93 /* Forward declarations for functions declared and used in tcg-target.c. */
94 static int target_parse_constraint(TCGArgConstraint
*ct
, const char **pct_str
);
95 static void tcg_out_ld(TCGContext
*s
, TCGType type
, TCGReg ret
, TCGReg arg1
,
96 tcg_target_long arg2
);
97 static void tcg_out_mov(TCGContext
*s
, TCGType type
, TCGReg ret
, TCGReg arg
);
98 static void tcg_out_movi(TCGContext
*s
, TCGType type
,
99 TCGReg ret
, tcg_target_long arg
);
100 static void tcg_out_op(TCGContext
*s
, TCGOpcode opc
, const TCGArg
*args
,
101 const int *const_args
);
102 static void tcg_out_st(TCGContext
*s
, TCGType type
, TCGReg arg
, TCGReg arg1
,
103 tcg_target_long arg2
);
104 static int tcg_target_const_match(tcg_target_long val
,
105 const TCGArgConstraint
*arg_ct
);
107 TCGOpDef tcg_op_defs
[] = {
108 #define DEF(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags },
112 const size_t tcg_op_defs_max
= ARRAY_SIZE(tcg_op_defs
);
114 static TCGRegSet tcg_target_available_regs
[2];
115 static TCGRegSet tcg_target_call_clobber_regs
;
117 static inline void tcg_out8(TCGContext
*s
, uint8_t v
)
122 static inline void tcg_out16(TCGContext
*s
, uint16_t v
)
124 uint8_t *p
= s
->code_ptr
;
129 static inline void tcg_out32(TCGContext
*s
, uint32_t v
)
131 uint8_t *p
= s
->code_ptr
;
136 static inline void tcg_out64(TCGContext
*s
, uint64_t v
)
138 uint8_t *p
= s
->code_ptr
;
143 /* label relocation processing */
145 static void tcg_out_reloc(TCGContext
*s
, uint8_t *code_ptr
, int type
,
146 int label_index
, long addend
)
151 l
= &s
->labels
[label_index
];
153 /* FIXME: This may break relocations on RISC targets that
154 modify instruction fields in place. The caller may not have
155 written the initial value. */
156 patch_reloc(code_ptr
, type
, l
->u
.value
, addend
);
158 /* add a new relocation entry */
159 r
= tcg_malloc(sizeof(TCGRelocation
));
163 r
->next
= l
->u
.first_reloc
;
164 l
->u
.first_reloc
= r
;
168 static void tcg_out_label(TCGContext
*s
, int label_index
, void *ptr
)
172 tcg_target_long value
= (tcg_target_long
)ptr
;
174 l
= &s
->labels
[label_index
];
177 r
= l
->u
.first_reloc
;
179 patch_reloc(r
->ptr
, r
->type
, value
, r
->addend
);
186 int gen_new_label(void)
188 TCGContext
*s
= &tcg_ctx
;
192 if (s
->nb_labels
>= TCG_MAX_LABELS
)
194 idx
= s
->nb_labels
++;
197 l
->u
.first_reloc
= NULL
;
201 #include "tcg-target.c"
203 /* pool based memory allocation */
204 void *tcg_malloc_internal(TCGContext
*s
, int size
)
209 if (size
> TCG_POOL_CHUNK_SIZE
) {
210 /* big malloc: insert a new pool (XXX: could optimize) */
211 p
= g_malloc(sizeof(TCGPool
) + size
);
213 p
->next
= s
->pool_first_large
;
214 s
->pool_first_large
= p
;
225 pool_size
= TCG_POOL_CHUNK_SIZE
;
226 p
= g_malloc(sizeof(TCGPool
) + pool_size
);
230 s
->pool_current
->next
= p
;
239 s
->pool_cur
= p
->data
+ size
;
240 s
->pool_end
= p
->data
+ p
->size
;
244 void tcg_pool_reset(TCGContext
*s
)
247 for (p
= s
->pool_first_large
; p
; p
= t
) {
251 s
->pool_first_large
= NULL
;
252 s
->pool_cur
= s
->pool_end
= NULL
;
253 s
->pool_current
= NULL
;
256 void tcg_context_init(TCGContext
*s
)
258 int op
, total_args
, n
;
260 TCGArgConstraint
*args_ct
;
263 memset(s
, 0, sizeof(*s
));
266 /* Count total number of arguments and allocate the corresponding
269 for(op
= 0; op
< NB_OPS
; op
++) {
270 def
= &tcg_op_defs
[op
];
271 n
= def
->nb_iargs
+ def
->nb_oargs
;
275 args_ct
= g_malloc(sizeof(TCGArgConstraint
) * total_args
);
276 sorted_args
= g_malloc(sizeof(int) * total_args
);
278 for(op
= 0; op
< NB_OPS
; op
++) {
279 def
= &tcg_op_defs
[op
];
280 def
->args_ct
= args_ct
;
281 def
->sorted_args
= sorted_args
;
282 n
= def
->nb_iargs
+ def
->nb_oargs
;
290 void tcg_prologue_init(TCGContext
*s
)
292 /* init global prologue and epilogue */
293 s
->code_buf
= s
->code_gen_prologue
;
294 s
->code_ptr
= s
->code_buf
;
295 tcg_target_qemu_prologue(s
);
296 flush_icache_range((tcg_target_ulong
)s
->code_buf
,
297 (tcg_target_ulong
)s
->code_ptr
);
300 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM
)) {
301 size_t size
= s
->code_ptr
- s
->code_buf
;
302 qemu_log("PROLOGUE: [size=%zu]\n", size
);
303 log_disas(s
->code_buf
, size
);
310 void tcg_set_frame(TCGContext
*s
, int reg
,
311 tcg_target_long start
, tcg_target_long size
)
313 s
->frame_start
= start
;
314 s
->frame_end
= start
+ size
;
318 void tcg_func_start(TCGContext
*s
)
322 s
->nb_temps
= s
->nb_globals
;
323 for(i
= 0; i
< (TCG_TYPE_COUNT
* 2); i
++)
324 s
->first_free_temp
[i
] = -1;
325 s
->labels
= tcg_malloc(sizeof(TCGLabel
) * TCG_MAX_LABELS
);
327 s
->current_frame_offset
= s
->frame_start
;
329 #ifdef CONFIG_DEBUG_TCG
330 s
->goto_tb_issue_mask
= 0;
333 s
->gen_opc_ptr
= s
->gen_opc_buf
;
334 s
->gen_opparam_ptr
= s
->gen_opparam_buf
;
336 #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
337 /* Initialize qemu_ld/st labels to assist code generation at the end of TB
338 for TLB miss cases at the end of TB */
339 s
->qemu_ldst_labels
= tcg_malloc(sizeof(TCGLabelQemuLdst
) *
341 s
->nb_qemu_ldst_labels
= 0;
345 static inline void tcg_temp_alloc(TCGContext
*s
, int n
)
347 if (n
> TCG_MAX_TEMPS
)
351 static inline int tcg_global_reg_new_internal(TCGType type
, int reg
,
354 TCGContext
*s
= &tcg_ctx
;
358 #if TCG_TARGET_REG_BITS == 32
359 if (type
!= TCG_TYPE_I32
)
362 if (tcg_regset_test_reg(s
->reserved_regs
, reg
))
365 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
366 ts
= &s
->temps
[s
->nb_globals
];
367 ts
->base_type
= type
;
373 tcg_regset_set_reg(s
->reserved_regs
, reg
);
377 TCGv_i32
tcg_global_reg_new_i32(int reg
, const char *name
)
381 idx
= tcg_global_reg_new_internal(TCG_TYPE_I32
, reg
, name
);
382 return MAKE_TCGV_I32(idx
);
385 TCGv_i64
tcg_global_reg_new_i64(int reg
, const char *name
)
389 idx
= tcg_global_reg_new_internal(TCG_TYPE_I64
, reg
, name
);
390 return MAKE_TCGV_I64(idx
);
393 static inline int tcg_global_mem_new_internal(TCGType type
, int reg
,
394 tcg_target_long offset
,
397 TCGContext
*s
= &tcg_ctx
;
402 #if TCG_TARGET_REG_BITS == 32
403 if (type
== TCG_TYPE_I64
) {
405 tcg_temp_alloc(s
, s
->nb_globals
+ 2);
406 ts
= &s
->temps
[s
->nb_globals
];
407 ts
->base_type
= type
;
408 ts
->type
= TCG_TYPE_I32
;
410 ts
->mem_allocated
= 1;
412 #ifdef TCG_TARGET_WORDS_BIGENDIAN
413 ts
->mem_offset
= offset
+ 4;
415 ts
->mem_offset
= offset
;
417 pstrcpy(buf
, sizeof(buf
), name
);
418 pstrcat(buf
, sizeof(buf
), "_0");
419 ts
->name
= strdup(buf
);
422 ts
->base_type
= type
;
423 ts
->type
= TCG_TYPE_I32
;
425 ts
->mem_allocated
= 1;
427 #ifdef TCG_TARGET_WORDS_BIGENDIAN
428 ts
->mem_offset
= offset
;
430 ts
->mem_offset
= offset
+ 4;
432 pstrcpy(buf
, sizeof(buf
), name
);
433 pstrcat(buf
, sizeof(buf
), "_1");
434 ts
->name
= strdup(buf
);
440 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
441 ts
= &s
->temps
[s
->nb_globals
];
442 ts
->base_type
= type
;
445 ts
->mem_allocated
= 1;
447 ts
->mem_offset
= offset
;
454 TCGv_i32
tcg_global_mem_new_i32(int reg
, tcg_target_long offset
,
459 idx
= tcg_global_mem_new_internal(TCG_TYPE_I32
, reg
, offset
, name
);
460 return MAKE_TCGV_I32(idx
);
463 TCGv_i64
tcg_global_mem_new_i64(int reg
, tcg_target_long offset
,
468 idx
= tcg_global_mem_new_internal(TCG_TYPE_I64
, reg
, offset
, name
);
469 return MAKE_TCGV_I64(idx
);
472 static inline int tcg_temp_new_internal(TCGType type
, int temp_local
)
474 TCGContext
*s
= &tcg_ctx
;
481 idx
= s
->first_free_temp
[k
];
483 /* There is already an available temp with the
486 s
->first_free_temp
[k
] = ts
->next_free_temp
;
487 ts
->temp_allocated
= 1;
488 assert(ts
->temp_local
== temp_local
);
491 #if TCG_TARGET_REG_BITS == 32
492 if (type
== TCG_TYPE_I64
) {
493 tcg_temp_alloc(s
, s
->nb_temps
+ 2);
494 ts
= &s
->temps
[s
->nb_temps
];
495 ts
->base_type
= type
;
496 ts
->type
= TCG_TYPE_I32
;
497 ts
->temp_allocated
= 1;
498 ts
->temp_local
= temp_local
;
501 ts
->base_type
= TCG_TYPE_I32
;
502 ts
->type
= TCG_TYPE_I32
;
503 ts
->temp_allocated
= 1;
504 ts
->temp_local
= temp_local
;
510 tcg_temp_alloc(s
, s
->nb_temps
+ 1);
511 ts
= &s
->temps
[s
->nb_temps
];
512 ts
->base_type
= type
;
514 ts
->temp_allocated
= 1;
515 ts
->temp_local
= temp_local
;
521 #if defined(CONFIG_DEBUG_TCG)
527 TCGv_i32
tcg_temp_new_internal_i32(int temp_local
)
531 idx
= tcg_temp_new_internal(TCG_TYPE_I32
, temp_local
);
532 return MAKE_TCGV_I32(idx
);
535 TCGv_i64
tcg_temp_new_internal_i64(int temp_local
)
539 idx
= tcg_temp_new_internal(TCG_TYPE_I64
, temp_local
);
540 return MAKE_TCGV_I64(idx
);
543 static inline void tcg_temp_free_internal(int idx
)
545 TCGContext
*s
= &tcg_ctx
;
549 #if defined(CONFIG_DEBUG_TCG)
551 if (s
->temps_in_use
< 0) {
552 fprintf(stderr
, "More temporaries freed than allocated!\n");
556 assert(idx
>= s
->nb_globals
&& idx
< s
->nb_temps
);
558 assert(ts
->temp_allocated
!= 0);
559 ts
->temp_allocated
= 0;
563 ts
->next_free_temp
= s
->first_free_temp
[k
];
564 s
->first_free_temp
[k
] = idx
;
567 void tcg_temp_free_i32(TCGv_i32 arg
)
569 tcg_temp_free_internal(GET_TCGV_I32(arg
));
572 void tcg_temp_free_i64(TCGv_i64 arg
)
574 tcg_temp_free_internal(GET_TCGV_I64(arg
));
577 TCGv_i32
tcg_const_i32(int32_t val
)
580 t0
= tcg_temp_new_i32();
581 tcg_gen_movi_i32(t0
, val
);
585 TCGv_i64
tcg_const_i64(int64_t val
)
588 t0
= tcg_temp_new_i64();
589 tcg_gen_movi_i64(t0
, val
);
593 TCGv_i32
tcg_const_local_i32(int32_t val
)
596 t0
= tcg_temp_local_new_i32();
597 tcg_gen_movi_i32(t0
, val
);
601 TCGv_i64
tcg_const_local_i64(int64_t val
)
604 t0
= tcg_temp_local_new_i64();
605 tcg_gen_movi_i64(t0
, val
);
609 #if defined(CONFIG_DEBUG_TCG)
610 void tcg_clear_temp_count(void)
612 TCGContext
*s
= &tcg_ctx
;
616 int tcg_check_temp_count(void)
618 TCGContext
*s
= &tcg_ctx
;
619 if (s
->temps_in_use
) {
620 /* Clear the count so that we don't give another
621 * warning immediately next time around.
630 void tcg_register_helper(void *func
, const char *name
)
632 TCGContext
*s
= &tcg_ctx
;
634 if ((s
->nb_helpers
+ 1) > s
->allocated_helpers
) {
635 n
= s
->allocated_helpers
;
641 s
->helpers
= realloc(s
->helpers
, n
* sizeof(TCGHelperInfo
));
642 s
->allocated_helpers
= n
;
644 s
->helpers
[s
->nb_helpers
].func
= (tcg_target_ulong
)func
;
645 s
->helpers
[s
->nb_helpers
].name
= name
;
649 /* Note: we convert the 64 bit args to 32 bit and do some alignment
650 and endian swap. Maybe it would be better to do the alignment
651 and endian swap in tcg_reg_alloc_call(). */
652 void tcg_gen_callN(TCGContext
*s
, TCGv_ptr func
, unsigned int flags
,
653 int sizemask
, TCGArg ret
, int nargs
, TCGArg
*args
)
660 #if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
661 for (i
= 0; i
< nargs
; ++i
) {
662 int is_64bit
= sizemask
& (1 << (i
+1)*2);
663 int is_signed
= sizemask
& (2 << (i
+1)*2);
665 TCGv_i64 temp
= tcg_temp_new_i64();
666 TCGv_i64 orig
= MAKE_TCGV_I64(args
[i
]);
668 tcg_gen_ext32s_i64(temp
, orig
);
670 tcg_gen_ext32u_i64(temp
, orig
);
672 args
[i
] = GET_TCGV_I64(temp
);
675 #endif /* TCG_TARGET_EXTEND_ARGS */
677 *s
->gen_opc_ptr
++ = INDEX_op_call
;
678 nparam
= s
->gen_opparam_ptr
++;
679 if (ret
!= TCG_CALL_DUMMY_ARG
) {
680 #if TCG_TARGET_REG_BITS < 64
682 #ifdef TCG_TARGET_WORDS_BIGENDIAN
683 *s
->gen_opparam_ptr
++ = ret
+ 1;
684 *s
->gen_opparam_ptr
++ = ret
;
686 *s
->gen_opparam_ptr
++ = ret
;
687 *s
->gen_opparam_ptr
++ = ret
+ 1;
693 *s
->gen_opparam_ptr
++ = ret
;
700 for (i
= 0; i
< nargs
; i
++) {
701 #if TCG_TARGET_REG_BITS < 64
702 int is_64bit
= sizemask
& (1 << (i
+1)*2);
704 #ifdef TCG_TARGET_CALL_ALIGN_ARGS
705 /* some targets want aligned 64 bit args */
707 *s
->gen_opparam_ptr
++ = TCG_CALL_DUMMY_ARG
;
711 /* If stack grows up, then we will be placing successive
712 arguments at lower addresses, which means we need to
713 reverse the order compared to how we would normally
714 treat either big or little-endian. For those arguments
715 that will wind up in registers, this still works for
716 HPPA (the only current STACK_GROWSUP target) since the
717 argument registers are *also* allocated in decreasing
718 order. If another such target is added, this logic may
719 have to get more complicated to differentiate between
720 stack arguments and register arguments. */
721 #if defined(TCG_TARGET_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP)
722 *s
->gen_opparam_ptr
++ = args
[i
] + 1;
723 *s
->gen_opparam_ptr
++ = args
[i
];
725 *s
->gen_opparam_ptr
++ = args
[i
];
726 *s
->gen_opparam_ptr
++ = args
[i
] + 1;
731 #endif /* TCG_TARGET_REG_BITS < 64 */
733 *s
->gen_opparam_ptr
++ = args
[i
];
736 *s
->gen_opparam_ptr
++ = GET_TCGV_PTR(func
);
738 *s
->gen_opparam_ptr
++ = flags
;
740 *nparam
= (nb_rets
<< 16) | (real_args
+ 1);
742 /* total parameters, needed to go backward in the instruction stream */
743 *s
->gen_opparam_ptr
++ = 1 + nb_rets
+ real_args
+ 3;
745 #if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
746 for (i
= 0; i
< nargs
; ++i
) {
747 int is_64bit
= sizemask
& (1 << (i
+1)*2);
749 TCGv_i64 temp
= MAKE_TCGV_I64(args
[i
]);
750 tcg_temp_free_i64(temp
);
753 #endif /* TCG_TARGET_EXTEND_ARGS */
756 #if TCG_TARGET_REG_BITS == 32
757 void tcg_gen_shifti_i64(TCGv_i64 ret
, TCGv_i64 arg1
,
758 int c
, int right
, int arith
)
761 tcg_gen_mov_i32(TCGV_LOW(ret
), TCGV_LOW(arg1
));
762 tcg_gen_mov_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
));
763 } else if (c
>= 32) {
767 tcg_gen_sari_i32(TCGV_LOW(ret
), TCGV_HIGH(arg1
), c
);
768 tcg_gen_sari_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), 31);
770 tcg_gen_shri_i32(TCGV_LOW(ret
), TCGV_HIGH(arg1
), c
);
771 tcg_gen_movi_i32(TCGV_HIGH(ret
), 0);
774 tcg_gen_shli_i32(TCGV_HIGH(ret
), TCGV_LOW(arg1
), c
);
775 tcg_gen_movi_i32(TCGV_LOW(ret
), 0);
780 t0
= tcg_temp_new_i32();
781 t1
= tcg_temp_new_i32();
783 tcg_gen_shli_i32(t0
, TCGV_HIGH(arg1
), 32 - c
);
785 tcg_gen_sari_i32(t1
, TCGV_HIGH(arg1
), c
);
787 tcg_gen_shri_i32(t1
, TCGV_HIGH(arg1
), c
);
788 tcg_gen_shri_i32(TCGV_LOW(ret
), TCGV_LOW(arg1
), c
);
789 tcg_gen_or_i32(TCGV_LOW(ret
), TCGV_LOW(ret
), t0
);
790 tcg_gen_mov_i32(TCGV_HIGH(ret
), t1
);
792 tcg_gen_shri_i32(t0
, TCGV_LOW(arg1
), 32 - c
);
793 /* Note: ret can be the same as arg1, so we use t1 */
794 tcg_gen_shli_i32(t1
, TCGV_LOW(arg1
), c
);
795 tcg_gen_shli_i32(TCGV_HIGH(ret
), TCGV_HIGH(arg1
), c
);
796 tcg_gen_or_i32(TCGV_HIGH(ret
), TCGV_HIGH(ret
), t0
);
797 tcg_gen_mov_i32(TCGV_LOW(ret
), t1
);
799 tcg_temp_free_i32(t0
);
800 tcg_temp_free_i32(t1
);
806 static void tcg_reg_alloc_start(TCGContext
*s
)
810 for(i
= 0; i
< s
->nb_globals
; i
++) {
813 ts
->val_type
= TEMP_VAL_REG
;
815 ts
->val_type
= TEMP_VAL_MEM
;
818 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
820 if (ts
->temp_local
) {
821 ts
->val_type
= TEMP_VAL_MEM
;
823 ts
->val_type
= TEMP_VAL_DEAD
;
825 ts
->mem_allocated
= 0;
828 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
829 s
->reg_to_temp
[i
] = -1;
833 static char *tcg_get_arg_str_idx(TCGContext
*s
, char *buf
, int buf_size
,
838 assert(idx
>= 0 && idx
< s
->nb_temps
);
840 if (idx
< s
->nb_globals
) {
841 pstrcpy(buf
, buf_size
, ts
->name
);
844 snprintf(buf
, buf_size
, "loc%d", idx
- s
->nb_globals
);
846 snprintf(buf
, buf_size
, "tmp%d", idx
- s
->nb_globals
);
851 char *tcg_get_arg_str_i32(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i32 arg
)
853 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV_I32(arg
));
856 char *tcg_get_arg_str_i64(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i64 arg
)
858 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV_I64(arg
));
861 static int helper_cmp(const void *p1
, const void *p2
)
863 const TCGHelperInfo
*th1
= p1
;
864 const TCGHelperInfo
*th2
= p2
;
865 if (th1
->func
< th2
->func
)
867 else if (th1
->func
== th2
->func
)
873 /* find helper definition (Note: A hash table would be better) */
874 static TCGHelperInfo
*tcg_find_helper(TCGContext
*s
, tcg_target_ulong val
)
880 if (unlikely(!s
->helpers_sorted
)) {
881 qsort(s
->helpers
, s
->nb_helpers
, sizeof(TCGHelperInfo
),
883 s
->helpers_sorted
= 1;
888 m_max
= s
->nb_helpers
- 1;
889 while (m_min
<= m_max
) {
890 m
= (m_min
+ m_max
) >> 1;
904 static const char * const cond_name
[] =
906 [TCG_COND_NEVER
] = "never",
907 [TCG_COND_ALWAYS
] = "always",
908 [TCG_COND_EQ
] = "eq",
909 [TCG_COND_NE
] = "ne",
910 [TCG_COND_LT
] = "lt",
911 [TCG_COND_GE
] = "ge",
912 [TCG_COND_LE
] = "le",
913 [TCG_COND_GT
] = "gt",
914 [TCG_COND_LTU
] = "ltu",
915 [TCG_COND_GEU
] = "geu",
916 [TCG_COND_LEU
] = "leu",
917 [TCG_COND_GTU
] = "gtu"
920 void tcg_dump_ops(TCGContext
*s
)
922 const uint16_t *opc_ptr
;
926 int i
, k
, nb_oargs
, nb_iargs
, nb_cargs
, first_insn
;
931 opc_ptr
= s
->gen_opc_buf
;
932 args
= s
->gen_opparam_buf
;
933 while (opc_ptr
< s
->gen_opc_ptr
) {
935 def
= &tcg_op_defs
[c
];
936 if (c
== INDEX_op_debug_insn_start
) {
938 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
939 pc
= ((uint64_t)args
[1] << 32) | args
[0];
946 qemu_log(" ---- 0x%" PRIx64
, pc
);
948 nb_oargs
= def
->nb_oargs
;
949 nb_iargs
= def
->nb_iargs
;
950 nb_cargs
= def
->nb_cargs
;
951 } else if (c
== INDEX_op_call
) {
954 /* variable number of arguments */
956 nb_oargs
= arg
>> 16;
957 nb_iargs
= arg
& 0xffff;
958 nb_cargs
= def
->nb_cargs
;
960 qemu_log(" %s ", def
->name
);
964 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
965 args
[nb_oargs
+ nb_iargs
- 1]));
967 qemu_log(",$0x%" TCG_PRIlx
, args
[nb_oargs
+ nb_iargs
]);
969 qemu_log(",$%d", nb_oargs
);
970 for(i
= 0; i
< nb_oargs
; i
++) {
972 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
975 for(i
= 0; i
< (nb_iargs
- 1); i
++) {
977 if (args
[nb_oargs
+ i
] == TCG_CALL_DUMMY_ARG
) {
980 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
981 args
[nb_oargs
+ i
]));
984 } else if (c
== INDEX_op_movi_i32
|| c
== INDEX_op_movi_i64
) {
985 tcg_target_ulong val
;
988 nb_oargs
= def
->nb_oargs
;
989 nb_iargs
= def
->nb_iargs
;
990 nb_cargs
= def
->nb_cargs
;
991 qemu_log(" %s %s,$", def
->name
,
992 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), args
[0]));
994 th
= tcg_find_helper(s
, val
);
996 qemu_log("%s", th
->name
);
998 if (c
== INDEX_op_movi_i32
) {
999 qemu_log("0x%x", (uint32_t)val
);
1001 qemu_log("0x%" PRIx64
, (uint64_t)val
);
1005 qemu_log(" %s ", def
->name
);
1006 if (c
== INDEX_op_nopn
) {
1007 /* variable number of arguments */
1012 nb_oargs
= def
->nb_oargs
;
1013 nb_iargs
= def
->nb_iargs
;
1014 nb_cargs
= def
->nb_cargs
;
1018 for(i
= 0; i
< nb_oargs
; i
++) {
1022 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
1025 for(i
= 0; i
< nb_iargs
; i
++) {
1029 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
1033 case INDEX_op_brcond_i32
:
1034 case INDEX_op_setcond_i32
:
1035 case INDEX_op_movcond_i32
:
1036 case INDEX_op_brcond2_i32
:
1037 case INDEX_op_setcond2_i32
:
1038 case INDEX_op_brcond_i64
:
1039 case INDEX_op_setcond_i64
:
1040 case INDEX_op_movcond_i64
:
1041 if (args
[k
] < ARRAY_SIZE(cond_name
) && cond_name
[args
[k
]]) {
1042 qemu_log(",%s", cond_name
[args
[k
++]]);
1044 qemu_log(",$0x%" TCG_PRIlx
, args
[k
++]);
1052 for(; i
< nb_cargs
; i
++) {
1057 qemu_log("$0x%" TCG_PRIlx
, arg
);
1061 args
+= nb_iargs
+ nb_oargs
+ nb_cargs
;
1065 /* we give more priority to constraints with less registers */
1066 static int get_constraint_priority(const TCGOpDef
*def
, int k
)
1068 const TCGArgConstraint
*arg_ct
;
1071 arg_ct
= &def
->args_ct
[k
];
1072 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
1073 /* an alias is equivalent to a single register */
1076 if (!(arg_ct
->ct
& TCG_CT_REG
))
1079 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1080 if (tcg_regset_test_reg(arg_ct
->u
.regs
, i
))
1084 return TCG_TARGET_NB_REGS
- n
+ 1;
1087 /* sort from highest priority to lowest */
1088 static void sort_constraints(TCGOpDef
*def
, int start
, int n
)
1090 int i
, j
, p1
, p2
, tmp
;
1092 for(i
= 0; i
< n
; i
++)
1093 def
->sorted_args
[start
+ i
] = start
+ i
;
1096 for(i
= 0; i
< n
- 1; i
++) {
1097 for(j
= i
+ 1; j
< n
; j
++) {
1098 p1
= get_constraint_priority(def
, def
->sorted_args
[start
+ i
]);
1099 p2
= get_constraint_priority(def
, def
->sorted_args
[start
+ j
]);
1101 tmp
= def
->sorted_args
[start
+ i
];
1102 def
->sorted_args
[start
+ i
] = def
->sorted_args
[start
+ j
];
1103 def
->sorted_args
[start
+ j
] = tmp
;
1109 void tcg_add_target_add_op_defs(const TCGTargetOpDef
*tdefs
)
1117 if (tdefs
->op
== (TCGOpcode
)-1)
1120 assert((unsigned)op
< NB_OPS
);
1121 def
= &tcg_op_defs
[op
];
1122 #if defined(CONFIG_DEBUG_TCG)
1123 /* Duplicate entry in op definitions? */
1127 nb_args
= def
->nb_iargs
+ def
->nb_oargs
;
1128 for(i
= 0; i
< nb_args
; i
++) {
1129 ct_str
= tdefs
->args_ct_str
[i
];
1130 /* Incomplete TCGTargetOpDef entry? */
1131 assert(ct_str
!= NULL
);
1132 tcg_regset_clear(def
->args_ct
[i
].u
.regs
);
1133 def
->args_ct
[i
].ct
= 0;
1134 if (ct_str
[0] >= '0' && ct_str
[0] <= '9') {
1136 oarg
= ct_str
[0] - '0';
1137 assert(oarg
< def
->nb_oargs
);
1138 assert(def
->args_ct
[oarg
].ct
& TCG_CT_REG
);
1139 /* TCG_CT_ALIAS is for the output arguments. The input
1140 argument is tagged with TCG_CT_IALIAS. */
1141 def
->args_ct
[i
] = def
->args_ct
[oarg
];
1142 def
->args_ct
[oarg
].ct
= TCG_CT_ALIAS
;
1143 def
->args_ct
[oarg
].alias_index
= i
;
1144 def
->args_ct
[i
].ct
|= TCG_CT_IALIAS
;
1145 def
->args_ct
[i
].alias_index
= oarg
;
1148 if (*ct_str
== '\0')
1152 def
->args_ct
[i
].ct
|= TCG_CT_CONST
;
1156 if (target_parse_constraint(&def
->args_ct
[i
], &ct_str
) < 0) {
1157 fprintf(stderr
, "Invalid constraint '%s' for arg %d of operation '%s'\n",
1158 ct_str
, i
, def
->name
);
1166 /* TCGTargetOpDef entry with too much information? */
1167 assert(i
== TCG_MAX_OP_ARGS
|| tdefs
->args_ct_str
[i
] == NULL
);
1169 /* sort the constraints (XXX: this is just an heuristic) */
1170 sort_constraints(def
, 0, def
->nb_oargs
);
1171 sort_constraints(def
, def
->nb_oargs
, def
->nb_iargs
);
1177 printf("%s: sorted=", def
->name
);
1178 for(i
= 0; i
< def
->nb_oargs
+ def
->nb_iargs
; i
++)
1179 printf(" %d", def
->sorted_args
[i
]);
1186 #if defined(CONFIG_DEBUG_TCG)
1188 for (op
= 0; op
< ARRAY_SIZE(tcg_op_defs
); op
++) {
1189 const TCGOpDef
*def
= &tcg_op_defs
[op
];
1190 if (def
->flags
& TCG_OPF_NOT_PRESENT
) {
1191 /* Wrong entry in op definitions? */
1193 fprintf(stderr
, "Invalid op definition for %s\n", def
->name
);
1197 /* Missing entry in op definitions? */
1199 fprintf(stderr
, "Missing op definition for %s\n", def
->name
);
1210 #ifdef USE_LIVENESS_ANALYSIS
1212 /* set a nop for an operation using 'nb_args' */
1213 static inline void tcg_set_nop(TCGContext
*s
, uint16_t *opc_ptr
,
1214 TCGArg
*args
, int nb_args
)
1217 *opc_ptr
= INDEX_op_nop
;
1219 *opc_ptr
= INDEX_op_nopn
;
1221 args
[nb_args
- 1] = nb_args
;
1225 /* liveness analysis: end of function: all temps are dead, and globals
1226 should be in memory. */
1227 static inline void tcg_la_func_end(TCGContext
*s
, uint8_t *dead_temps
,
1230 memset(dead_temps
, 1, s
->nb_temps
);
1231 memset(mem_temps
, 1, s
->nb_globals
);
1232 memset(mem_temps
+ s
->nb_globals
, 0, s
->nb_temps
- s
->nb_globals
);
1235 /* liveness analysis: end of basic block: all temps are dead, globals
1236 and local temps should be in memory. */
1237 static inline void tcg_la_bb_end(TCGContext
*s
, uint8_t *dead_temps
,
1242 memset(dead_temps
, 1, s
->nb_temps
);
1243 memset(mem_temps
, 1, s
->nb_globals
);
1244 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1245 mem_temps
[i
] = s
->temps
[i
].temp_local
;
1249 /* Liveness analysis : update the opc_dead_args array to tell if a
1250 given input arguments is dead. Instructions updating dead
1251 temporaries are removed. */
1252 static void tcg_liveness_analysis(TCGContext
*s
)
1254 int i
, op_index
, nb_args
, nb_iargs
, nb_oargs
, arg
, nb_ops
;
1255 TCGOpcode op
, op_new
;
1257 const TCGOpDef
*def
;
1258 uint8_t *dead_temps
, *mem_temps
;
1262 s
->gen_opc_ptr
++; /* skip end */
1264 nb_ops
= s
->gen_opc_ptr
- s
->gen_opc_buf
;
1266 s
->op_dead_args
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1267 s
->op_sync_args
= tcg_malloc(nb_ops
* sizeof(uint8_t));
1269 dead_temps
= tcg_malloc(s
->nb_temps
);
1270 mem_temps
= tcg_malloc(s
->nb_temps
);
1271 tcg_la_func_end(s
, dead_temps
, mem_temps
);
1273 args
= s
->gen_opparam_ptr
;
1274 op_index
= nb_ops
- 1;
1275 while (op_index
>= 0) {
1276 op
= s
->gen_opc_buf
[op_index
];
1277 def
= &tcg_op_defs
[op
];
1285 nb_iargs
= args
[0] & 0xffff;
1286 nb_oargs
= args
[0] >> 16;
1288 call_flags
= args
[nb_oargs
+ nb_iargs
];
1290 /* pure functions can be removed if their result is not
1292 if (call_flags
& TCG_CALL_NO_SIDE_EFFECTS
) {
1293 for(i
= 0; i
< nb_oargs
; i
++) {
1295 if (!dead_temps
[arg
] || mem_temps
[arg
]) {
1296 goto do_not_remove_call
;
1299 tcg_set_nop(s
, s
->gen_opc_buf
+ op_index
,
1304 /* output args are dead */
1307 for(i
= 0; i
< nb_oargs
; i
++) {
1309 if (dead_temps
[arg
]) {
1310 dead_args
|= (1 << i
);
1312 if (mem_temps
[arg
]) {
1313 sync_args
|= (1 << i
);
1315 dead_temps
[arg
] = 1;
1319 if (!(call_flags
& TCG_CALL_NO_READ_GLOBALS
)) {
1320 /* globals should be synced to memory */
1321 memset(mem_temps
, 1, s
->nb_globals
);
1323 if (!(call_flags
& (TCG_CALL_NO_WRITE_GLOBALS
|
1324 TCG_CALL_NO_READ_GLOBALS
))) {
1325 /* globals should go back to memory */
1326 memset(dead_temps
, 1, s
->nb_globals
);
1329 /* input args are live */
1330 for(i
= nb_oargs
; i
< nb_iargs
+ nb_oargs
; i
++) {
1332 if (arg
!= TCG_CALL_DUMMY_ARG
) {
1333 if (dead_temps
[arg
]) {
1334 dead_args
|= (1 << i
);
1336 dead_temps
[arg
] = 0;
1339 s
->op_dead_args
[op_index
] = dead_args
;
1340 s
->op_sync_args
[op_index
] = sync_args
;
1345 case INDEX_op_debug_insn_start
:
1346 args
-= def
->nb_args
;
1352 case INDEX_op_discard
:
1354 /* mark the temporary as dead */
1355 dead_temps
[args
[0]] = 1;
1356 mem_temps
[args
[0]] = 0;
1361 case INDEX_op_add2_i32
:
1362 op_new
= INDEX_op_add_i32
;
1364 case INDEX_op_sub2_i32
:
1365 op_new
= INDEX_op_sub_i32
;
1367 case INDEX_op_add2_i64
:
1368 op_new
= INDEX_op_add_i64
;
1370 case INDEX_op_sub2_i64
:
1371 op_new
= INDEX_op_sub_i64
;
1376 /* Test if the high part of the operation is dead, but not
1377 the low part. The result can be optimized to a simple
1378 add or sub. This happens often for x86_64 guest when the
1379 cpu mode is set to 32 bit. */
1380 if (dead_temps
[args
[1]] && !mem_temps
[args
[1]]) {
1381 if (dead_temps
[args
[0]] && !mem_temps
[args
[0]]) {
1384 /* Create the single operation plus nop. */
1385 s
->gen_opc_buf
[op_index
] = op
= op_new
;
1388 assert(s
->gen_opc_buf
[op_index
+ 1] == INDEX_op_nop
);
1389 tcg_set_nop(s
, s
->gen_opc_buf
+ op_index
+ 1, args
+ 3, 3);
1390 /* Fall through and mark the single-word operation live. */
1396 case INDEX_op_mulu2_i32
:
1397 case INDEX_op_muls2_i32
:
1398 op_new
= INDEX_op_mul_i32
;
1400 case INDEX_op_mulu2_i64
:
1401 case INDEX_op_muls2_i64
:
1402 op_new
= INDEX_op_mul_i64
;
1407 /* Likewise, test for the high part of the operation dead. */
1408 if (dead_temps
[args
[1]] && !mem_temps
[args
[1]]) {
1409 if (dead_temps
[args
[0]] && !mem_temps
[args
[0]]) {
1412 s
->gen_opc_buf
[op_index
] = op
= op_new
;
1415 assert(s
->gen_opc_buf
[op_index
+ 1] == INDEX_op_nop
);
1416 tcg_set_nop(s
, s
->gen_opc_buf
+ op_index
+ 1, args
+ 3, 1);
1417 /* Fall through and mark the single-word operation live. */
1423 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
1424 args
-= def
->nb_args
;
1425 nb_iargs
= def
->nb_iargs
;
1426 nb_oargs
= def
->nb_oargs
;
1428 /* Test if the operation can be removed because all
1429 its outputs are dead. We assume that nb_oargs == 0
1430 implies side effects */
1431 if (!(def
->flags
& TCG_OPF_SIDE_EFFECTS
) && nb_oargs
!= 0) {
1432 for(i
= 0; i
< nb_oargs
; i
++) {
1434 if (!dead_temps
[arg
] || mem_temps
[arg
]) {
1439 tcg_set_nop(s
, s
->gen_opc_buf
+ op_index
, args
, def
->nb_args
);
1440 #ifdef CONFIG_PROFILER
1446 /* output args are dead */
1449 for(i
= 0; i
< nb_oargs
; i
++) {
1451 if (dead_temps
[arg
]) {
1452 dead_args
|= (1 << i
);
1454 if (mem_temps
[arg
]) {
1455 sync_args
|= (1 << i
);
1457 dead_temps
[arg
] = 1;
1461 /* if end of basic block, update */
1462 if (def
->flags
& TCG_OPF_BB_END
) {
1463 tcg_la_bb_end(s
, dead_temps
, mem_temps
);
1464 } else if (def
->flags
& TCG_OPF_SIDE_EFFECTS
) {
1465 /* globals should be synced to memory */
1466 memset(mem_temps
, 1, s
->nb_globals
);
1469 /* input args are live */
1470 for(i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1472 if (dead_temps
[arg
]) {
1473 dead_args
|= (1 << i
);
1475 dead_temps
[arg
] = 0;
1477 s
->op_dead_args
[op_index
] = dead_args
;
1478 s
->op_sync_args
[op_index
] = sync_args
;
1485 if (args
!= s
->gen_opparam_buf
) {
1490 /* dummy liveness analysis */
1491 static void tcg_liveness_analysis(TCGContext
*s
)
1494 nb_ops
= s
->gen_opc_ptr
- s
->gen_opc_buf
;
1496 s
->op_dead_args
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1497 memset(s
->op_dead_args
, 0, nb_ops
* sizeof(uint16_t));
1498 s
->op_sync_args
= tcg_malloc(nb_ops
* sizeof(uint8_t));
1499 memset(s
->op_sync_args
, 0, nb_ops
* sizeof(uint8_t));
1504 static void dump_regs(TCGContext
*s
)
1510 for(i
= 0; i
< s
->nb_temps
; i
++) {
1512 printf(" %10s: ", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), i
));
1513 switch(ts
->val_type
) {
1515 printf("%s", tcg_target_reg_names
[ts
->reg
]);
1518 printf("%d(%s)", (int)ts
->mem_offset
, tcg_target_reg_names
[ts
->mem_reg
]);
1520 case TEMP_VAL_CONST
:
1521 printf("$0x%" TCG_PRIlx
, ts
->val
);
1533 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1534 if (s
->reg_to_temp
[i
] >= 0) {
1536 tcg_target_reg_names
[i
],
1537 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), s
->reg_to_temp
[i
]));
1542 static void check_regs(TCGContext
*s
)
1548 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1549 k
= s
->reg_to_temp
[reg
];
1552 if (ts
->val_type
!= TEMP_VAL_REG
||
1554 printf("Inconsistency for register %s:\n",
1555 tcg_target_reg_names
[reg
]);
1560 for(k
= 0; k
< s
->nb_temps
; k
++) {
1562 if (ts
->val_type
== TEMP_VAL_REG
&&
1564 s
->reg_to_temp
[ts
->reg
] != k
) {
1565 printf("Inconsistency for temp %s:\n",
1566 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), k
));
1568 printf("reg state:\n");
1576 static void temp_allocate_frame(TCGContext
*s
, int temp
)
1579 ts
= &s
->temps
[temp
];
1580 #if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64)
1581 /* Sparc64 stack is accessed with offset of 2047 */
1582 s
->current_frame_offset
= (s
->current_frame_offset
+
1583 (tcg_target_long
)sizeof(tcg_target_long
) - 1) &
1584 ~(sizeof(tcg_target_long
) - 1);
1586 if (s
->current_frame_offset
+ (tcg_target_long
)sizeof(tcg_target_long
) >
1590 ts
->mem_offset
= s
->current_frame_offset
;
1591 ts
->mem_reg
= s
->frame_reg
;
1592 ts
->mem_allocated
= 1;
1593 s
->current_frame_offset
+= (tcg_target_long
)sizeof(tcg_target_long
);
1596 /* sync register 'reg' by saving it to the corresponding temporary */
1597 static inline void tcg_reg_sync(TCGContext
*s
, int reg
)
1602 temp
= s
->reg_to_temp
[reg
];
1603 ts
= &s
->temps
[temp
];
1604 assert(ts
->val_type
== TEMP_VAL_REG
);
1605 if (!ts
->mem_coherent
&& !ts
->fixed_reg
) {
1606 if (!ts
->mem_allocated
) {
1607 temp_allocate_frame(s
, temp
);
1609 tcg_out_st(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1611 ts
->mem_coherent
= 1;
1614 /* free register 'reg' by spilling the corresponding temporary if necessary */
1615 static void tcg_reg_free(TCGContext
*s
, int reg
)
1619 temp
= s
->reg_to_temp
[reg
];
1621 tcg_reg_sync(s
, reg
);
1622 s
->temps
[temp
].val_type
= TEMP_VAL_MEM
;
1623 s
->reg_to_temp
[reg
] = -1;
1627 /* Allocate a register belonging to reg1 & ~reg2 */
1628 static int tcg_reg_alloc(TCGContext
*s
, TCGRegSet reg1
, TCGRegSet reg2
)
1633 tcg_regset_andnot(reg_ct
, reg1
, reg2
);
1635 /* first try free registers */
1636 for(i
= 0; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); i
++) {
1637 reg
= tcg_target_reg_alloc_order
[i
];
1638 if (tcg_regset_test_reg(reg_ct
, reg
) && s
->reg_to_temp
[reg
] == -1)
1642 /* XXX: do better spill choice */
1643 for(i
= 0; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); i
++) {
1644 reg
= tcg_target_reg_alloc_order
[i
];
1645 if (tcg_regset_test_reg(reg_ct
, reg
)) {
1646 tcg_reg_free(s
, reg
);
1654 /* mark a temporary as dead. */
1655 static inline void temp_dead(TCGContext
*s
, int temp
)
1659 ts
= &s
->temps
[temp
];
1660 if (!ts
->fixed_reg
) {
1661 if (ts
->val_type
== TEMP_VAL_REG
) {
1662 s
->reg_to_temp
[ts
->reg
] = -1;
1664 if (temp
< s
->nb_globals
|| ts
->temp_local
) {
1665 ts
->val_type
= TEMP_VAL_MEM
;
1667 ts
->val_type
= TEMP_VAL_DEAD
;
1672 /* sync a temporary to memory. 'allocated_regs' is used in case a
1673 temporary registers needs to be allocated to store a constant. */
1674 static inline void temp_sync(TCGContext
*s
, int temp
, TCGRegSet allocated_regs
)
1678 ts
= &s
->temps
[temp
];
1679 if (!ts
->fixed_reg
) {
1680 switch(ts
->val_type
) {
1681 case TEMP_VAL_CONST
:
1682 ts
->reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
1684 ts
->val_type
= TEMP_VAL_REG
;
1685 s
->reg_to_temp
[ts
->reg
] = temp
;
1686 ts
->mem_coherent
= 0;
1687 tcg_out_movi(s
, ts
->type
, ts
->reg
, ts
->val
);
1690 tcg_reg_sync(s
, ts
->reg
);
1701 /* save a temporary to memory. 'allocated_regs' is used in case a
1702 temporary registers needs to be allocated to store a constant. */
1703 static inline void temp_save(TCGContext
*s
, int temp
, TCGRegSet allocated_regs
)
1705 #ifdef USE_LIVENESS_ANALYSIS
1706 /* The liveness analysis already ensures that globals are back
1707 in memory. Keep an assert for safety. */
1708 assert(s
->temps
[temp
].val_type
== TEMP_VAL_MEM
|| s
->temps
[temp
].fixed_reg
);
1710 temp_sync(s
, temp
, allocated_regs
);
1715 /* save globals to their canonical location and assume they can be
1716 modified be the following code. 'allocated_regs' is used in case a
1717 temporary registers needs to be allocated to store a constant. */
1718 static void save_globals(TCGContext
*s
, TCGRegSet allocated_regs
)
1722 for(i
= 0; i
< s
->nb_globals
; i
++) {
1723 temp_save(s
, i
, allocated_regs
);
1727 /* sync globals to their canonical location and assume they can be
1728 read by the following code. 'allocated_regs' is used in case a
1729 temporary registers needs to be allocated to store a constant. */
1730 static void sync_globals(TCGContext
*s
, TCGRegSet allocated_regs
)
1734 for (i
= 0; i
< s
->nb_globals
; i
++) {
1735 #ifdef USE_LIVENESS_ANALYSIS
1736 assert(s
->temps
[i
].val_type
!= TEMP_VAL_REG
|| s
->temps
[i
].fixed_reg
||
1737 s
->temps
[i
].mem_coherent
);
1739 temp_sync(s
, i
, allocated_regs
);
1744 /* at the end of a basic block, we assume all temporaries are dead and
1745 all globals are stored at their canonical location. */
1746 static void tcg_reg_alloc_bb_end(TCGContext
*s
, TCGRegSet allocated_regs
)
1751 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1753 if (ts
->temp_local
) {
1754 temp_save(s
, i
, allocated_regs
);
1756 #ifdef USE_LIVENESS_ANALYSIS
1757 /* The liveness analysis already ensures that temps are dead.
1758 Keep an assert for safety. */
1759 assert(ts
->val_type
== TEMP_VAL_DEAD
);
1766 save_globals(s
, allocated_regs
);
1769 #define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1)
1770 #define NEED_SYNC_ARG(n) ((sync_args >> (n)) & 1)
1772 static void tcg_reg_alloc_movi(TCGContext
*s
, const TCGArg
*args
,
1773 uint16_t dead_args
, uint8_t sync_args
)
1776 tcg_target_ulong val
;
1778 ots
= &s
->temps
[args
[0]];
1781 if (ots
->fixed_reg
) {
1782 /* for fixed registers, we do not do any constant
1784 tcg_out_movi(s
, ots
->type
, ots
->reg
, val
);
1786 /* The movi is not explicitly generated here */
1787 if (ots
->val_type
== TEMP_VAL_REG
)
1788 s
->reg_to_temp
[ots
->reg
] = -1;
1789 ots
->val_type
= TEMP_VAL_CONST
;
1792 if (NEED_SYNC_ARG(0)) {
1793 temp_sync(s
, args
[0], s
->reserved_regs
);
1795 if (IS_DEAD_ARG(0)) {
1796 temp_dead(s
, args
[0]);
1800 static void tcg_reg_alloc_mov(TCGContext
*s
, const TCGOpDef
*def
,
1801 const TCGArg
*args
, uint16_t dead_args
,
1804 TCGRegSet allocated_regs
;
1806 const TCGArgConstraint
*arg_ct
, *oarg_ct
;
1808 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1809 ots
= &s
->temps
[args
[0]];
1810 ts
= &s
->temps
[args
[1]];
1811 oarg_ct
= &def
->args_ct
[0];
1812 arg_ct
= &def
->args_ct
[1];
1814 /* If the source value is not in a register, and we're going to be
1815 forced to have it in a register in order to perform the copy,
1816 then copy the SOURCE value into its own register first. That way
1817 we don't have to reload SOURCE the next time it is used. */
1818 if (((NEED_SYNC_ARG(0) || ots
->fixed_reg
) && ts
->val_type
!= TEMP_VAL_REG
)
1819 || ts
->val_type
== TEMP_VAL_MEM
) {
1820 ts
->reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1821 if (ts
->val_type
== TEMP_VAL_MEM
) {
1822 tcg_out_ld(s
, ts
->type
, ts
->reg
, ts
->mem_reg
, ts
->mem_offset
);
1823 ts
->mem_coherent
= 1;
1824 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1825 tcg_out_movi(s
, ts
->type
, ts
->reg
, ts
->val
);
1827 s
->reg_to_temp
[ts
->reg
] = args
[1];
1828 ts
->val_type
= TEMP_VAL_REG
;
1831 if (IS_DEAD_ARG(0) && !ots
->fixed_reg
) {
1832 /* mov to a non-saved dead register makes no sense (even with
1833 liveness analysis disabled). */
1834 assert(NEED_SYNC_ARG(0));
1835 /* The code above should have moved the temp to a register. */
1836 assert(ts
->val_type
== TEMP_VAL_REG
);
1837 if (!ots
->mem_allocated
) {
1838 temp_allocate_frame(s
, args
[0]);
1840 tcg_out_st(s
, ots
->type
, ts
->reg
, ots
->mem_reg
, ots
->mem_offset
);
1841 if (IS_DEAD_ARG(1)) {
1842 temp_dead(s
, args
[1]);
1844 temp_dead(s
, args
[0]);
1845 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1846 /* propagate constant */
1847 if (ots
->val_type
== TEMP_VAL_REG
) {
1848 s
->reg_to_temp
[ots
->reg
] = -1;
1850 ots
->val_type
= TEMP_VAL_CONST
;
1853 /* The code in the first if block should have moved the
1854 temp to a register. */
1855 assert(ts
->val_type
== TEMP_VAL_REG
);
1856 if (IS_DEAD_ARG(1) && !ts
->fixed_reg
&& !ots
->fixed_reg
) {
1857 /* the mov can be suppressed */
1858 if (ots
->val_type
== TEMP_VAL_REG
) {
1859 s
->reg_to_temp
[ots
->reg
] = -1;
1862 temp_dead(s
, args
[1]);
1864 if (ots
->val_type
!= TEMP_VAL_REG
) {
1865 /* When allocating a new register, make sure to not spill the
1867 tcg_regset_set_reg(allocated_regs
, ts
->reg
);
1868 ots
->reg
= tcg_reg_alloc(s
, oarg_ct
->u
.regs
, allocated_regs
);
1870 tcg_out_mov(s
, ots
->type
, ots
->reg
, ts
->reg
);
1872 ots
->val_type
= TEMP_VAL_REG
;
1873 ots
->mem_coherent
= 0;
1874 s
->reg_to_temp
[ots
->reg
] = args
[0];
1875 if (NEED_SYNC_ARG(0)) {
1876 tcg_reg_sync(s
, ots
->reg
);
1881 static void tcg_reg_alloc_op(TCGContext
*s
,
1882 const TCGOpDef
*def
, TCGOpcode opc
,
1883 const TCGArg
*args
, uint16_t dead_args
,
1886 TCGRegSet allocated_regs
;
1887 int i
, k
, nb_iargs
, nb_oargs
, reg
;
1889 const TCGArgConstraint
*arg_ct
;
1891 TCGArg new_args
[TCG_MAX_OP_ARGS
];
1892 int const_args
[TCG_MAX_OP_ARGS
];
1894 nb_oargs
= def
->nb_oargs
;
1895 nb_iargs
= def
->nb_iargs
;
1897 /* copy constants */
1898 memcpy(new_args
+ nb_oargs
+ nb_iargs
,
1899 args
+ nb_oargs
+ nb_iargs
,
1900 sizeof(TCGArg
) * def
->nb_cargs
);
1902 /* satisfy input constraints */
1903 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1904 for(k
= 0; k
< nb_iargs
; k
++) {
1905 i
= def
->sorted_args
[nb_oargs
+ k
];
1907 arg_ct
= &def
->args_ct
[i
];
1908 ts
= &s
->temps
[arg
];
1909 if (ts
->val_type
== TEMP_VAL_MEM
) {
1910 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1911 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1912 ts
->val_type
= TEMP_VAL_REG
;
1914 ts
->mem_coherent
= 1;
1915 s
->reg_to_temp
[reg
] = arg
;
1916 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1917 if (tcg_target_const_match(ts
->val
, arg_ct
)) {
1918 /* constant is OK for instruction */
1920 new_args
[i
] = ts
->val
;
1923 /* need to move to a register */
1924 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1925 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
1926 ts
->val_type
= TEMP_VAL_REG
;
1928 ts
->mem_coherent
= 0;
1929 s
->reg_to_temp
[reg
] = arg
;
1932 assert(ts
->val_type
== TEMP_VAL_REG
);
1933 if (arg_ct
->ct
& TCG_CT_IALIAS
) {
1934 if (ts
->fixed_reg
) {
1935 /* if fixed register, we must allocate a new register
1936 if the alias is not the same register */
1937 if (arg
!= args
[arg_ct
->alias_index
])
1938 goto allocate_in_reg
;
1940 /* if the input is aliased to an output and if it is
1941 not dead after the instruction, we must allocate
1942 a new register and move it */
1943 if (!IS_DEAD_ARG(i
)) {
1944 goto allocate_in_reg
;
1949 if (tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
1950 /* nothing to do : the constraint is satisfied */
1953 /* allocate a new register matching the constraint
1954 and move the temporary register into it */
1955 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1956 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
1960 tcg_regset_set_reg(allocated_regs
, reg
);
1964 /* mark dead temporaries and free the associated registers */
1965 for (i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1966 if (IS_DEAD_ARG(i
)) {
1967 temp_dead(s
, args
[i
]);
1971 if (def
->flags
& TCG_OPF_BB_END
) {
1972 tcg_reg_alloc_bb_end(s
, allocated_regs
);
1974 if (def
->flags
& TCG_OPF_CALL_CLOBBER
) {
1975 /* XXX: permit generic clobber register list ? */
1976 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1977 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
1978 tcg_reg_free(s
, reg
);
1982 if (def
->flags
& TCG_OPF_SIDE_EFFECTS
) {
1983 /* sync globals if the op has side effects and might trigger
1985 sync_globals(s
, allocated_regs
);
1988 /* satisfy the output constraints */
1989 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1990 for(k
= 0; k
< nb_oargs
; k
++) {
1991 i
= def
->sorted_args
[k
];
1993 arg_ct
= &def
->args_ct
[i
];
1994 ts
= &s
->temps
[arg
];
1995 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
1996 reg
= new_args
[arg_ct
->alias_index
];
1998 /* if fixed register, we try to use it */
2000 if (ts
->fixed_reg
&&
2001 tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
2004 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2006 tcg_regset_set_reg(allocated_regs
, reg
);
2007 /* if a fixed register is used, then a move will be done afterwards */
2008 if (!ts
->fixed_reg
) {
2009 if (ts
->val_type
== TEMP_VAL_REG
) {
2010 s
->reg_to_temp
[ts
->reg
] = -1;
2012 ts
->val_type
= TEMP_VAL_REG
;
2014 /* temp value is modified, so the value kept in memory is
2015 potentially not the same */
2016 ts
->mem_coherent
= 0;
2017 s
->reg_to_temp
[reg
] = arg
;
2024 /* emit instruction */
2025 tcg_out_op(s
, opc
, new_args
, const_args
);
2027 /* move the outputs in the correct register if needed */
2028 for(i
= 0; i
< nb_oargs
; i
++) {
2029 ts
= &s
->temps
[args
[i
]];
2031 if (ts
->fixed_reg
&& ts
->reg
!= reg
) {
2032 tcg_out_mov(s
, ts
->type
, ts
->reg
, reg
);
2034 if (NEED_SYNC_ARG(i
)) {
2035 tcg_reg_sync(s
, reg
);
2037 if (IS_DEAD_ARG(i
)) {
2038 temp_dead(s
, args
[i
]);
2043 #ifdef TCG_TARGET_STACK_GROWSUP
2044 #define STACK_DIR(x) (-(x))
2046 #define STACK_DIR(x) (x)
2049 static int tcg_reg_alloc_call(TCGContext
*s
, const TCGOpDef
*def
,
2050 TCGOpcode opc
, const TCGArg
*args
,
2051 uint16_t dead_args
, uint8_t sync_args
)
2053 int nb_iargs
, nb_oargs
, flags
, nb_regs
, i
, reg
, nb_params
;
2054 TCGArg arg
, func_arg
;
2056 tcg_target_long stack_offset
, call_stack_size
, func_addr
;
2057 int const_func_arg
, allocate_args
;
2058 TCGRegSet allocated_regs
;
2059 const TCGArgConstraint
*arg_ct
;
2063 nb_oargs
= arg
>> 16;
2064 nb_iargs
= arg
& 0xffff;
2065 nb_params
= nb_iargs
- 1;
2067 flags
= args
[nb_oargs
+ nb_iargs
];
2069 nb_regs
= ARRAY_SIZE(tcg_target_call_iarg_regs
);
2070 if (nb_regs
> nb_params
)
2071 nb_regs
= nb_params
;
2073 /* assign stack slots first */
2074 call_stack_size
= (nb_params
- nb_regs
) * sizeof(tcg_target_long
);
2075 call_stack_size
= (call_stack_size
+ TCG_TARGET_STACK_ALIGN
- 1) &
2076 ~(TCG_TARGET_STACK_ALIGN
- 1);
2077 allocate_args
= (call_stack_size
> TCG_STATIC_CALL_ARGS_SIZE
);
2078 if (allocate_args
) {
2079 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed,
2080 preallocate call stack */
2084 stack_offset
= TCG_TARGET_CALL_STACK_OFFSET
;
2085 for(i
= nb_regs
; i
< nb_params
; i
++) {
2086 arg
= args
[nb_oargs
+ i
];
2087 #ifdef TCG_TARGET_STACK_GROWSUP
2088 stack_offset
-= sizeof(tcg_target_long
);
2090 if (arg
!= TCG_CALL_DUMMY_ARG
) {
2091 ts
= &s
->temps
[arg
];
2092 if (ts
->val_type
== TEMP_VAL_REG
) {
2093 tcg_out_st(s
, ts
->type
, ts
->reg
, TCG_REG_CALL_STACK
, stack_offset
);
2094 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
2095 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
2097 /* XXX: not correct if reading values from the stack */
2098 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
2099 tcg_out_st(s
, ts
->type
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
2100 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2101 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
2103 /* XXX: sign extend may be needed on some targets */
2104 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
2105 tcg_out_st(s
, ts
->type
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
2110 #ifndef TCG_TARGET_STACK_GROWSUP
2111 stack_offset
+= sizeof(tcg_target_long
);
2115 /* assign input registers */
2116 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
2117 for(i
= 0; i
< nb_regs
; i
++) {
2118 arg
= args
[nb_oargs
+ i
];
2119 if (arg
!= TCG_CALL_DUMMY_ARG
) {
2120 ts
= &s
->temps
[arg
];
2121 reg
= tcg_target_call_iarg_regs
[i
];
2122 tcg_reg_free(s
, reg
);
2123 if (ts
->val_type
== TEMP_VAL_REG
) {
2124 if (ts
->reg
!= reg
) {
2125 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
2127 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
2128 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
2129 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2130 /* XXX: sign extend ? */
2131 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
2135 tcg_regset_set_reg(allocated_regs
, reg
);
2139 /* assign function address */
2140 func_arg
= args
[nb_oargs
+ nb_iargs
- 1];
2141 arg_ct
= &def
->args_ct
[0];
2142 ts
= &s
->temps
[func_arg
];
2143 func_addr
= ts
->val
;
2145 if (ts
->val_type
== TEMP_VAL_MEM
) {
2146 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2147 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
2149 tcg_regset_set_reg(allocated_regs
, reg
);
2150 } else if (ts
->val_type
== TEMP_VAL_REG
) {
2152 if (!tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
2153 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2154 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
2157 tcg_regset_set_reg(allocated_regs
, reg
);
2158 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2159 if (tcg_target_const_match(func_addr
, arg_ct
)) {
2161 func_arg
= func_addr
;
2163 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2164 tcg_out_movi(s
, ts
->type
, reg
, func_addr
);
2166 tcg_regset_set_reg(allocated_regs
, reg
);
2173 /* mark dead temporaries and free the associated registers */
2174 for(i
= nb_oargs
; i
< nb_iargs
+ nb_oargs
; i
++) {
2175 if (IS_DEAD_ARG(i
)) {
2176 temp_dead(s
, args
[i
]);
2180 /* clobber call registers */
2181 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
2182 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
2183 tcg_reg_free(s
, reg
);
2187 /* Save globals if they might be written by the helper, sync them if
2188 they might be read. */
2189 if (flags
& TCG_CALL_NO_READ_GLOBALS
) {
2191 } else if (flags
& TCG_CALL_NO_WRITE_GLOBALS
) {
2192 sync_globals(s
, allocated_regs
);
2194 save_globals(s
, allocated_regs
);
2197 tcg_out_op(s
, opc
, &func_arg
, &const_func_arg
);
2199 /* assign output registers and emit moves if needed */
2200 for(i
= 0; i
< nb_oargs
; i
++) {
2202 ts
= &s
->temps
[arg
];
2203 reg
= tcg_target_call_oarg_regs
[i
];
2204 assert(s
->reg_to_temp
[reg
] == -1);
2205 if (ts
->fixed_reg
) {
2206 if (ts
->reg
!= reg
) {
2207 tcg_out_mov(s
, ts
->type
, ts
->reg
, reg
);
2210 if (ts
->val_type
== TEMP_VAL_REG
) {
2211 s
->reg_to_temp
[ts
->reg
] = -1;
2213 ts
->val_type
= TEMP_VAL_REG
;
2215 ts
->mem_coherent
= 0;
2216 s
->reg_to_temp
[reg
] = arg
;
2217 if (NEED_SYNC_ARG(i
)) {
2218 tcg_reg_sync(s
, reg
);
2220 if (IS_DEAD_ARG(i
)) {
2221 temp_dead(s
, args
[i
]);
2226 return nb_iargs
+ nb_oargs
+ def
->nb_cargs
+ 1;
2229 #ifdef CONFIG_PROFILER
2231 static int64_t tcg_table_op_count
[NB_OPS
];
2233 static void dump_op_count(void)
2237 f
= fopen("/tmp/op.log", "w");
2238 for(i
= INDEX_op_end
; i
< NB_OPS
; i
++) {
2239 fprintf(f
, "%s %" PRId64
"\n", tcg_op_defs
[i
].name
, tcg_table_op_count
[i
]);
2246 static inline int tcg_gen_code_common(TCGContext
*s
, uint8_t *gen_code_buf
,
2251 const TCGOpDef
*def
;
2255 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP
))) {
2262 #ifdef CONFIG_PROFILER
2263 s
->opt_time
-= profile_getclock();
2266 #ifdef USE_TCG_OPTIMIZATIONS
2267 s
->gen_opparam_ptr
=
2268 tcg_optimize(s
, s
->gen_opc_ptr
, s
->gen_opparam_buf
, tcg_op_defs
);
2271 #ifdef CONFIG_PROFILER
2272 s
->opt_time
+= profile_getclock();
2273 s
->la_time
-= profile_getclock();
2276 tcg_liveness_analysis(s
);
2278 #ifdef CONFIG_PROFILER
2279 s
->la_time
+= profile_getclock();
2283 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT
))) {
2284 qemu_log("OP after optimization and liveness analysis:\n");
2290 tcg_reg_alloc_start(s
);
2292 s
->code_buf
= gen_code_buf
;
2293 s
->code_ptr
= gen_code_buf
;
2295 args
= s
->gen_opparam_buf
;
2299 opc
= s
->gen_opc_buf
[op_index
];
2300 #ifdef CONFIG_PROFILER
2301 tcg_table_op_count
[opc
]++;
2303 def
= &tcg_op_defs
[opc
];
2305 printf("%s: %d %d %d\n", def
->name
,
2306 def
->nb_oargs
, def
->nb_iargs
, def
->nb_cargs
);
2310 case INDEX_op_mov_i32
:
2311 case INDEX_op_mov_i64
:
2312 tcg_reg_alloc_mov(s
, def
, args
, s
->op_dead_args
[op_index
],
2313 s
->op_sync_args
[op_index
]);
2315 case INDEX_op_movi_i32
:
2316 case INDEX_op_movi_i64
:
2317 tcg_reg_alloc_movi(s
, args
, s
->op_dead_args
[op_index
],
2318 s
->op_sync_args
[op_index
]);
2320 case INDEX_op_debug_insn_start
:
2321 /* debug instruction */
2331 case INDEX_op_discard
:
2332 temp_dead(s
, args
[0]);
2334 case INDEX_op_set_label
:
2335 tcg_reg_alloc_bb_end(s
, s
->reserved_regs
);
2336 tcg_out_label(s
, args
[0], s
->code_ptr
);
2339 args
+= tcg_reg_alloc_call(s
, def
, opc
, args
,
2340 s
->op_dead_args
[op_index
],
2341 s
->op_sync_args
[op_index
]);
2346 /* Sanity check that we've not introduced any unhandled opcodes. */
2347 if (def
->flags
& TCG_OPF_NOT_PRESENT
) {
2350 /* Note: in order to speed up the code, it would be much
2351 faster to have specialized register allocator functions for
2352 some common argument patterns */
2353 tcg_reg_alloc_op(s
, def
, opc
, args
, s
->op_dead_args
[op_index
],
2354 s
->op_sync_args
[op_index
]);
2357 args
+= def
->nb_args
;
2359 if (search_pc
>= 0 && search_pc
< s
->code_ptr
- gen_code_buf
) {
2368 #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
2369 /* Generate TB finalization at the end of block */
2370 tcg_out_tb_finalize(s
);
2375 int tcg_gen_code(TCGContext
*s
, uint8_t *gen_code_buf
)
2377 #ifdef CONFIG_PROFILER
2380 n
= (s
->gen_opc_ptr
- s
->gen_opc_buf
);
2382 if (n
> s
->op_count_max
)
2383 s
->op_count_max
= n
;
2385 s
->temp_count
+= s
->nb_temps
;
2386 if (s
->nb_temps
> s
->temp_count_max
)
2387 s
->temp_count_max
= s
->nb_temps
;
2391 tcg_gen_code_common(s
, gen_code_buf
, -1);
2393 /* flush instruction cache */
2394 flush_icache_range((tcg_target_ulong
)gen_code_buf
,
2395 (tcg_target_ulong
)s
->code_ptr
);
2397 return s
->code_ptr
- gen_code_buf
;
2400 /* Return the index of the micro operation such as the pc after is <
2401 offset bytes from the start of the TB. The contents of gen_code_buf must
2402 not be changed, though writing the same values is ok.
2403 Return -1 if not found. */
2404 int tcg_gen_code_search_pc(TCGContext
*s
, uint8_t *gen_code_buf
, long offset
)
2406 return tcg_gen_code_common(s
, gen_code_buf
, offset
);
2409 #ifdef CONFIG_PROFILER
2410 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
)
2412 TCGContext
*s
= &tcg_ctx
;
2415 tot
= s
->interm_time
+ s
->code_time
;
2416 cpu_fprintf(f
, "JIT cycles %" PRId64
" (%0.3f s at 2.4 GHz)\n",
2418 cpu_fprintf(f
, "translated TBs %" PRId64
" (aborted=%" PRId64
" %0.1f%%)\n",
2420 s
->tb_count1
- s
->tb_count
,
2421 s
->tb_count1
? (double)(s
->tb_count1
- s
->tb_count
) / s
->tb_count1
* 100.0 : 0);
2422 cpu_fprintf(f
, "avg ops/TB %0.1f max=%d\n",
2423 s
->tb_count
? (double)s
->op_count
/ s
->tb_count
: 0, s
->op_count_max
);
2424 cpu_fprintf(f
, "deleted ops/TB %0.2f\n",
2426 (double)s
->del_op_count
/ s
->tb_count
: 0);
2427 cpu_fprintf(f
, "avg temps/TB %0.2f max=%d\n",
2429 (double)s
->temp_count
/ s
->tb_count
: 0,
2432 cpu_fprintf(f
, "cycles/op %0.1f\n",
2433 s
->op_count
? (double)tot
/ s
->op_count
: 0);
2434 cpu_fprintf(f
, "cycles/in byte %0.1f\n",
2435 s
->code_in_len
? (double)tot
/ s
->code_in_len
: 0);
2436 cpu_fprintf(f
, "cycles/out byte %0.1f\n",
2437 s
->code_out_len
? (double)tot
/ s
->code_out_len
: 0);
2440 cpu_fprintf(f
, " gen_interm time %0.1f%%\n",
2441 (double)s
->interm_time
/ tot
* 100.0);
2442 cpu_fprintf(f
, " gen_code time %0.1f%%\n",
2443 (double)s
->code_time
/ tot
* 100.0);
2444 cpu_fprintf(f
, "optim./code time %0.1f%%\n",
2445 (double)s
->opt_time
/ (s
->code_time
? s
->code_time
: 1)
2447 cpu_fprintf(f
, "liveness/code time %0.1f%%\n",
2448 (double)s
->la_time
/ (s
->code_time
? s
->code_time
: 1) * 100.0);
2449 cpu_fprintf(f
, "cpu_restore count %" PRId64
"\n",
2451 cpu_fprintf(f
, " avg cycles %0.1f\n",
2452 s
->restore_count
? (double)s
->restore_time
/ s
->restore_count
: 0);
2457 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
)
2459 cpu_fprintf(f
, "[TCG profiler not compiled]\n");
2463 #ifdef ELF_HOST_MACHINE
2464 /* In order to use this feature, the backend needs to do three things:
2466 (1) Define ELF_HOST_MACHINE to indicate both what value to
2467 put into the ELF image and to indicate support for the feature.
2469 (2) Define tcg_register_jit. This should create a buffer containing
2470 the contents of a .debug_frame section that describes the post-
2471 prologue unwind info for the tcg machine.
2473 (3) Call tcg_register_jit_int, with the constructed .debug_frame.
2476 /* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */
2483 struct jit_code_entry
{
2484 struct jit_code_entry
*next_entry
;
2485 struct jit_code_entry
*prev_entry
;
2486 const void *symfile_addr
;
2487 uint64_t symfile_size
;
2490 struct jit_descriptor
{
2492 uint32_t action_flag
;
2493 struct jit_code_entry
*relevant_entry
;
2494 struct jit_code_entry
*first_entry
;
2497 void __jit_debug_register_code(void) __attribute__((noinline
));
2498 void __jit_debug_register_code(void)
2503 /* Must statically initialize the version, because GDB may check
2504 the version before we can set it. */
2505 struct jit_descriptor __jit_debug_descriptor
= { 1, 0, 0, 0 };
2507 /* End GDB interface. */
2509 static int find_string(const char *strtab
, const char *str
)
2511 const char *p
= strtab
+ 1;
2514 if (strcmp(p
, str
) == 0) {
2521 static void tcg_register_jit_int(void *buf_ptr
, size_t buf_size
,
2522 void *debug_frame
, size_t debug_frame_size
)
2524 struct __attribute__((packed
)) DebugInfo
{
2531 uintptr_t cu_low_pc
;
2532 uintptr_t cu_high_pc
;
2535 uintptr_t fn_low_pc
;
2536 uintptr_t fn_high_pc
;
2545 struct DebugInfo di
;
2550 struct ElfImage
*img
;
2552 static const struct ElfImage img_template
= {
2554 .e_ident
[EI_MAG0
] = ELFMAG0
,
2555 .e_ident
[EI_MAG1
] = ELFMAG1
,
2556 .e_ident
[EI_MAG2
] = ELFMAG2
,
2557 .e_ident
[EI_MAG3
] = ELFMAG3
,
2558 .e_ident
[EI_CLASS
] = ELF_CLASS
,
2559 .e_ident
[EI_DATA
] = ELF_DATA
,
2560 .e_ident
[EI_VERSION
] = EV_CURRENT
,
2562 .e_machine
= ELF_HOST_MACHINE
,
2563 .e_version
= EV_CURRENT
,
2564 .e_phoff
= offsetof(struct ElfImage
, phdr
),
2565 .e_shoff
= offsetof(struct ElfImage
, shdr
),
2566 .e_ehsize
= sizeof(ElfW(Shdr
)),
2567 .e_phentsize
= sizeof(ElfW(Phdr
)),
2569 .e_shentsize
= sizeof(ElfW(Shdr
)),
2570 .e_shnum
= ARRAY_SIZE(img
->shdr
),
2571 .e_shstrndx
= ARRAY_SIZE(img
->shdr
) - 1,
2572 #ifdef ELF_HOST_FLAGS
2573 .e_flags
= ELF_HOST_FLAGS
,
2576 .e_ident
[EI_OSABI
] = ELF_OSABI
,
2584 [0] = { .sh_type
= SHT_NULL
},
2585 /* Trick: The contents of code_gen_buffer are not present in
2586 this fake ELF file; that got allocated elsewhere. Therefore
2587 we mark .text as SHT_NOBITS (similar to .bss) so that readers
2588 will not look for contents. We can record any address. */
2590 .sh_type
= SHT_NOBITS
,
2591 .sh_flags
= SHF_EXECINSTR
| SHF_ALLOC
,
2593 [2] = { /* .debug_info */
2594 .sh_type
= SHT_PROGBITS
,
2595 .sh_offset
= offsetof(struct ElfImage
, di
),
2596 .sh_size
= sizeof(struct DebugInfo
),
2598 [3] = { /* .debug_abbrev */
2599 .sh_type
= SHT_PROGBITS
,
2600 .sh_offset
= offsetof(struct ElfImage
, da
),
2601 .sh_size
= sizeof(img
->da
),
2603 [4] = { /* .debug_frame */
2604 .sh_type
= SHT_PROGBITS
,
2605 .sh_offset
= sizeof(struct ElfImage
),
2607 [5] = { /* .symtab */
2608 .sh_type
= SHT_SYMTAB
,
2609 .sh_offset
= offsetof(struct ElfImage
, sym
),
2610 .sh_size
= sizeof(img
->sym
),
2612 .sh_link
= ARRAY_SIZE(img
->shdr
) - 1,
2613 .sh_entsize
= sizeof(ElfW(Sym
)),
2615 [6] = { /* .strtab */
2616 .sh_type
= SHT_STRTAB
,
2617 .sh_offset
= offsetof(struct ElfImage
, str
),
2618 .sh_size
= sizeof(img
->str
),
2622 [1] = { /* code_gen_buffer */
2623 .st_info
= ELF_ST_INFO(STB_GLOBAL
, STT_FUNC
),
2628 .len
= sizeof(struct DebugInfo
) - 4,
2630 .ptr_size
= sizeof(void *),
2632 .cu_lang
= 0x8001, /* DW_LANG_Mips_Assembler */
2634 .fn_name
= "code_gen_buffer"
2637 1, /* abbrev number (the cu) */
2638 0x11, 1, /* DW_TAG_compile_unit, has children */
2639 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */
2640 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2641 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2642 0, 0, /* end of abbrev */
2643 2, /* abbrev number (the fn) */
2644 0x2e, 0, /* DW_TAG_subprogram, no children */
2645 0x3, 0x8, /* DW_AT_name, DW_FORM_string */
2646 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2647 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2648 0, 0, /* end of abbrev */
2649 0 /* no more abbrev */
2651 .str
= "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0"
2652 ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer",
2655 /* We only need a single jit entry; statically allocate it. */
2656 static struct jit_code_entry one_entry
;
2658 uintptr_t buf
= (uintptr_t)buf_ptr
;
2659 size_t img_size
= sizeof(struct ElfImage
) + debug_frame_size
;
2661 img
= g_malloc(img_size
);
2662 *img
= img_template
;
2663 memcpy(img
+ 1, debug_frame
, debug_frame_size
);
2665 img
->phdr
.p_vaddr
= buf
;
2666 img
->phdr
.p_paddr
= buf
;
2667 img
->phdr
.p_memsz
= buf_size
;
2669 img
->shdr
[1].sh_name
= find_string(img
->str
, ".text");
2670 img
->shdr
[1].sh_addr
= buf
;
2671 img
->shdr
[1].sh_size
= buf_size
;
2673 img
->shdr
[2].sh_name
= find_string(img
->str
, ".debug_info");
2674 img
->shdr
[3].sh_name
= find_string(img
->str
, ".debug_abbrev");
2676 img
->shdr
[4].sh_name
= find_string(img
->str
, ".debug_frame");
2677 img
->shdr
[4].sh_size
= debug_frame_size
;
2679 img
->shdr
[5].sh_name
= find_string(img
->str
, ".symtab");
2680 img
->shdr
[6].sh_name
= find_string(img
->str
, ".strtab");
2682 img
->sym
[1].st_name
= find_string(img
->str
, "code_gen_buffer");
2683 img
->sym
[1].st_value
= buf
;
2684 img
->sym
[1].st_size
= buf_size
;
2686 img
->di
.cu_low_pc
= buf
;
2687 img
->di
.cu_high_pc
= buf
+ buf_size
;
2688 img
->di
.fn_low_pc
= buf
;
2689 img
->di
.fn_high_pc
= buf
+ buf_size
;
2692 /* Enable this block to be able to debug the ELF image file creation.
2693 One can use readelf, objdump, or other inspection utilities. */
2695 FILE *f
= fopen("/tmp/qemu.jit", "w+b");
2697 if (fwrite(img
, img_size
, 1, f
) != img_size
) {
2698 /* Avoid stupid unused return value warning for fwrite. */
2705 one_entry
.symfile_addr
= img
;
2706 one_entry
.symfile_size
= img_size
;
2708 __jit_debug_descriptor
.action_flag
= JIT_REGISTER_FN
;
2709 __jit_debug_descriptor
.relevant_entry
= &one_entry
;
2710 __jit_debug_descriptor
.first_entry
= &one_entry
;
2711 __jit_debug_register_code();
2714 /* No support for the feature. Provide the entry point expected by exec.c,
2715 and implement the internal function we declared earlier. */
2717 static void tcg_register_jit_int(void *buf
, size_t size
,
2718 void *debug_frame
, size_t debug_frame_size
)
2722 void tcg_register_jit(void *buf
, size_t buf_size
)
2725 #endif /* ELF_HOST_MACHINE */