include/qom/cpu.h

   1 /*
   2  * QEMU CPU model
   3  *
   4  * Copyright (c) 2012 SUSE LINUX Products GmbH
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, see
  18  * <http://www.gnu.org/licenses/gpl-2.0.html>
  19  */
  20 #ifndef QEMU_CPU_H
  21 #define QEMU_CPU_H
  22
  23 #include <signal.h>
  24 #include "hw/qdev-core.h"
  25 #include "exec/hwaddr.h"
  26 #include "qemu/queue.h"
  27 #include "qemu/thread.h"
  28 #include "qemu/tls.h"
  29 #include "qemu/typedefs.h"
  30
  31 typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size,
  32                                      void *opaque);
  33
  34 /**
  35  * vaddr:
  36  * Type wide enough to contain any #target_ulong virtual address.
  37  */
  38 typedef uint64_t vaddr;
  39 #define VADDR_PRId PRId64
  40 #define VADDR_PRIu PRIu64
  41 #define VADDR_PRIo PRIo64
  42 #define VADDR_PRIx PRIx64
  43 #define VADDR_PRIX PRIX64
  44 #define VADDR_MAX UINT64_MAX
  45
  46 /**
  47  * SECTION:cpu
  48  * @section_id: QEMU-cpu
  49  * @title: CPU Class
  50  * @short_description: Base class for all CPUs
  51  */
  52
  53 #define TYPE_CPU "cpu"
  54
  55 #define CPU(obj) OBJECT_CHECK(CPUState, (obj), TYPE_CPU)
  56 #define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
  57 #define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
  58
  59 typedef struct CPUState CPUState;
  60
  61 typedef void (*CPUUnassignedAccess)(CPUState *cpu, hwaddr addr,
  62                                     bool is_write, bool is_exec, int opaque,
  63                                     unsigned size);
  64
  65 struct TranslationBlock;
  66
  67 /**
  68  * CPUClass:
  69  * @class_by_name: Callback to map -cpu command line model name to an
  70  * instantiatable CPU type.
  71  * @parse_features: Callback to parse command line arguments.
  72  * @reset: Callback to reset the #CPUState to its initial state.
  73  * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
  74  * @has_work: Callback for checking if there is work to do.
  75  * @do_interrupt: Callback for interrupt handling.
  76  * @do_unassigned_access: Callback for unassigned access handling.
  77  * @memory_rw_debug: Callback for GDB memory access.
  78  * @dump_state: Callback for dumping state.
  79  * @dump_statistics: Callback for dumping statistics.
  80  * @get_arch_id: Callback for getting architecture-dependent CPU ID.
  81  * @get_paging_enabled: Callback for inquiring whether paging is enabled.
  82  * @get_memory_mapping: Callback for obtaining the memory mappings.
  83  * @set_pc: Callback for setting the Program Counter register.
  84  * @synchronize_from_tb: Callback for synchronizing state from a TCG
  85  * #TranslationBlock.
  86  * @handle_mmu_fault: Callback for handling an MMU fault.
  87  * @get_phys_page_debug: Callback for obtaining a physical address.
  88  * @gdb_read_register: Callback for letting GDB read a register.
  89  * @gdb_write_register: Callback for letting GDB write a register.
  90  * @vmsd: State description for migration.
  91  * @gdb_num_core_regs: Number of core registers accessible to GDB.
  92  * @gdb_core_xml_file: File name for core registers GDB XML description.
  93  *
  94  * Represents a CPU family or model.
  95  */
  96 typedef struct CPUClass {
  97     /*< private >*/
  98     DeviceClass parent_class;
  99     /*< public >*/
 100
 101     ObjectClass *(*class_by_name)(const char *cpu_model);
 102     void (*parse_features)(CPUState *cpu, char *str, Error **errp);
 103
 104     void (*reset)(CPUState *cpu);
 105     int reset_dump_flags;
 106     bool (*has_work)(CPUState *cpu);
 107     void (*do_interrupt)(CPUState *cpu);
 108     CPUUnassignedAccess do_unassigned_access;
 109     int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
 110                            uint8_t *buf, int len, bool is_write);
 111     void (*dump_state)(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 112                        int flags);
 113     void (*dump_statistics)(CPUState *cpu, FILE *f,
 114                             fprintf_function cpu_fprintf, int flags);
 115     int64_t (*get_arch_id)(CPUState *cpu);
 116     bool (*get_paging_enabled)(const CPUState *cpu);
 117     void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list,
 118                                Error **errp);
 119     void (*set_pc)(CPUState *cpu, vaddr value);
 120     void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb);
 121     int (*handle_mmu_fault)(CPUState *cpu, vaddr address, int rw,
 122                             int mmu_index);
 123     hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
 124     int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg);
 125     int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
 126
 127     int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu,
 128                             int cpuid, void *opaque);
 129     int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
 130                                 void *opaque);
 131     int (*write_elf32_note)(WriteCoreDumpFunction f, CPUState *cpu,
 132                             int cpuid, void *opaque);
 133     int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
 134                                 void *opaque);
 135
 136     const struct VMStateDescription *vmsd;
 137     int gdb_num_core_regs;
 138     const char *gdb_core_xml_file;
 139 } CPUClass;
 140
 141 #ifdef HOST_WORDS_BIGENDIAN
 142 typedef struct icount_decr_u16 {
 143     uint16_t high;
 144     uint16_t low;
 145 } icount_decr_u16;
 146 #else
 147 typedef struct icount_decr_u16 {
 148     uint16_t low;
 149     uint16_t high;
 150 } icount_decr_u16;
 151 #endif
 152
 153 struct KVMState;
 154 struct kvm_run;
 155
 156 /**
 157  * CPUState:
 158  * @cpu_index: CPU index (informative).
 159  * @nr_cores: Number of cores within this CPU package.
 160  * @nr_threads: Number of threads within this CPU.
 161  * @numa_node: NUMA node this CPU is belonging to.
 162  * @host_tid: Host thread ID.
 163  * @running: #true if CPU is currently running (usermode).
 164  * @created: Indicates whether the CPU thread has been successfully created.
 165  * @interrupt_request: Indicates a pending interrupt request.
 166  * @halted: Nonzero if the CPU is in suspended state.
 167  * @stop: Indicates a pending stop request.
 168  * @stopped: Indicates the CPU has been artificially stopped.
 169  * @tcg_exit_req: Set to force TCG to stop executing linked TBs for this
 170  *           CPU and return to its top level loop.
 171  * @singlestep_enabled: Flags for single-stepping.
 172  * @icount_extra: Instructions until next timer event.
 173  * @icount_decr: Number of cycles left, with interrupt flag in high bit.
 174  * This allows a single read-compare-cbranch-write sequence to test
 175  * for both decrementer underflow and exceptions.
 176  * @can_do_io: Nonzero if memory-mapped IO is safe.
 177  * @env_ptr: Pointer to subclass-specific CPUArchState field.
 178  * @current_tb: Currently executing TB.
 179  * @gdb_regs: Additional GDB registers.
 180  * @gdb_num_regs: Number of total registers accessible to GDB.
 181  * @gdb_num_g_regs: Number of registers in GDB 'g' packets.
 182  * @next_cpu: Next CPU sharing TB cache.
 183  * @mem_io_pc: Host Program Counter at which the memory was accessed.
 184  * @mem_io_vaddr: Target virtual address at which the memory was accessed.
 185  * @kvm_fd: vCPU file descriptor for KVM.
 186  *
 187  * State of one CPU core or thread.
 188  */
 189 struct CPUState {
 190     /*< private >*/
 191     DeviceState parent_obj;
 192     /*< public >*/
 193
 194     int nr_cores;
 195     int nr_threads;
 196     int numa_node;
 197
 198     struct QemuThread *thread;
 199 #ifdef _WIN32
 200     HANDLE hThread;
 201 #endif
 202     int thread_id;
 203     uint32_t host_tid;
 204     bool running;
 205     struct QemuCond *halt_cond;
 206     struct qemu_work_item *queued_work_first, *queued_work_last;
 207     bool thread_kicked;
 208     bool created;
 209     bool stop;
 210     bool stopped;
 211     volatile sig_atomic_t exit_request;
 212     volatile sig_atomic_t tcg_exit_req;
 213     uint32_t interrupt_request;
 214     int singlestep_enabled;
 215     int64_t icount_extra;
 216
 217     AddressSpace *as;
 218     MemoryListener *tcg_as_listener;
 219
 220     void *env_ptr; /* CPUArchState */
 221     struct TranslationBlock *current_tb;
 222     struct GDBRegisterState *gdb_regs;
 223     int gdb_num_regs;
 224     int gdb_num_g_regs;
 225     QTAILQ_ENTRY(CPUState) node;
 226
 227     /* In order to avoid passing too many arguments to the MMIO helpers,
 228      * we store some rarely used information in the CPU context.
 229      */
 230     uintptr_t mem_io_pc;
 231     vaddr mem_io_vaddr;
 232
 233     int kvm_fd;
 234     bool kvm_vcpu_dirty;
 235     struct KVMState *kvm_state;
 236     struct kvm_run *kvm_run;
 237
 238     /* TODO Move common fields from CPUArchState here. */
 239     int cpu_index; /* used by alpha TCG */
 240     uint32_t halted; /* used by alpha, cris, ppc TCG */
 241     union {
 242         uint32_t u32;
 243         icount_decr_u16 u16;
 244     } icount_decr;
 245     uint32_t can_do_io;
 246 };
 247
 248 QTAILQ_HEAD(CPUTailQ, CPUState);
 249 extern struct CPUTailQ cpus;
 250 #define CPU_NEXT(cpu) QTAILQ_NEXT(cpu, node)
 251 #define CPU_FOREACH(cpu) QTAILQ_FOREACH(cpu, &cpus, node)
 252 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
 253     QTAILQ_FOREACH_SAFE(cpu, &cpus, node, next_cpu)
 254 #define first_cpu QTAILQ_FIRST(&cpus)
 255
 256 DECLARE_TLS(CPUState *, current_cpu);
 257 #define current_cpu tls_var(current_cpu)
 258
 259 /**
 260  * cpu_paging_enabled:
 261  * @cpu: The CPU whose state is to be inspected.
 262  *
 263  * Returns: %true if paging is enabled, %false otherwise.
 264  */
 265 bool cpu_paging_enabled(const CPUState *cpu);
 266
 267 /**
 268  * cpu_get_memory_mapping:
 269  * @cpu: The CPU whose memory mappings are to be obtained.
 270  * @list: Where to write the memory mappings to.
 271  * @errp: Pointer for reporting an #Error.
 272  */
 273 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
 274                             Error **errp);
 275
 276 /**
 277  * cpu_write_elf64_note:
 278  * @f: pointer to a function that writes memory to a file
 279  * @cpu: The CPU whose memory is to be dumped
 280  * @cpuid: ID number of the CPU
 281  * @opaque: pointer to the CPUState struct
 282  */
 283 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
 284                          int cpuid, void *opaque);
 285
 286 /**
 287  * cpu_write_elf64_qemunote:
 288  * @f: pointer to a function that writes memory to a file
 289  * @cpu: The CPU whose memory is to be dumped
 290  * @cpuid: ID number of the CPU
 291  * @opaque: pointer to the CPUState struct
 292  */
 293 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 294                              void *opaque);
 295
 296 /**
 297  * cpu_write_elf32_note:
 298  * @f: pointer to a function that writes memory to a file
 299  * @cpu: The CPU whose memory is to be dumped
 300  * @cpuid: ID number of the CPU
 301  * @opaque: pointer to the CPUState struct
 302  */
 303 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
 304                          int cpuid, void *opaque);
 305
 306 /**
 307  * cpu_write_elf32_qemunote:
 308  * @f: pointer to a function that writes memory to a file
 309  * @cpu: The CPU whose memory is to be dumped
 310  * @cpuid: ID number of the CPU
 311  * @opaque: pointer to the CPUState struct
 312  */
 313 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
 314                              void *opaque);
 315
 316 /**
 317  * CPUDumpFlags:
 318  * @CPU_DUMP_CODE:
 319  * @CPU_DUMP_FPU: dump FPU register state, not just integer
 320  * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
 321  */
 322 enum CPUDumpFlags {
 323     CPU_DUMP_CODE = 0x00010000,
 324     CPU_DUMP_FPU  = 0x00020000,
 325     CPU_DUMP_CCOP = 0x00040000,
 326 };
 327
 328 /**
 329  * cpu_dump_state:
 330  * @cpu: The CPU whose state is to be dumped.
 331  * @f: File to dump to.
 332  * @cpu_fprintf: Function to dump with.
 333  * @flags: Flags what to dump.
 334  *
 335  * Dumps CPU state.
 336  */
 337 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 338                     int flags);
 339
 340 /**
 341  * cpu_dump_statistics:
 342  * @cpu: The CPU whose state is to be dumped.
 343  * @f: File to dump to.
 344  * @cpu_fprintf: Function to dump with.
 345  * @flags: Flags what to dump.
 346  *
 347  * Dumps CPU statistics.
 348  */
 349 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
 350                          int flags);
 351
 352 #ifndef CONFIG_USER_ONLY
 353 /**
 354  * cpu_get_phys_page_debug:
 355  * @cpu: The CPU to obtain the physical page address for.
 356  * @addr: The virtual address.
 357  *
 358  * Obtains the physical page corresponding to a virtual one.
 359  * Use it only for debugging because no protection checks are done.
 360  *
 361  * Returns: Corresponding physical page address or -1 if no page found.
 362  */
 363 static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
 364 {
 365     CPUClass *cc = CPU_GET_CLASS(cpu);
 366
 367     return cc->get_phys_page_debug(cpu, addr);
 368 }
 369 #endif
 370
 371 /**
 372  * cpu_reset:
 373  * @cpu: The CPU whose state is to be reset.
 374  */
 375 void cpu_reset(CPUState *cpu);
 376
 377 /**
 378  * cpu_class_by_name:
 379  * @typename: The CPU base type.
 380  * @cpu_model: The model string without any parameters.
 381  *
 382  * Looks up a CPU #ObjectClass matching name @cpu_model.
 383  *
 384  * Returns: A #CPUClass or %NULL if not matching class is found.
 385  */
 386 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
 387
 388 /**
 389  * cpu_generic_init:
 390  * @typename: The CPU base type.
 391  * @cpu_model: The model string including optional parameters.
 392  *
 393  * Instantiates a CPU, processes optional parameters and realizes the CPU.
 394  *
 395  * Returns: A #CPUState or %NULL if an error occurred.
 396  */
 397 CPUState *cpu_generic_init(const char *typename, const char *cpu_model);
 398
 399 /**
 400  * cpu_has_work:
 401  * @cpu: The vCPU to check.
 402  *
 403  * Checks whether the CPU has work to do.
 404  *
 405  * Returns: %true if the CPU has work, %false otherwise.
 406  */
 407 static inline bool cpu_has_work(CPUState *cpu)
 408 {
 409     CPUClass *cc = CPU_GET_CLASS(cpu);
 410
 411     g_assert(cc->has_work);
 412     return cc->has_work(cpu);
 413 }
 414
 415 /**
 416  * qemu_cpu_is_self:
 417  * @cpu: The vCPU to check against.
 418  *
 419  * Checks whether the caller is executing on the vCPU thread.
 420  *
 421  * Returns: %true if called from @cpu's thread, %false otherwise.
 422  */
 423 bool qemu_cpu_is_self(CPUState *cpu);
 424
 425 /**
 426  * qemu_cpu_kick:
 427  * @cpu: The vCPU to kick.
 428  *
 429  * Kicks @cpu's thread.
 430  */
 431 void qemu_cpu_kick(CPUState *cpu);
 432
 433 /**
 434  * cpu_is_stopped:
 435  * @cpu: The CPU to check.
 436  *
 437  * Checks whether the CPU is stopped.
 438  *
 439  * Returns: %true if run state is not running or if artificially stopped;
 440  * %false otherwise.
 441  */
 442 bool cpu_is_stopped(CPUState *cpu);
 443
 444 /**
 445  * run_on_cpu:
 446  * @cpu: The vCPU to run on.
 447  * @func: The function to be executed.
 448  * @data: Data to pass to the function.
 449  *
 450  * Schedules the function @func for execution on the vCPU @cpu.
 451  */
 452 void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
 453
 454 /**
 455  * async_run_on_cpu:
 456  * @cpu: The vCPU to run on.
 457  * @func: The function to be executed.
 458  * @data: Data to pass to the function.
 459  *
 460  * Schedules the function @func for execution on the vCPU @cpu asynchronously.
 461  */
 462 void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
 463
 464 /**
 465  * qemu_get_cpu:
 466  * @index: The CPUState@cpu_index value of the CPU to obtain.
 467  *
 468  * Gets a CPU matching @index.
 469  *
 470  * Returns: The CPU or %NULL if there is no matching CPU.
 471  */
 472 CPUState *qemu_get_cpu(int index);
 473
 474 /**
 475  * cpu_exists:
 476  * @id: Guest-exposed CPU ID to lookup.
 477  *
 478  * Search for CPU with specified ID.
 479  *
 480  * Returns: %true - CPU is found, %false - CPU isn't found.
 481  */
 482 bool cpu_exists(int64_t id);
 483
 484 #ifndef CONFIG_USER_ONLY
 485
 486 typedef void (*CPUInterruptHandler)(CPUState *, int);
 487
 488 extern CPUInterruptHandler cpu_interrupt_handler;
 489
 490 /**
 491  * cpu_interrupt:
 492  * @cpu: The CPU to set an interrupt on.
 493  * @mask: The interupts to set.
 494  *
 495  * Invokes the interrupt handler.
 496  */
 497 static inline void cpu_interrupt(CPUState *cpu, int mask)
 498 {
 499     cpu_interrupt_handler(cpu, mask);
 500 }
 501
 502 #else /* USER_ONLY */
 503
 504 void cpu_interrupt(CPUState *cpu, int mask);
 505
 506 #endif /* USER_ONLY */
 507
 508 #ifndef CONFIG_USER_ONLY
 509
 510 static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr,
 511                                          bool is_write, bool is_exec,
 512                                          int opaque, unsigned size)
 513 {
 514     CPUClass *cc = CPU_GET_CLASS(cpu);
 515
 516     if (cc->do_unassigned_access) {
 517         cc->do_unassigned_access(cpu, addr, is_write, is_exec, opaque, size);
 518     }
 519 }
 520
 521 #endif
 522
 523 /**
 524  * cpu_reset_interrupt:
 525  * @cpu: The CPU to clear the interrupt on.
 526  * @mask: The interrupt mask to clear.
 527  *
 528  * Resets interrupts on the vCPU @cpu.
 529  */
 530 void cpu_reset_interrupt(CPUState *cpu, int mask);
 531
 532 /**
 533  * cpu_exit:
 534  * @cpu: The CPU to exit.
 535  *
 536  * Requests the CPU @cpu to exit execution.
 537  */
 538 void cpu_exit(CPUState *cpu);
 539
 540 /**
 541  * cpu_resume:
 542  * @cpu: The CPU to resume.
 543  *
 544  * Resumes CPU, i.e. puts CPU into runnable state.
 545  */
 546 void cpu_resume(CPUState *cpu);
 547
 548 /**
 549  * qemu_init_vcpu:
 550  * @cpu: The vCPU to initialize.
 551  *
 552  * Initializes a vCPU.
 553  */
 554 void qemu_init_vcpu(CPUState *cpu);
 555
 556 #define SSTEP_ENABLE  0x1  /* Enable simulated HW single stepping */
 557 #define SSTEP_NOIRQ   0x2  /* Do not use IRQ while single stepping */
 558 #define SSTEP_NOTIMER 0x4  /* Do not Timers while single stepping */
 559
 560 /**
 561  * cpu_single_step:
 562  * @cpu: CPU to the flags for.
 563  * @enabled: Flags to enable.
 564  *
 565  * Enables or disables single-stepping for @cpu.
 566  */
 567 void cpu_single_step(CPUState *cpu, int enabled);
 568
 569 #ifdef CONFIG_SOFTMMU
 570 extern const struct VMStateDescription vmstate_cpu_common;
 571 #else
 572 #define vmstate_cpu_common vmstate_dummy
 573 #endif
 574
 575 #define VMSTATE_CPU() {                                                     \
 576     .name = "parent_obj",                                                   \
 577     .size = sizeof(CPUState),                                               \
 578     .vmsd = &vmstate_cpu_common,                                            \
 579     .flags = VMS_STRUCT,                                                    \
 580     .offset = 0,                                                            \
 581 }
 582
 583 #endif