MMU fix (Blue Swirl)
[qemu/qemu_0_9_1_stable.git] / target-arm / op.c
blobf4cbb6e6627f775a9af46f56d67729699b029b89
1 /*
2 * ARM micro operations
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 * Copyright (c) 2005 CodeSourcery, LLC
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #include "exec.h"
23 #define REGNAME r0
24 #define REG (env->regs[0])
25 #include "op_template.h"
27 #define REGNAME r1
28 #define REG (env->regs[1])
29 #include "op_template.h"
31 #define REGNAME r2
32 #define REG (env->regs[2])
33 #include "op_template.h"
35 #define REGNAME r3
36 #define REG (env->regs[3])
37 #include "op_template.h"
39 #define REGNAME r4
40 #define REG (env->regs[4])
41 #include "op_template.h"
43 #define REGNAME r5
44 #define REG (env->regs[5])
45 #include "op_template.h"
47 #define REGNAME r6
48 #define REG (env->regs[6])
49 #include "op_template.h"
51 #define REGNAME r7
52 #define REG (env->regs[7])
53 #include "op_template.h"
55 #define REGNAME r8
56 #define REG (env->regs[8])
57 #include "op_template.h"
59 #define REGNAME r9
60 #define REG (env->regs[9])
61 #include "op_template.h"
63 #define REGNAME r10
64 #define REG (env->regs[10])
65 #include "op_template.h"
67 #define REGNAME r11
68 #define REG (env->regs[11])
69 #include "op_template.h"
71 #define REGNAME r12
72 #define REG (env->regs[12])
73 #include "op_template.h"
75 #define REGNAME r13
76 #define REG (env->regs[13])
77 #include "op_template.h"
79 #define REGNAME r14
80 #define REG (env->regs[14])
81 #include "op_template.h"
83 #define REGNAME r15
84 #define REG (env->regs[15])
85 #define SET_REG(x) REG = x & ~(uint32_t)1
86 #include "op_template.h"
88 void OPPROTO op_bx_T0(void)
90 env->regs[15] = T0 & ~(uint32_t)1;
91 env->thumb = (T0 & 1) != 0;
94 void OPPROTO op_movl_T0_0(void)
96 T0 = 0;
99 void OPPROTO op_movl_T0_im(void)
101 T0 = PARAM1;
104 void OPPROTO op_movl_T1_im(void)
106 T1 = PARAM1;
109 void OPPROTO op_mov_CF_T1(void)
111 env->CF = ((uint32_t)T1) >> 31;
114 void OPPROTO op_movl_T2_im(void)
116 T2 = PARAM1;
119 void OPPROTO op_addl_T1_im(void)
121 T1 += PARAM1;
124 void OPPROTO op_addl_T1_T2(void)
126 T1 += T2;
129 void OPPROTO op_subl_T1_T2(void)
131 T1 -= T2;
134 void OPPROTO op_addl_T0_T1(void)
136 T0 += T1;
139 void OPPROTO op_addl_T0_T1_cc(void)
141 unsigned int src1;
142 src1 = T0;
143 T0 += T1;
144 env->NZF = T0;
145 env->CF = T0 < src1;
146 env->VF = (src1 ^ T1 ^ -1) & (src1 ^ T0);
149 void OPPROTO op_adcl_T0_T1(void)
151 T0 += T1 + env->CF;
154 void OPPROTO op_adcl_T0_T1_cc(void)
156 unsigned int src1;
157 src1 = T0;
158 if (!env->CF) {
159 T0 += T1;
160 env->CF = T0 < src1;
161 } else {
162 T0 += T1 + 1;
163 env->CF = T0 <= src1;
165 env->VF = (src1 ^ T1 ^ -1) & (src1 ^ T0);
166 env->NZF = T0;
167 FORCE_RET();
170 #define OPSUB(sub, sbc, res, T0, T1) \
172 void OPPROTO op_ ## sub ## l_T0_T1(void) \
174 res = T0 - T1; \
177 void OPPROTO op_ ## sub ## l_T0_T1_cc(void) \
179 unsigned int src1; \
180 src1 = T0; \
181 T0 -= T1; \
182 env->NZF = T0; \
183 env->CF = src1 >= T1; \
184 env->VF = (src1 ^ T1) & (src1 ^ T0); \
185 res = T0; \
188 void OPPROTO op_ ## sbc ## l_T0_T1(void) \
190 res = T0 - T1 + env->CF - 1; \
193 void OPPROTO op_ ## sbc ## l_T0_T1_cc(void) \
195 unsigned int src1; \
196 src1 = T0; \
197 if (!env->CF) { \
198 T0 = T0 - T1 - 1; \
199 env->CF = src1 > T1; \
200 } else { \
201 T0 = T0 - T1; \
202 env->CF = src1 >= T1; \
204 env->VF = (src1 ^ T1) & (src1 ^ T0); \
205 env->NZF = T0; \
206 res = T0; \
207 FORCE_RET(); \
210 OPSUB(sub, sbc, T0, T0, T1)
212 OPSUB(rsb, rsc, T0, T1, T0)
214 void OPPROTO op_andl_T0_T1(void)
216 T0 &= T1;
219 void OPPROTO op_xorl_T0_T1(void)
221 T0 ^= T1;
224 void OPPROTO op_orl_T0_T1(void)
226 T0 |= T1;
229 void OPPROTO op_bicl_T0_T1(void)
231 T0 &= ~T1;
234 void OPPROTO op_notl_T1(void)
236 T1 = ~T1;
239 void OPPROTO op_logic_T0_cc(void)
241 env->NZF = T0;
244 void OPPROTO op_logic_T1_cc(void)
246 env->NZF = T1;
249 #define EIP (env->regs[15])
251 void OPPROTO op_test_eq(void)
253 if (env->NZF == 0)
254 JUMP_TB(op_test_eq, PARAM1, 0, PARAM2);
255 FORCE_RET();
258 void OPPROTO op_test_ne(void)
260 if (env->NZF != 0)
261 JUMP_TB(op_test_ne, PARAM1, 0, PARAM2);
262 FORCE_RET();
265 void OPPROTO op_test_cs(void)
267 if (env->CF != 0)
268 JUMP_TB(op_test_cs, PARAM1, 0, PARAM2);
269 FORCE_RET();
272 void OPPROTO op_test_cc(void)
274 if (env->CF == 0)
275 JUMP_TB(op_test_cc, PARAM1, 0, PARAM2);
276 FORCE_RET();
279 void OPPROTO op_test_mi(void)
281 if ((env->NZF & 0x80000000) != 0)
282 JUMP_TB(op_test_mi, PARAM1, 0, PARAM2);
283 FORCE_RET();
286 void OPPROTO op_test_pl(void)
288 if ((env->NZF & 0x80000000) == 0)
289 JUMP_TB(op_test_pl, PARAM1, 0, PARAM2);
290 FORCE_RET();
293 void OPPROTO op_test_vs(void)
295 if ((env->VF & 0x80000000) != 0)
296 JUMP_TB(op_test_vs, PARAM1, 0, PARAM2);
297 FORCE_RET();
300 void OPPROTO op_test_vc(void)
302 if ((env->VF & 0x80000000) == 0)
303 JUMP_TB(op_test_vc, PARAM1, 0, PARAM2);
304 FORCE_RET();
307 void OPPROTO op_test_hi(void)
309 if (env->CF != 0 && env->NZF != 0)
310 JUMP_TB(op_test_hi, PARAM1, 0, PARAM2);
311 FORCE_RET();
314 void OPPROTO op_test_ls(void)
316 if (env->CF == 0 || env->NZF == 0)
317 JUMP_TB(op_test_ls, PARAM1, 0, PARAM2);
318 FORCE_RET();
321 void OPPROTO op_test_ge(void)
323 if (((env->VF ^ env->NZF) & 0x80000000) == 0)
324 JUMP_TB(op_test_ge, PARAM1, 0, PARAM2);
325 FORCE_RET();
328 void OPPROTO op_test_lt(void)
330 if (((env->VF ^ env->NZF) & 0x80000000) != 0)
331 JUMP_TB(op_test_lt, PARAM1, 0, PARAM2);
332 FORCE_RET();
335 void OPPROTO op_test_gt(void)
337 if (env->NZF != 0 && ((env->VF ^ env->NZF) & 0x80000000) == 0)
338 JUMP_TB(op_test_gt, PARAM1, 0, PARAM2);
339 FORCE_RET();
342 void OPPROTO op_test_le(void)
344 if (env->NZF == 0 || ((env->VF ^ env->NZF) & 0x80000000) != 0)
345 JUMP_TB(op_test_le, PARAM1, 0, PARAM2);
346 FORCE_RET();
349 void OPPROTO op_jmp(void)
351 JUMP_TB(op_jmp, PARAM1, 1, PARAM2);
354 void OPPROTO op_exit_tb(void)
356 EXIT_TB();
359 void OPPROTO op_movl_T0_psr(void)
361 T0 = compute_cpsr();
364 /* NOTE: N = 1 and Z = 1 cannot be stored currently */
365 void OPPROTO op_movl_psr_T0(void)
367 unsigned int psr;
368 psr = T0;
369 env->CF = (psr >> 29) & 1;
370 env->NZF = (psr & 0xc0000000) ^ 0x40000000;
371 env->VF = (psr << 3) & 0x80000000;
372 /* for user mode we do not update other state info */
375 void OPPROTO op_mul_T0_T1(void)
377 T0 = T0 * T1;
380 /* 64 bit unsigned mul */
381 void OPPROTO op_mull_T0_T1(void)
383 uint64_t res;
384 res = (uint64_t)T0 * (uint64_t)T1;
385 T1 = res >> 32;
386 T0 = res;
389 /* 64 bit signed mul */
390 void OPPROTO op_imull_T0_T1(void)
392 uint64_t res;
393 res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
394 T1 = res >> 32;
395 T0 = res;
398 /* 48 bit signed mul, top 32 bits */
399 void OPPROTO op_imulw_T0_T1(void)
401 uint64_t res;
402 res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
403 T0 = res >> 16;
406 void OPPROTO op_addq_T0_T1(void)
408 uint64_t res;
409 res = ((uint64_t)T1 << 32) | T0;
410 res += ((uint64_t)(env->regs[PARAM2]) << 32) | (env->regs[PARAM1]);
411 T1 = res >> 32;
412 T0 = res;
415 void OPPROTO op_addq_lo_T0_T1(void)
417 uint64_t res;
418 res = ((uint64_t)T1 << 32) | T0;
419 res += (uint64_t)(env->regs[PARAM1]);
420 T1 = res >> 32;
421 T0 = res;
424 void OPPROTO op_logicq_cc(void)
426 env->NZF = (T1 & 0x80000000) | ((T0 | T1) != 0);
429 /* memory access */
431 void OPPROTO op_ldub_T0_T1(void)
433 T0 = ldub((void *)T1);
436 void OPPROTO op_ldsb_T0_T1(void)
438 T0 = ldsb((void *)T1);
441 void OPPROTO op_lduw_T0_T1(void)
443 T0 = lduw((void *)T1);
446 void OPPROTO op_ldsw_T0_T1(void)
448 T0 = ldsw((void *)T1);
451 void OPPROTO op_ldl_T0_T1(void)
453 T0 = ldl((void *)T1);
456 void OPPROTO op_stb_T0_T1(void)
458 stb((void *)T1, T0);
461 void OPPROTO op_stw_T0_T1(void)
463 stw((void *)T1, T0);
466 void OPPROTO op_stl_T0_T1(void)
468 stl((void *)T1, T0);
471 void OPPROTO op_swpb_T0_T1(void)
473 int tmp;
475 cpu_lock();
476 tmp = ldub((void *)T1);
477 stb((void *)T1, T0);
478 T0 = tmp;
479 cpu_unlock();
482 void OPPROTO op_swpl_T0_T1(void)
484 int tmp;
486 cpu_lock();
487 tmp = ldl((void *)T1);
488 stl((void *)T1, T0);
489 T0 = tmp;
490 cpu_unlock();
493 /* shifts */
495 /* T1 based */
497 void OPPROTO op_shll_T1_im(void)
499 T1 = T1 << PARAM1;
502 void OPPROTO op_shrl_T1_im(void)
504 T1 = (uint32_t)T1 >> PARAM1;
507 void OPPROTO op_shrl_T1_0(void)
509 T1 = 0;
512 void OPPROTO op_sarl_T1_im(void)
514 T1 = (int32_t)T1 >> PARAM1;
517 void OPPROTO op_sarl_T1_0(void)
519 T1 = (int32_t)T1 >> 31;
522 void OPPROTO op_rorl_T1_im(void)
524 int shift;
525 shift = PARAM1;
526 T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
529 void OPPROTO op_rrxl_T1(void)
531 T1 = ((uint32_t)T1 >> 1) | ((uint32_t)env->CF << 31);
534 /* T1 based, set C flag */
535 void OPPROTO op_shll_T1_im_cc(void)
537 env->CF = (T1 >> (32 - PARAM1)) & 1;
538 T1 = T1 << PARAM1;
541 void OPPROTO op_shrl_T1_im_cc(void)
543 env->CF = (T1 >> (PARAM1 - 1)) & 1;
544 T1 = (uint32_t)T1 >> PARAM1;
547 void OPPROTO op_shrl_T1_0_cc(void)
549 env->CF = (T1 >> 31) & 1;
550 T1 = 0;
553 void OPPROTO op_sarl_T1_im_cc(void)
555 env->CF = (T1 >> (PARAM1 - 1)) & 1;
556 T1 = (int32_t)T1 >> PARAM1;
559 void OPPROTO op_sarl_T1_0_cc(void)
561 env->CF = (T1 >> 31) & 1;
562 T1 = (int32_t)T1 >> 31;
565 void OPPROTO op_rorl_T1_im_cc(void)
567 int shift;
568 shift = PARAM1;
569 env->CF = (T1 >> (shift - 1)) & 1;
570 T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
573 void OPPROTO op_rrxl_T1_cc(void)
575 uint32_t c;
576 c = T1 & 1;
577 T1 = ((uint32_t)T1 >> 1) | ((uint32_t)env->CF << 31);
578 env->CF = c;
581 /* T2 based */
582 void OPPROTO op_shll_T2_im(void)
584 T2 = T2 << PARAM1;
587 void OPPROTO op_shrl_T2_im(void)
589 T2 = (uint32_t)T2 >> PARAM1;
592 void OPPROTO op_shrl_T2_0(void)
594 T2 = 0;
597 void OPPROTO op_sarl_T2_im(void)
599 T2 = (int32_t)T2 >> PARAM1;
602 void OPPROTO op_sarl_T2_0(void)
604 T2 = (int32_t)T2 >> 31;
607 void OPPROTO op_rorl_T2_im(void)
609 int shift;
610 shift = PARAM1;
611 T2 = ((uint32_t)T2 >> shift) | (T2 << (32 - shift));
614 void OPPROTO op_rrxl_T2(void)
616 T2 = ((uint32_t)T2 >> 1) | ((uint32_t)env->CF << 31);
619 /* T1 based, use T0 as shift count */
621 void OPPROTO op_shll_T1_T0(void)
623 int shift;
624 shift = T0 & 0xff;
625 if (shift >= 32)
626 T1 = 0;
627 else
628 T1 = T1 << shift;
629 FORCE_RET();
632 void OPPROTO op_shrl_T1_T0(void)
634 int shift;
635 shift = T0 & 0xff;
636 if (shift >= 32)
637 T1 = 0;
638 else
639 T1 = (uint32_t)T1 >> shift;
640 FORCE_RET();
643 void OPPROTO op_sarl_T1_T0(void)
645 int shift;
646 shift = T0 & 0xff;
647 if (shift >= 32)
648 shift = 31;
649 T1 = (int32_t)T1 >> shift;
652 void OPPROTO op_rorl_T1_T0(void)
654 int shift;
655 shift = T0 & 0x1f;
656 if (shift) {
657 T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
659 FORCE_RET();
662 /* T1 based, use T0 as shift count and compute CF */
664 void OPPROTO op_shll_T1_T0_cc(void)
666 int shift;
667 shift = T0 & 0xff;
668 if (shift >= 32) {
669 if (shift == 32)
670 env->CF = T1 & 1;
671 else
672 env->CF = 0;
673 T1 = 0;
674 } else if (shift != 0) {
675 env->CF = (T1 >> (32 - shift)) & 1;
676 T1 = T1 << shift;
678 FORCE_RET();
681 void OPPROTO op_shrl_T1_T0_cc(void)
683 int shift;
684 shift = T0 & 0xff;
685 if (shift >= 32) {
686 if (shift == 32)
687 env->CF = (T1 >> 31) & 1;
688 else
689 env->CF = 0;
690 T1 = 0;
691 } else if (shift != 0) {
692 env->CF = (T1 >> (shift - 1)) & 1;
693 T1 = (uint32_t)T1 >> shift;
695 FORCE_RET();
698 void OPPROTO op_sarl_T1_T0_cc(void)
700 int shift;
701 shift = T0 & 0xff;
702 if (shift >= 32) {
703 env->CF = (T1 >> 31) & 1;
704 T1 = (int32_t)T1 >> 31;
705 } else {
706 env->CF = (T1 >> (shift - 1)) & 1;
707 T1 = (int32_t)T1 >> shift;
709 FORCE_RET();
712 void OPPROTO op_rorl_T1_T0_cc(void)
714 int shift1, shift;
715 shift1 = T0 & 0xff;
716 shift = shift1 & 0x1f;
717 if (shift == 0) {
718 if (shift1 != 0)
719 env->CF = (T1 >> 31) & 1;
720 } else {
721 env->CF = (T1 >> (shift - 1)) & 1;
722 T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
724 FORCE_RET();
727 /* misc */
728 void OPPROTO op_clz_T0(void)
730 int count;
731 for (count = 32; T0 > 0; count--)
732 T0 = T0 >> 1;
733 T0 = count;
734 FORCE_RET();
737 void OPPROTO op_sarl_T0_im(void)
739 T0 = (int32_t)T0 >> PARAM1;
742 /* 16->32 Sign extend */
743 void OPPROTO op_sxl_T0(void)
745 T0 = (int16_t)T0;
748 void OPPROTO op_sxl_T1(void)
750 T1 = (int16_t)T1;
753 #define SIGNBIT (uint32_t)0x80000000
754 /* saturating arithmetic */
755 void OPPROTO op_addl_T0_T1_setq(void)
757 uint32_t res;
759 res = T0 + T1;
760 if (((res ^ T0) & SIGNBIT) && !((T0 ^ T1) & SIGNBIT))
761 env->QF = 1;
763 T0 = res;
764 FORCE_RET();
767 void OPPROTO op_addl_T0_T1_saturate(void)
769 uint32_t res;
771 res = T0 + T1;
772 if (((res ^ T0) & SIGNBIT) && !((T0 ^ T1) & SIGNBIT)) {
773 env->QF = 1;
774 if (T0 & SIGNBIT)
775 T0 = 0x80000000;
776 else
777 T0 = 0x7fffffff;
779 else
780 T0 = res;
782 FORCE_RET();
785 void OPPROTO op_subl_T0_T1_saturate(void)
787 uint32_t res;
789 res = T0 - T1;
790 if (((res ^ T0) & SIGNBIT) && ((T0 ^ T1) & SIGNBIT)) {
791 env->QF = 1;
792 if (T0 & SIGNBIT)
793 T0 = 0x8000000;
794 else
795 T0 = 0x7fffffff;
797 else
798 T0 = res;
800 FORCE_RET();
803 /* thumb shift by immediate */
804 void OPPROTO op_shll_T0_im_thumb(void)
806 int shift;
807 shift = PARAM1;
808 if (shift != 0) {
809 env->CF = (T1 >> (32 - shift)) & 1;
810 T0 = T0 << shift;
812 env->NZF = T0;
813 FORCE_RET();
816 void OPPROTO op_shrl_T0_im_thumb(void)
818 int shift;
820 shift = PARAM1;
821 if (shift == 0) {
822 env->CF = 0;
823 T0 = 0;
824 } else {
825 env->CF = (T0 >> (shift - 1)) & 1;
826 T0 = T0 >> shift;
828 FORCE_RET();
831 void OPPROTO op_sarl_T0_im_thumb(void)
833 int shift;
835 shift = PARAM1;
836 if (shift == 0) {
837 T0 = ((int32_t)T0) >> 31;
838 env->CF = T0 & 1;
839 } else {
840 env->CF = (T0 >> (shift - 1)) & 1;
841 T0 = ((int32_t)T0) >> shift;
843 env->NZF = T0;
844 FORCE_RET();
847 /* exceptions */
849 void OPPROTO op_swi(void)
851 env->exception_index = EXCP_SWI;
852 cpu_loop_exit();
855 void OPPROTO op_undef_insn(void)
857 env->exception_index = EXCP_UDEF;
858 cpu_loop_exit();
861 void OPPROTO op_debug(void)
863 env->exception_index = EXCP_DEBUG;
864 cpu_loop_exit();
867 /* VFP support. We follow the convention used for VFP instrunctions:
868 Single precition routines have a "s" suffix, double precision a
869 "d" suffix. */
871 #define VFP_OP(name, p) void OPPROTO op_vfp_##name##p(void)
873 #define VFP_BINOP(name) \
874 VFP_OP(name, s) \
876 FT0s = float32_ ## name (FT0s, FT1s, &env->vfp.fp_status); \
878 VFP_OP(name, d) \
880 FT0d = float64_ ## name (FT0d, FT1d, &env->vfp.fp_status); \
882 VFP_BINOP(add)
883 VFP_BINOP(sub)
884 VFP_BINOP(mul)
885 VFP_BINOP(div)
886 #undef VFP_BINOP
888 #define VFP_HELPER(name) \
889 VFP_OP(name, s) \
891 do_vfp_##name##s(); \
893 VFP_OP(name, d) \
895 do_vfp_##name##d(); \
897 VFP_HELPER(abs)
898 VFP_HELPER(sqrt)
899 VFP_HELPER(cmp)
900 VFP_HELPER(cmpe)
901 #undef VFP_HELPER
903 /* XXX: Will this do the right thing for NANs. Should invert the signbit
904 without looking at the rest of the value. */
905 VFP_OP(neg, s)
907 FT0s = float32_chs(FT0s);
910 VFP_OP(neg, d)
912 FT0d = float64_chs(FT0d);
915 VFP_OP(F1_ld0, s)
917 union {
918 uint32_t i;
919 float32 s;
920 } v;
921 v.i = 0;
922 FT1s = v.s;
925 VFP_OP(F1_ld0, d)
927 union {
928 uint64_t i;
929 float64 d;
930 } v;
931 v.i = 0;
932 FT1d = v.d;
935 /* Helper routines to perform bitwise copies between float and int. */
936 static inline float32 vfp_itos(uint32_t i)
938 union {
939 uint32_t i;
940 float32 s;
941 } v;
943 v.i = i;
944 return v.s;
947 static inline uint32_t vfp_stoi(float32 s)
949 union {
950 uint32_t i;
951 float32 s;
952 } v;
954 v.s = s;
955 return v.i;
958 /* Integer to float conversion. */
959 VFP_OP(uito, s)
961 FT0s = uint32_to_float32(vfp_stoi(FT0s), &env->vfp.fp_status);
964 VFP_OP(uito, d)
966 FT0d = uint32_to_float64(vfp_stoi(FT0s), &env->vfp.fp_status);
969 VFP_OP(sito, s)
971 FT0s = int32_to_float32(vfp_stoi(FT0s), &env->vfp.fp_status);
974 VFP_OP(sito, d)
976 FT0d = int32_to_float64(vfp_stoi(FT0s), &env->vfp.fp_status);
979 /* Float to integer conversion. */
980 VFP_OP(toui, s)
982 FT0s = vfp_itos(float32_to_uint32(FT0s, &env->vfp.fp_status));
985 VFP_OP(toui, d)
987 FT0s = vfp_itos(float64_to_uint32(FT0d, &env->vfp.fp_status));
990 VFP_OP(tosi, s)
992 FT0s = vfp_itos(float32_to_int32(FT0s, &env->vfp.fp_status));
995 VFP_OP(tosi, d)
997 FT0s = vfp_itos(float64_to_int32(FT0d, &env->vfp.fp_status));
1000 /* TODO: Set rounding mode properly. */
1001 VFP_OP(touiz, s)
1003 FT0s = vfp_itos(float32_to_uint32_round_to_zero(FT0s, &env->vfp.fp_status));
1006 VFP_OP(touiz, d)
1008 FT0s = vfp_itos(float64_to_uint32_round_to_zero(FT0d, &env->vfp.fp_status));
1011 VFP_OP(tosiz, s)
1013 FT0s = vfp_itos(float32_to_int32_round_to_zero(FT0s, &env->vfp.fp_status));
1016 VFP_OP(tosiz, d)
1018 FT0s = vfp_itos(float64_to_int32_round_to_zero(FT0d, &env->vfp.fp_status));
1021 /* floating point conversion */
1022 VFP_OP(fcvtd, s)
1024 FT0d = float32_to_float64(FT0s, &env->vfp.fp_status);
1027 VFP_OP(fcvts, d)
1029 FT0s = float64_to_float32(FT0d, &env->vfp.fp_status);
1032 /* Get and Put values from registers. */
1033 VFP_OP(getreg_F0, d)
1035 FT0d = *(float64 *)((char *) env + PARAM1);
1038 VFP_OP(getreg_F0, s)
1040 FT0s = *(float32 *)((char *) env + PARAM1);
1043 VFP_OP(getreg_F1, d)
1045 FT1d = *(float64 *)((char *) env + PARAM1);
1048 VFP_OP(getreg_F1, s)
1050 FT1s = *(float32 *)((char *) env + PARAM1);
1053 VFP_OP(setreg_F0, d)
1055 *(float64 *)((char *) env + PARAM1) = FT0d;
1058 VFP_OP(setreg_F0, s)
1060 *(float32 *)((char *) env + PARAM1) = FT0s;
1063 void OPPROTO op_vfp_movl_T0_fpscr(void)
1065 do_vfp_get_fpscr ();
1068 void OPPROTO op_vfp_movl_T0_fpscr_flags(void)
1070 T0 = env->vfp.fpscr & (0xf << 28);
1073 void OPPROTO op_vfp_movl_fpscr_T0(void)
1075 do_vfp_set_fpscr();
1078 /* Move between FT0s to T0 */
1079 void OPPROTO op_vfp_mrs(void)
1081 T0 = vfp_stoi(FT0s);
1084 void OPPROTO op_vfp_msr(void)
1086 FT0s = vfp_itos(T0);
1089 /* Move between FT0d and {T0,T1} */
1090 void OPPROTO op_vfp_mrrd(void)
1092 CPU_DoubleU u;
1094 u.d = FT0d;
1095 T0 = u.l.lower;
1096 T1 = u.l.upper;
1099 void OPPROTO op_vfp_mdrr(void)
1101 CPU_DoubleU u;
1103 u.l.lower = T0;
1104 u.l.upper = T1;
1105 FT0d = u.d;
1108 /* Floating point load/store. Address is in T1 */
1109 void OPPROTO op_vfp_lds(void)
1111 FT0s = ldfl((void *)T1);
1114 void OPPROTO op_vfp_ldd(void)
1116 FT0d = ldfq((void *)T1);
1119 void OPPROTO op_vfp_sts(void)
1121 stfl((void *)T1, FT0s);
1124 void OPPROTO op_vfp_std(void)
1126 stfq((void *)T1, FT0d);