Fix setting counter limit to 0 (Robert Reif)
[qemu/qemu_0_9_1_stable.git] / hw / mac_nvram.c
blob7304ac27e0a173e5dde08111107a457debd85674
1 /*
2 * PowerMac NVRAM emulation
4 * Copyright (c) 2005-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
25 #include "hw.h"
26 #include "ppc_mac.h"
28 struct MacIONVRAMState {
29 target_phys_addr_t mem_base;
30 target_phys_addr_t size;
31 int mem_index;
32 uint8_t data[0x2000];
35 /* Direct access to NVRAM */
36 uint32_t macio_nvram_read (void *opaque, uint32_t addr)
38 MacIONVRAMState *s = opaque;
39 uint32_t ret;
41 // printf("%s: %p addr %04x\n", __func__, s, addr);
42 if (addr < 0x2000)
43 ret = s->data[addr];
44 else
45 ret = -1;
47 return ret;
50 void macio_nvram_write (void *opaque, uint32_t addr, uint32_t val)
52 MacIONVRAMState *s = opaque;
54 // printf("%s: %p addr %04x val %02x\n", __func__, s, addr, val);
55 if (addr < 0x2000)
56 s->data[addr] = val;
59 /* macio style NVRAM device */
60 static void macio_nvram_writeb (void *opaque,
61 target_phys_addr_t addr, uint32_t value)
63 MacIONVRAMState *s = opaque;
65 addr -= s->mem_base;
66 addr = (addr >> 4) & 0x1fff;
67 s->data[addr] = value;
68 // printf("macio_nvram_writeb %04x = %02x\n", addr, value);
71 static uint32_t macio_nvram_readb (void *opaque, target_phys_addr_t addr)
73 MacIONVRAMState *s = opaque;
74 uint32_t value;
76 addr -= s->mem_base;
77 addr = (addr >> 4) & 0x1fff;
78 value = s->data[addr];
79 // printf("macio_nvram_readb %04x = %02x\n", addr, value);
81 return value;
84 static CPUWriteMemoryFunc *nvram_write[] = {
85 &macio_nvram_writeb,
86 &macio_nvram_writeb,
87 &macio_nvram_writeb,
90 static CPUReadMemoryFunc *nvram_read[] = {
91 &macio_nvram_readb,
92 &macio_nvram_readb,
93 &macio_nvram_readb,
96 MacIONVRAMState *macio_nvram_init (int *mem_index, target_phys_addr_t size)
98 MacIONVRAMState *s;
100 s = qemu_mallocz(sizeof(MacIONVRAMState));
101 if (!s)
102 return NULL;
103 s->size = size;
104 s->mem_index = cpu_register_io_memory(0, nvram_read, nvram_write, s);
105 *mem_index = s->mem_index;
107 return s;
110 void macio_nvram_map (void *opaque, target_phys_addr_t mem_base)
112 MacIONVRAMState *s;
114 s = opaque;
115 s->mem_base = mem_base;
116 cpu_register_physical_memory(mem_base, s->size, s->mem_index);
119 static uint8_t nvram_chksum (const uint8_t *buf, int n)
121 int sum, i;
122 sum = 0;
123 for(i = 0; i < n; i++)
124 sum += buf[i];
125 return (sum & 0xff) + (sum >> 8);
128 /* set a free Mac OS NVRAM partition */
129 void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len)
131 uint8_t *buf;
132 char partition_name[12] = "wwwwwwwwwwww";
134 buf = nvr->data;
135 buf[0] = 0x7f; /* free partition magic */
136 buf[1] = 0; /* checksum */
137 buf[2] = len >> 8;
138 buf[3] = len;
139 memcpy(buf + 4, partition_name, 12);
140 buf[1] = nvram_chksum(buf, 16);