2 * Example of use of user mode libqemu: launch a basic .com DOS
18 CPUState
*cpu_single_env
= NULL
;
20 void cpu_outb(CPUState
*env
, int addr
, int val
)
22 fprintf(stderr
, "outb: port=0x%04x, data=%02x\n", addr
, val
);
25 void cpu_outw(CPUState
*env
, int addr
, int val
)
27 fprintf(stderr
, "outw: port=0x%04x, data=%04x\n", addr
, val
);
30 void cpu_outl(CPUState
*env
, int addr
, int val
)
32 fprintf(stderr
, "outl: port=0x%04x, data=%08x\n", addr
, val
);
35 int cpu_inb(CPUState
*env
, int addr
)
37 fprintf(stderr
, "inb: port=0x%04x\n", addr
);
41 int cpu_inw(CPUState
*env
, int addr
)
43 fprintf(stderr
, "inw: port=0x%04x\n", addr
);
47 int cpu_inl(CPUState
*env
, int addr
)
49 fprintf(stderr
, "inl: port=0x%04x\n", addr
);
53 int cpu_get_pic_interrupt(CPUState
*env
)
58 uint64_t cpu_get_tsc(CPUState
*env
)
63 static void set_gate(void *ptr
, unsigned int type
, unsigned int dpl
,
64 unsigned long addr
, unsigned int sel
)
67 e1
= (addr
& 0xffff) | (sel
<< 16);
68 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
69 stl((uint8_t *)ptr
, e1
);
70 stl((uint8_t *)ptr
+ 4, e2
);
73 uint64_t idt_table
[256];
75 /* only dpl matters as we do only user space emulation */
76 static void set_idt(int n
, unsigned int dpl
)
78 set_gate(idt_table
+ n
, 0, dpl
, 0, 0);
81 void qemu_free(void *ptr
)
86 void *qemu_malloc(size_t size
)
91 void qemu_printf(const char *fmt
, ...)
99 /* XXX: this is a bug in helper2.c */
102 /**********************************************/
104 #define COM_BASE_ADDR 0x10100
108 printf("qruncom version 0.1 (c) 2003 Fabrice Bellard\n"
109 "usage: qruncom file.com\n"
110 "user mode libqemu demo: run simple .com DOS executables\n");
114 static inline uint8_t *seg_to_linear(unsigned int seg
, unsigned int reg
)
116 return (uint8_t *)((seg
<< 4) + (reg
& 0xffff));
119 static inline void pushw(CPUState
*env
, int val
)
121 env
->regs
[R_ESP
] = (env
->regs
[R_ESP
] & ~0xffff) | ((env
->regs
[R_ESP
] - 2) & 0xffff);
122 *(uint16_t *)seg_to_linear(env
->segs
[R_SS
].selector
, env
->regs
[R_ESP
]) = val
;
125 static void host_segv_handler(int host_signum
, siginfo_t
*info
,
128 if (cpu_signal_handler(host_signum
, info
, puc
)) {
134 int main(int argc
, char **argv
)
137 const char *filename
;
145 vm86_mem
= mmap((void *)0x00000000, 0x110000,
146 PROT_WRITE
| PROT_READ
| PROT_EXEC
,
147 MAP_FIXED
| MAP_ANON
| MAP_PRIVATE
, -1, 0);
148 if (vm86_mem
== MAP_FAILED
) {
153 /* load the MSDOS .com executable */
154 fd
= open(filename
, O_RDONLY
);
159 ret
= read(fd
, vm86_mem
+ COM_BASE_ADDR
, 65536 - 256);
166 /* install exception handler for CPU emulator */
168 struct sigaction act
;
170 sigfillset(&act
.sa_mask
);
171 act
.sa_flags
= SA_SIGINFO
;
172 // act.sa_flags |= SA_ONSTACK;
174 act
.sa_sigaction
= host_segv_handler
;
175 sigaction(SIGSEGV
, &act
, NULL
);
176 sigaction(SIGBUS
, &act
, NULL
);
177 #if defined (TARGET_I386) && defined(USE_CODE_COPY)
178 sigaction(SIGFPE
, &act
, NULL
);
182 // cpu_set_log(CPU_LOG_TB_IN_ASM | CPU_LOG_TB_OUT_ASM | CPU_LOG_EXEC);
186 /* disable code copy to simplify debugging */
187 code_copy_enabled
= 0;
189 /* set user mode state (XXX: should be done automatically by
191 env
->user_mode_only
= 1;
193 cpu_x86_set_cpl(env
, 3);
195 env
->cr
[0] = CR0_PG_MASK
| CR0_WP_MASK
| CR0_PE_MASK
;
196 /* NOTE: hflags duplicates some of the virtual CPU state */
197 env
->hflags
|= HF_PE_MASK
| VM_MASK
;
199 /* flags setup : we activate the IRQs by default as in user
200 mode. We also activate the VM86 flag to run DOS code */
201 env
->eflags
|= IF_MASK
| VM_MASK
;
203 /* init basic registers */
205 env
->regs
[R_ESP
] = 0xfffe;
206 seg
= (COM_BASE_ADDR
- 0x100) >> 4;
208 cpu_x86_load_seg_cache(env
, R_CS
, seg
,
209 (uint8_t *)(seg
<< 4), 0xffff, 0);
210 cpu_x86_load_seg_cache(env
, R_SS
, seg
,
211 (uint8_t *)(seg
<< 4), 0xffff, 0);
212 cpu_x86_load_seg_cache(env
, R_DS
, seg
,
213 (uint8_t *)(seg
<< 4), 0xffff, 0);
214 cpu_x86_load_seg_cache(env
, R_ES
, seg
,
215 (uint8_t *)(seg
<< 4), 0xffff, 0);
216 cpu_x86_load_seg_cache(env
, R_FS
, seg
,
217 (uint8_t *)(seg
<< 4), 0xffff, 0);
218 cpu_x86_load_seg_cache(env
, R_GS
, seg
,
219 (uint8_t *)(seg
<< 4), 0xffff, 0);
221 /* exception support */
222 env
->idt
.base
= (void *)idt_table
;
223 env
->idt
.limit
= sizeof(idt_table
) - 1;
245 /* put return code */
246 *seg_to_linear(env
->segs
[R_CS
].selector
, 0) = 0xb4; /* mov ah, $0 */
247 *seg_to_linear(env
->segs
[R_CS
].selector
, 1) = 0x00;
248 *seg_to_linear(env
->segs
[R_CS
].selector
, 2) = 0xcd; /* int $0x21 */
249 *seg_to_linear(env
->segs
[R_CS
].selector
, 3) = 0x21;
252 /* the value of these registers seem to be assumed by pi_10.com */
253 env
->regs
[R_ESI
] = 0x100;
254 env
->regs
[R_ECX
] = 0xff;
255 env
->regs
[R_EBP
] = 0x0900;
256 env
->regs
[R_EDI
] = 0xfffe;
258 /* inform the emulator of the mmaped memory */
259 page_set_flags(0x00000000, 0x110000,
260 PAGE_WRITE
| PAGE_READ
| PAGE_EXEC
| PAGE_VALID
);
263 ret
= cpu_x86_exec(env
);
268 int_num
= *(env
->segs
[R_CS
].base
+ env
->eip
+ 1);
271 ah
= (env
->regs
[R_EAX
] >> 8) & 0xff;
273 case 0x00: /* exit */
275 case 0x02: /* write char */
277 uint8_t c
= env
->regs
[R_EDX
];
281 case 0x09: /* write string */
285 c
= *seg_to_linear(env
->segs
[R_DS
].selector
, env
->regs
[R_EAX
]);
290 env
->regs
[R_EAX
] = (env
->regs
[R_EAX
] & ~0xff) | '$';
295 fprintf(stderr
, "unsupported int 0x%02x\n", int_num
);
296 cpu_dump_state(env
, stderr
, 0);
303 fprintf(stderr
, "unhandled cpu_exec return code (0x%x)\n", ret
);
304 cpu_dump_state(env
, stderr
, 0);