4 * Copyright (c) 2006-2007 CodeSourcery
5 * Written by Paul Brook
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
41 static m68k_def_t m68k_cpu_defs
[] = {
42 {"m5206", M68K_CPUID_M5206
},
43 {"m5208", M68K_CPUID_M5208
},
44 {"cfv4e", M68K_CPUID_CFV4E
},
45 {"any", M68K_CPUID_ANY
},
49 static void m68k_set_feature(CPUM68KState
*env
, int feature
)
51 env
->features
|= (1u << feature
);
54 int cpu_m68k_set_model(CPUM68KState
*env
, const char * name
)
58 for (def
= m68k_cpu_defs
; def
->name
; def
++) {
59 if (strcmp(def
->name
, name
) == 0)
66 case M68K_CPUID_M5206
:
67 m68k_set_feature(env
, M68K_FEATURE_CF_ISA_A
);
69 case M68K_CPUID_M5208
:
70 m68k_set_feature(env
, M68K_FEATURE_CF_ISA_A
);
71 m68k_set_feature(env
, M68K_FEATURE_CF_ISA_APLUSC
);
72 m68k_set_feature(env
, M68K_FEATURE_BRAL
);
73 m68k_set_feature(env
, M68K_FEATURE_CF_EMAC
);
74 m68k_set_feature(env
, M68K_FEATURE_USP
);
76 case M68K_CPUID_CFV4E
:
77 m68k_set_feature(env
, M68K_FEATURE_CF_ISA_A
);
78 m68k_set_feature(env
, M68K_FEATURE_CF_ISA_B
);
79 m68k_set_feature(env
, M68K_FEATURE_BRAL
);
80 m68k_set_feature(env
, M68K_FEATURE_CF_FPU
);
81 m68k_set_feature(env
, M68K_FEATURE_CF_EMAC
);
82 m68k_set_feature(env
, M68K_FEATURE_USP
);
85 m68k_set_feature(env
, M68K_FEATURE_CF_ISA_A
);
86 m68k_set_feature(env
, M68K_FEATURE_CF_ISA_B
);
87 m68k_set_feature(env
, M68K_FEATURE_CF_ISA_APLUSC
);
88 m68k_set_feature(env
, M68K_FEATURE_BRAL
);
89 m68k_set_feature(env
, M68K_FEATURE_CF_FPU
);
90 /* MAC and EMAC are mututally exclusive, so pick EMAC.
91 It's mostly backwards compatible. */
92 m68k_set_feature(env
, M68K_FEATURE_CF_EMAC
);
93 m68k_set_feature(env
, M68K_FEATURE_CF_EMAC_B
);
94 m68k_set_feature(env
, M68K_FEATURE_USP
);
95 m68k_set_feature(env
, M68K_FEATURE_EXT_FULL
);
96 m68k_set_feature(env
, M68K_FEATURE_WORD_INDEX
);
100 register_m68k_insns(env
);
105 void cpu_m68k_flush_flags(CPUM68KState
*env
, int cc_op
)
112 #define HIGHBIT 0x80000000u
114 #define SET_NZ(x) do { \
117 else if ((int32_t)(x) < 0) \
121 #define SET_FLAGS_SUB(type, utype) do { \
122 SET_NZ((type)dest); \
124 if ((utype) tmp < (utype) src) \
126 if ((1u << (sizeof(type) * 8 - 1)) & (tmp ^ dest) & (tmp ^ src)) \
145 if (HIGHBIT
& (src
^ dest
) & ~(tmp
^ src
))
149 SET_FLAGS_SUB(int32_t, uint32_t);
152 SET_FLAGS_SUB(int8_t, uint8_t);
155 SET_FLAGS_SUB(int16_t, uint16_t);
161 tmp
= dest
- src
- 1;
162 if (HIGHBIT
& (src
^ dest
) & ~(tmp
^ src
))
167 tmp
= dest
+ src
+ 1;
170 if (HIGHBIT
& (tmp
^ dest
) & (tmp
^ src
))
180 if (src
&& src
<= 32 && (dest
& (1 << (32 - src
))))
190 if (src
&& src
<= 32 && ((dest
>> (src
- 1)) & 1))
197 tmp
= (int32_t)dest
>> src
;
200 if (src
&& src
<= 32 && (((int32_t)dest
>> (src
- 1)) & 1))
204 cpu_abort(env
, "Bad CC_OP %d", cc_op
);
206 env
->cc_op
= CC_OP_FLAGS
;
207 env
->cc_dest
= flags
;
210 float64
helper_sub_cmpf64(CPUM68KState
*env
, float64 src0
, float64 src1
)
212 /* ??? This may incorrectly raise exceptions. */
213 /* ??? Should flush denormals to zero. */
215 res
= float64_sub(src0
, src1
, &env
->fp_status
);
216 if (float64_is_nan(res
)) {
217 /* +/-inf compares equal against itself, but sub returns nan. */
218 if (!float64_is_nan(src0
)
219 && !float64_is_nan(src1
)) {
221 if (float64_lt_quiet(src0
, res
, &env
->fp_status
))
222 res
= float64_chs(res
);
228 void helper_movec(CPUM68KState
*env
, int reg
, uint32_t val
)
231 case 0x02: /* CACR */
235 case 0x04: case 0x05: case 0x06: case 0x07: /* ACR[0-3] */
236 /* TODO: Implement Access Control Registers. */
238 case 0x801: /* VBR */
241 /* TODO: Implement control registers. */
243 cpu_abort(env
, "Unimplemented control register write 0x%x = 0x%x\n",
248 void m68k_set_macsr(CPUM68KState
*env
, uint32_t val
)
255 if ((env
->macsr
^ val
) & (MACSR_FI
| MACSR_SU
)) {
256 for (i
= 0; i
< 4; i
++) {
257 regval
= env
->macc
[i
];
258 exthigh
= regval
>> 40;
259 if (env
->macsr
& MACSR_FI
) {
264 extlow
= regval
>> 32;
266 if (env
->macsr
& MACSR_FI
) {
267 regval
= (((uint64_t)acc
) << 8) | extlow
;
268 regval
|= ((int64_t)exthigh
) << 40;
269 } else if (env
->macsr
& MACSR_SU
) {
270 regval
= acc
| (((int64_t)extlow
) << 32);
271 regval
|= ((int64_t)exthigh
) << 40;
273 regval
= acc
| (((uint64_t)extlow
) << 32);
274 regval
|= ((uint64_t)(uint8_t)exthigh
) << 40;
276 env
->macc
[i
] = regval
;
282 void m68k_switch_sp(CPUM68KState
*env
)
286 env
->sp
[env
->current_sp
] = env
->aregs
[7];
287 new_sp
= (env
->sr
& SR_S
&& env
->cacr
& M68K_CACR_EUSP
)
288 ? M68K_SSP
: M68K_USP
;
289 env
->aregs
[7] = env
->sp
[new_sp
];
290 env
->current_sp
= new_sp
;
295 /* TODO: This will need fixing once the MMU is implemented. */
296 target_phys_addr_t
cpu_get_phys_page_debug(CPUState
*env
, target_ulong addr
)
301 #if defined(CONFIG_USER_ONLY)
303 int cpu_m68k_handle_mmu_fault (CPUState
*env
, target_ulong address
, int rw
,
304 int mmu_idx
, int is_softmmu
)
306 env
->exception_index
= EXCP_ACCESS
;
307 env
->mmu
.ar
= address
;
313 int cpu_m68k_handle_mmu_fault (CPUState
*env
, target_ulong address
, int rw
,
314 int mmu_idx
, int is_softmmu
)
318 address
&= TARGET_PAGE_MASK
;
319 prot
= PAGE_READ
| PAGE_WRITE
;
320 return tlb_set_page(env
, address
, address
, prot
, mmu_idx
, is_softmmu
);
323 /* Notify CPU of a pending interrupt. Prioritization and vectoring should
324 be handled by the interrupt controller. Real hardware only requests
325 the vector when the interrupt is acknowledged by the CPU. For
326 simplicitly we calculate it when the interrupt is signalled. */
327 void m68k_set_irq_level(CPUM68KState
*env
, int level
, uint8_t vector
)
329 env
->pending_level
= level
;
330 env
->pending_vector
= vector
;
332 cpu_interrupt(env
, CPU_INTERRUPT_HARD
);
334 cpu_reset_interrupt(env
, CPU_INTERRUPT_HARD
);