Fix Lance on 32-bit hosts
[qemu/qemu_0_9_1_stable.git] / gdbstub.c
blob2ec2f33f8dcf913c2c1a17a2f8ce67aeb4df9e5d
1 /*
2 * gdb server stub
3 *
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include "config.h"
21 #ifdef CONFIG_USER_ONLY
22 #include <stdlib.h>
23 #include <stdio.h>
24 #include <stdarg.h>
25 #include <string.h>
26 #include <errno.h>
27 #include <unistd.h>
28 #include <fcntl.h>
30 #include "qemu.h"
31 #else
32 #include "vl.h"
33 #endif
35 #include "qemu_socket.h"
36 #ifdef _WIN32
37 /* XXX: these constants may be independent of the host ones even for Unix */
38 #ifndef SIGTRAP
39 #define SIGTRAP 5
40 #endif
41 #ifndef SIGINT
42 #define SIGINT 2
43 #endif
44 #else
45 #include <signal.h>
46 #endif
48 //#define DEBUG_GDB
50 enum RSState {
51 RS_IDLE,
52 RS_GETLINE,
53 RS_CHKSUM1,
54 RS_CHKSUM2,
55 RS_SYSCALL,
57 typedef struct GDBState {
58 CPUState *env; /* current CPU */
59 enum RSState state; /* parsing state */
60 char line_buf[4096];
61 int line_buf_index;
62 int line_csum;
63 char last_packet[4100];
64 int last_packet_len;
65 #ifdef CONFIG_USER_ONLY
66 int fd;
67 int running_state;
68 #else
69 CharDriverState *chr;
70 #endif
71 } GDBState;
73 #ifdef CONFIG_USER_ONLY
74 /* XXX: This is not thread safe. Do we care? */
75 static int gdbserver_fd = -1;
77 /* XXX: remove this hack. */
78 static GDBState gdbserver_state;
80 static int get_char(GDBState *s)
82 uint8_t ch;
83 int ret;
85 for(;;) {
86 ret = recv(s->fd, &ch, 1, 0);
87 if (ret < 0) {
88 if (errno != EINTR && errno != EAGAIN)
89 return -1;
90 } else if (ret == 0) {
91 return -1;
92 } else {
93 break;
96 return ch;
98 #endif
100 /* GDB stub state for use by semihosting syscalls. */
101 static GDBState *gdb_syscall_state;
102 static gdb_syscall_complete_cb gdb_current_syscall_cb;
104 enum {
105 GDB_SYS_UNKNOWN,
106 GDB_SYS_ENABLED,
107 GDB_SYS_DISABLED,
108 } gdb_syscall_mode;
110 /* If gdb is connected when the first semihosting syscall occurs then use
111 remote gdb syscalls. Otherwise use native file IO. */
112 int use_gdb_syscalls(void)
114 if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
115 gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
116 : GDB_SYS_DISABLED);
118 return gdb_syscall_mode == GDB_SYS_ENABLED;
121 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
123 #ifdef CONFIG_USER_ONLY
124 int ret;
126 while (len > 0) {
127 ret = send(s->fd, buf, len, 0);
128 if (ret < 0) {
129 if (errno != EINTR && errno != EAGAIN)
130 return;
131 } else {
132 buf += ret;
133 len -= ret;
136 #else
137 qemu_chr_write(s->chr, buf, len);
138 #endif
141 static inline int fromhex(int v)
143 if (v >= '0' && v <= '9')
144 return v - '0';
145 else if (v >= 'A' && v <= 'F')
146 return v - 'A' + 10;
147 else if (v >= 'a' && v <= 'f')
148 return v - 'a' + 10;
149 else
150 return 0;
153 static inline int tohex(int v)
155 if (v < 10)
156 return v + '0';
157 else
158 return v - 10 + 'a';
161 static void memtohex(char *buf, const uint8_t *mem, int len)
163 int i, c;
164 char *q;
165 q = buf;
166 for(i = 0; i < len; i++) {
167 c = mem[i];
168 *q++ = tohex(c >> 4);
169 *q++ = tohex(c & 0xf);
171 *q = '\0';
174 static void hextomem(uint8_t *mem, const char *buf, int len)
176 int i;
178 for(i = 0; i < len; i++) {
179 mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
180 buf += 2;
184 /* return -1 if error, 0 if OK */
185 static int put_packet(GDBState *s, char *buf)
187 int len, csum, i;
188 char *p;
190 #ifdef DEBUG_GDB
191 printf("reply='%s'\n", buf);
192 #endif
194 for(;;) {
195 p = s->last_packet;
196 *(p++) = '$';
197 len = strlen(buf);
198 memcpy(p, buf, len);
199 p += len;
200 csum = 0;
201 for(i = 0; i < len; i++) {
202 csum += buf[i];
204 *(p++) = '#';
205 *(p++) = tohex((csum >> 4) & 0xf);
206 *(p++) = tohex((csum) & 0xf);
208 s->last_packet_len = p - s->last_packet;
209 put_buffer(s, s->last_packet, s->last_packet_len);
211 #ifdef CONFIG_USER_ONLY
212 i = get_char(s);
213 if (i < 0)
214 return -1;
215 if (i == '+')
216 break;
217 #else
218 break;
219 #endif
221 return 0;
224 #if defined(TARGET_I386)
226 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
228 uint32_t *registers = (uint32_t *)mem_buf;
229 int i, fpus;
231 for(i = 0; i < 8; i++) {
232 registers[i] = env->regs[i];
234 registers[8] = env->eip;
235 registers[9] = env->eflags;
236 registers[10] = env->segs[R_CS].selector;
237 registers[11] = env->segs[R_SS].selector;
238 registers[12] = env->segs[R_DS].selector;
239 registers[13] = env->segs[R_ES].selector;
240 registers[14] = env->segs[R_FS].selector;
241 registers[15] = env->segs[R_GS].selector;
242 /* XXX: convert floats */
243 for(i = 0; i < 8; i++) {
244 memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
246 registers[36] = env->fpuc;
247 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
248 registers[37] = fpus;
249 registers[38] = 0; /* XXX: convert tags */
250 registers[39] = 0; /* fiseg */
251 registers[40] = 0; /* fioff */
252 registers[41] = 0; /* foseg */
253 registers[42] = 0; /* fooff */
254 registers[43] = 0; /* fop */
256 for(i = 0; i < 16; i++)
257 tswapls(&registers[i]);
258 for(i = 36; i < 44; i++)
259 tswapls(&registers[i]);
260 return 44 * 4;
263 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
265 uint32_t *registers = (uint32_t *)mem_buf;
266 int i;
268 for(i = 0; i < 8; i++) {
269 env->regs[i] = tswapl(registers[i]);
271 env->eip = tswapl(registers[8]);
272 env->eflags = tswapl(registers[9]);
273 #if defined(CONFIG_USER_ONLY)
274 #define LOAD_SEG(index, sreg)\
275 if (tswapl(registers[index]) != env->segs[sreg].selector)\
276 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
277 LOAD_SEG(10, R_CS);
278 LOAD_SEG(11, R_SS);
279 LOAD_SEG(12, R_DS);
280 LOAD_SEG(13, R_ES);
281 LOAD_SEG(14, R_FS);
282 LOAD_SEG(15, R_GS);
283 #endif
286 #elif defined (TARGET_PPC)
287 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
289 uint32_t *registers = (uint32_t *)mem_buf, tmp;
290 int i;
292 /* fill in gprs */
293 for(i = 0; i < 32; i++) {
294 registers[i] = tswapl(env->gpr[i]);
296 /* fill in fprs */
297 for (i = 0; i < 32; i++) {
298 registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
299 registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
301 /* nip, msr, ccr, lnk, ctr, xer, mq */
302 registers[96] = tswapl(env->nip);
303 registers[97] = tswapl(do_load_msr(env));
304 tmp = 0;
305 for (i = 0; i < 8; i++)
306 tmp |= env->crf[i] << (32 - ((i + 1) * 4));
307 registers[98] = tswapl(tmp);
308 registers[99] = tswapl(env->lr);
309 registers[100] = tswapl(env->ctr);
310 registers[101] = tswapl(ppc_load_xer(env));
311 registers[102] = 0;
313 return 103 * 4;
316 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
318 uint32_t *registers = (uint32_t *)mem_buf;
319 int i;
321 /* fill in gprs */
322 for (i = 0; i < 32; i++) {
323 env->gpr[i] = tswapl(registers[i]);
325 /* fill in fprs */
326 for (i = 0; i < 32; i++) {
327 *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
328 *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
330 /* nip, msr, ccr, lnk, ctr, xer, mq */
331 env->nip = tswapl(registers[96]);
332 do_store_msr(env, tswapl(registers[97]));
333 registers[98] = tswapl(registers[98]);
334 for (i = 0; i < 8; i++)
335 env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
336 env->lr = tswapl(registers[99]);
337 env->ctr = tswapl(registers[100]);
338 ppc_store_xer(env, tswapl(registers[101]));
340 #elif defined (TARGET_SPARC)
341 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
343 target_ulong *registers = (target_ulong *)mem_buf;
344 int i;
346 /* fill in g0..g7 */
347 for(i = 0; i < 8; i++) {
348 registers[i] = tswapl(env->gregs[i]);
350 /* fill in register window */
351 for(i = 0; i < 24; i++) {
352 registers[i + 8] = tswapl(env->regwptr[i]);
354 #ifndef TARGET_SPARC64
355 /* fill in fprs */
356 for (i = 0; i < 32; i++) {
357 registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
359 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
360 registers[64] = tswapl(env->y);
362 target_ulong tmp;
364 tmp = GET_PSR(env);
365 registers[65] = tswapl(tmp);
367 registers[66] = tswapl(env->wim);
368 registers[67] = tswapl(env->tbr);
369 registers[68] = tswapl(env->pc);
370 registers[69] = tswapl(env->npc);
371 registers[70] = tswapl(env->fsr);
372 registers[71] = 0; /* csr */
373 registers[72] = 0;
374 return 73 * sizeof(target_ulong);
375 #else
376 /* fill in fprs */
377 for (i = 0; i < 64; i += 2) {
378 uint64_t tmp;
380 tmp = ((uint64_t)*(uint32_t *)&env->fpr[i]) << 32;
381 tmp |= *(uint32_t *)&env->fpr[i + 1];
382 registers[i / 2 + 32] = tswap64(tmp);
384 registers[64] = tswapl(env->pc);
385 registers[65] = tswapl(env->npc);
386 registers[66] = tswapl(env->tstate[env->tl]);
387 registers[67] = tswapl(env->fsr);
388 registers[68] = tswapl(env->fprs);
389 registers[69] = tswapl(env->y);
390 return 70 * sizeof(target_ulong);
391 #endif
394 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
396 target_ulong *registers = (target_ulong *)mem_buf;
397 int i;
399 /* fill in g0..g7 */
400 for(i = 0; i < 7; i++) {
401 env->gregs[i] = tswapl(registers[i]);
403 /* fill in register window */
404 for(i = 0; i < 24; i++) {
405 env->regwptr[i] = tswapl(registers[i + 8]);
407 #ifndef TARGET_SPARC64
408 /* fill in fprs */
409 for (i = 0; i < 32; i++) {
410 *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
412 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
413 env->y = tswapl(registers[64]);
414 PUT_PSR(env, tswapl(registers[65]));
415 env->wim = tswapl(registers[66]);
416 env->tbr = tswapl(registers[67]);
417 env->pc = tswapl(registers[68]);
418 env->npc = tswapl(registers[69]);
419 env->fsr = tswapl(registers[70]);
420 #else
421 for (i = 0; i < 64; i += 2) {
422 uint64_t tmp;
424 tmp = tswap64(registers[i / 2 + 32]);
425 *((uint32_t *)&env->fpr[i]) = tmp >> 32;
426 *((uint32_t *)&env->fpr[i + 1]) = tmp & 0xffffffff;
428 env->pc = tswapl(registers[64]);
429 env->npc = tswapl(registers[65]);
430 env->tstate[env->tl] = tswapl(registers[66]);
431 env->fsr = tswapl(registers[67]);
432 env->fprs = tswapl(registers[68]);
433 env->y = tswapl(registers[69]);
434 #endif
436 #elif defined (TARGET_ARM)
437 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
439 int i;
440 uint8_t *ptr;
442 ptr = mem_buf;
443 /* 16 core integer registers (4 bytes each). */
444 for (i = 0; i < 16; i++)
446 *(uint32_t *)ptr = tswapl(env->regs[i]);
447 ptr += 4;
449 /* 8 FPA registers (12 bytes each), FPS (4 bytes).
450 Not yet implemented. */
451 memset (ptr, 0, 8 * 12 + 4);
452 ptr += 8 * 12 + 4;
453 /* CPSR (4 bytes). */
454 *(uint32_t *)ptr = tswapl (cpsr_read(env));
455 ptr += 4;
457 return ptr - mem_buf;
460 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
462 int i;
463 uint8_t *ptr;
465 ptr = mem_buf;
466 /* Core integer registers. */
467 for (i = 0; i < 16; i++)
469 env->regs[i] = tswapl(*(uint32_t *)ptr);
470 ptr += 4;
472 /* Ignore FPA regs and scr. */
473 ptr += 8 * 12 + 4;
474 cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
476 #elif defined (TARGET_M68K)
477 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
479 int i;
480 uint8_t *ptr;
481 CPU_DoubleU u;
483 ptr = mem_buf;
484 /* D0-D7 */
485 for (i = 0; i < 8; i++) {
486 *(uint32_t *)ptr = tswapl(env->dregs[i]);
487 ptr += 4;
489 /* A0-A7 */
490 for (i = 0; i < 8; i++) {
491 *(uint32_t *)ptr = tswapl(env->aregs[i]);
492 ptr += 4;
494 *(uint32_t *)ptr = tswapl(env->sr);
495 ptr += 4;
496 *(uint32_t *)ptr = tswapl(env->pc);
497 ptr += 4;
498 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
499 ColdFire has 8-bit double precision registers. */
500 for (i = 0; i < 8; i++) {
501 u.d = env->fregs[i];
502 *(uint32_t *)ptr = tswap32(u.l.upper);
503 *(uint32_t *)ptr = tswap32(u.l.lower);
505 /* FP control regs (not implemented). */
506 memset (ptr, 0, 3 * 4);
507 ptr += 3 * 4;
509 return ptr - mem_buf;
512 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
514 int i;
515 uint8_t *ptr;
516 CPU_DoubleU u;
518 ptr = mem_buf;
519 /* D0-D7 */
520 for (i = 0; i < 8; i++) {
521 env->dregs[i] = tswapl(*(uint32_t *)ptr);
522 ptr += 4;
524 /* A0-A7 */
525 for (i = 0; i < 8; i++) {
526 env->aregs[i] = tswapl(*(uint32_t *)ptr);
527 ptr += 4;
529 env->sr = tswapl(*(uint32_t *)ptr);
530 ptr += 4;
531 env->pc = tswapl(*(uint32_t *)ptr);
532 ptr += 4;
533 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
534 ColdFire has 8-bit double precision registers. */
535 for (i = 0; i < 8; i++) {
536 u.l.upper = tswap32(*(uint32_t *)ptr);
537 u.l.lower = tswap32(*(uint32_t *)ptr);
538 env->fregs[i] = u.d;
540 /* FP control regs (not implemented). */
541 ptr += 3 * 4;
543 #elif defined (TARGET_MIPS)
544 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
546 int i;
547 uint8_t *ptr;
549 ptr = mem_buf;
550 for (i = 0; i < 32; i++)
552 *(target_ulong *)ptr = tswapl(env->gpr[i]);
553 ptr += sizeof(target_ulong);
556 *(target_ulong *)ptr = tswapl(env->CP0_Status);
557 ptr += sizeof(target_ulong);
559 *(target_ulong *)ptr = tswapl(env->LO);
560 ptr += sizeof(target_ulong);
562 *(target_ulong *)ptr = tswapl(env->HI);
563 ptr += sizeof(target_ulong);
565 *(target_ulong *)ptr = tswapl(env->CP0_BadVAddr);
566 ptr += sizeof(target_ulong);
568 *(target_ulong *)ptr = tswapl(env->CP0_Cause);
569 ptr += sizeof(target_ulong);
571 *(target_ulong *)ptr = tswapl(env->PC);
572 ptr += sizeof(target_ulong);
574 if (env->CP0_Config1 & (1 << CP0C1_FP))
576 for (i = 0; i < 32; i++)
578 *(target_ulong *)ptr = tswapl(env->fpr[i].fs[FP_ENDIAN_IDX]);
579 ptr += sizeof(target_ulong);
582 *(target_ulong *)ptr = tswapl(env->fcr31);
583 ptr += sizeof(target_ulong);
585 *(target_ulong *)ptr = tswapl(env->fcr0);
586 ptr += sizeof(target_ulong);
589 /* 32 FP registers, fsr, fir, fp. Not yet implemented. */
590 /* what's 'fp' mean here? */
592 return ptr - mem_buf;
595 /* convert MIPS rounding mode in FCR31 to IEEE library */
596 static unsigned int ieee_rm[] =
598 float_round_nearest_even,
599 float_round_to_zero,
600 float_round_up,
601 float_round_down
603 #define RESTORE_ROUNDING_MODE \
604 set_float_rounding_mode(ieee_rm[env->fcr31 & 3], &env->fp_status)
606 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
608 int i;
609 uint8_t *ptr;
611 ptr = mem_buf;
612 for (i = 0; i < 32; i++)
614 env->gpr[i] = tswapl(*(target_ulong *)ptr);
615 ptr += sizeof(target_ulong);
618 env->CP0_Status = tswapl(*(target_ulong *)ptr);
619 ptr += sizeof(target_ulong);
621 env->LO = tswapl(*(target_ulong *)ptr);
622 ptr += sizeof(target_ulong);
624 env->HI = tswapl(*(target_ulong *)ptr);
625 ptr += sizeof(target_ulong);
627 env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr);
628 ptr += sizeof(target_ulong);
630 env->CP0_Cause = tswapl(*(target_ulong *)ptr);
631 ptr += sizeof(target_ulong);
633 env->PC = tswapl(*(target_ulong *)ptr);
634 ptr += sizeof(target_ulong);
636 if (env->CP0_Config1 & (1 << CP0C1_FP))
638 for (i = 0; i < 32; i++)
640 env->fpr[i].fs[FP_ENDIAN_IDX] = tswapl(*(target_ulong *)ptr);
641 ptr += sizeof(target_ulong);
644 env->fcr31 = tswapl(*(target_ulong *)ptr) & 0x0183FFFF;
645 ptr += sizeof(target_ulong);
647 env->fcr0 = tswapl(*(target_ulong *)ptr);
648 ptr += sizeof(target_ulong);
650 /* set rounding mode */
651 RESTORE_ROUNDING_MODE;
653 #ifndef CONFIG_SOFTFLOAT
654 /* no floating point exception for native float */
655 SET_FP_ENABLE(env->fcr31, 0);
656 #endif
659 #elif defined (TARGET_SH4)
661 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
663 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
665 uint32_t *ptr = (uint32_t *)mem_buf;
666 int i;
668 #define SAVE(x) *ptr++=tswapl(x)
669 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
670 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
671 } else {
672 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
674 for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
675 SAVE (env->pc);
676 SAVE (env->pr);
677 SAVE (env->gbr);
678 SAVE (env->vbr);
679 SAVE (env->mach);
680 SAVE (env->macl);
681 SAVE (env->sr);
682 SAVE (env->fpul);
683 SAVE (env->fpscr);
684 for (i = 0; i < 16; i++)
685 SAVE(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
686 SAVE (env->ssr);
687 SAVE (env->spc);
688 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
689 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
690 return ((uint8_t *)ptr - mem_buf);
693 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
695 uint32_t *ptr = (uint32_t *)mem_buf;
696 int i;
698 #define LOAD(x) (x)=*ptr++;
699 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
700 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
701 } else {
702 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
704 for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
705 LOAD (env->pc);
706 LOAD (env->pr);
707 LOAD (env->gbr);
708 LOAD (env->vbr);
709 LOAD (env->mach);
710 LOAD (env->macl);
711 LOAD (env->sr);
712 LOAD (env->fpul);
713 LOAD (env->fpscr);
714 for (i = 0; i < 16; i++)
715 LOAD(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
716 LOAD (env->ssr);
717 LOAD (env->spc);
718 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
719 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
721 #else
722 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
724 return 0;
727 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
731 #endif
733 static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
735 const char *p;
736 int ch, reg_size, type;
737 char buf[4096];
738 uint8_t mem_buf[2000];
739 uint32_t *registers;
740 target_ulong addr, len;
742 #ifdef DEBUG_GDB
743 printf("command='%s'\n", line_buf);
744 #endif
745 p = line_buf;
746 ch = *p++;
747 switch(ch) {
748 case '?':
749 /* TODO: Make this return the correct value for user-mode. */
750 snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
751 put_packet(s, buf);
752 break;
753 case 'c':
754 if (*p != '\0') {
755 addr = strtoull(p, (char **)&p, 16);
756 #if defined(TARGET_I386)
757 env->eip = addr;
758 #elif defined (TARGET_PPC)
759 env->nip = addr;
760 #elif defined (TARGET_SPARC)
761 env->pc = addr;
762 env->npc = addr + 4;
763 #elif defined (TARGET_ARM)
764 env->regs[15] = addr;
765 #elif defined (TARGET_SH4)
766 env->pc = addr;
767 #endif
769 #ifdef CONFIG_USER_ONLY
770 s->running_state = 1;
771 #else
772 vm_start();
773 #endif
774 return RS_IDLE;
775 case 's':
776 if (*p != '\0') {
777 addr = strtoul(p, (char **)&p, 16);
778 #if defined(TARGET_I386)
779 env->eip = addr;
780 #elif defined (TARGET_PPC)
781 env->nip = addr;
782 #elif defined (TARGET_SPARC)
783 env->pc = addr;
784 env->npc = addr + 4;
785 #elif defined (TARGET_ARM)
786 env->regs[15] = addr;
787 #elif defined (TARGET_SH4)
788 env->pc = addr;
789 #endif
791 cpu_single_step(env, 1);
792 #ifdef CONFIG_USER_ONLY
793 s->running_state = 1;
794 #else
795 vm_start();
796 #endif
797 return RS_IDLE;
798 case 'F':
800 target_ulong ret;
801 target_ulong err;
803 ret = strtoull(p, (char **)&p, 16);
804 if (*p == ',') {
805 p++;
806 err = strtoull(p, (char **)&p, 16);
807 } else {
808 err = 0;
810 if (*p == ',')
811 p++;
812 type = *p;
813 if (gdb_current_syscall_cb)
814 gdb_current_syscall_cb(s->env, ret, err);
815 if (type == 'C') {
816 put_packet(s, "T02");
817 } else {
818 #ifdef CONFIG_USER_ONLY
819 s->running_state = 1;
820 #else
821 vm_start();
822 #endif
825 break;
826 case 'g':
827 reg_size = cpu_gdb_read_registers(env, mem_buf);
828 memtohex(buf, mem_buf, reg_size);
829 put_packet(s, buf);
830 break;
831 case 'G':
832 registers = (void *)mem_buf;
833 len = strlen(p) / 2;
834 hextomem((uint8_t *)registers, p, len);
835 cpu_gdb_write_registers(env, mem_buf, len);
836 put_packet(s, "OK");
837 break;
838 case 'm':
839 addr = strtoull(p, (char **)&p, 16);
840 if (*p == ',')
841 p++;
842 len = strtoull(p, NULL, 16);
843 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
844 put_packet (s, "E14");
845 } else {
846 memtohex(buf, mem_buf, len);
847 put_packet(s, buf);
849 break;
850 case 'M':
851 addr = strtoull(p, (char **)&p, 16);
852 if (*p == ',')
853 p++;
854 len = strtoull(p, (char **)&p, 16);
855 if (*p == ':')
856 p++;
857 hextomem(mem_buf, p, len);
858 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
859 put_packet(s, "E14");
860 else
861 put_packet(s, "OK");
862 break;
863 case 'Z':
864 type = strtoul(p, (char **)&p, 16);
865 if (*p == ',')
866 p++;
867 addr = strtoull(p, (char **)&p, 16);
868 if (*p == ',')
869 p++;
870 len = strtoull(p, (char **)&p, 16);
871 if (type == 0 || type == 1) {
872 if (cpu_breakpoint_insert(env, addr) < 0)
873 goto breakpoint_error;
874 put_packet(s, "OK");
875 #ifndef CONFIG_USER_ONLY
876 } else if (type == 2) {
877 if (cpu_watchpoint_insert(env, addr) < 0)
878 goto breakpoint_error;
879 put_packet(s, "OK");
880 #endif
881 } else {
882 breakpoint_error:
883 put_packet(s, "E22");
885 break;
886 case 'z':
887 type = strtoul(p, (char **)&p, 16);
888 if (*p == ',')
889 p++;
890 addr = strtoull(p, (char **)&p, 16);
891 if (*p == ',')
892 p++;
893 len = strtoull(p, (char **)&p, 16);
894 if (type == 0 || type == 1) {
895 cpu_breakpoint_remove(env, addr);
896 put_packet(s, "OK");
897 #ifndef CONFIG_USER_ONLY
898 } else if (type == 2) {
899 cpu_watchpoint_remove(env, addr);
900 put_packet(s, "OK");
901 #endif
902 } else {
903 goto breakpoint_error;
905 break;
906 #ifdef CONFIG_LINUX_USER
907 case 'q':
908 if (strncmp(p, "Offsets", 7) == 0) {
909 TaskState *ts = env->opaque;
911 sprintf(buf,
912 "Text=" TARGET_FMT_lx ";Data=" TARGET_FMT_lx ";Bss=" TARGET_FMT_lx,
913 ts->info->code_offset,
914 ts->info->data_offset,
915 ts->info->data_offset);
916 put_packet(s, buf);
917 break;
919 /* Fall through. */
920 #endif
921 default:
922 // unknown_command:
923 /* put empty packet */
924 buf[0] = '\0';
925 put_packet(s, buf);
926 break;
928 return RS_IDLE;
931 extern void tb_flush(CPUState *env);
933 #ifndef CONFIG_USER_ONLY
934 static void gdb_vm_stopped(void *opaque, int reason)
936 GDBState *s = opaque;
937 char buf[256];
938 int ret;
940 if (s->state == RS_SYSCALL)
941 return;
943 /* disable single step if it was enable */
944 cpu_single_step(s->env, 0);
946 if (reason == EXCP_DEBUG) {
947 if (s->env->watchpoint_hit) {
948 snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";",
949 SIGTRAP,
950 s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr);
951 put_packet(s, buf);
952 s->env->watchpoint_hit = 0;
953 return;
955 tb_flush(s->env);
956 ret = SIGTRAP;
957 } else if (reason == EXCP_INTERRUPT) {
958 ret = SIGINT;
959 } else {
960 ret = 0;
962 snprintf(buf, sizeof(buf), "S%02x", ret);
963 put_packet(s, buf);
965 #endif
967 /* Send a gdb syscall request.
968 This accepts limited printf-style format specifiers, specifically:
969 %x - target_ulong argument printed in hex.
970 %lx - 64-bit argument printed in hex.
971 %s - string pointer (target_ulong) and length (int) pair. */
972 void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...)
974 va_list va;
975 char buf[256];
976 char *p;
977 target_ulong addr;
978 uint64_t i64;
979 GDBState *s;
981 s = gdb_syscall_state;
982 if (!s)
983 return;
984 gdb_current_syscall_cb = cb;
985 s->state = RS_SYSCALL;
986 #ifndef CONFIG_USER_ONLY
987 vm_stop(EXCP_DEBUG);
988 #endif
989 s->state = RS_IDLE;
990 va_start(va, fmt);
991 p = buf;
992 *(p++) = 'F';
993 while (*fmt) {
994 if (*fmt == '%') {
995 fmt++;
996 switch (*fmt++) {
997 case 'x':
998 addr = va_arg(va, target_ulong);
999 p += sprintf(p, TARGET_FMT_lx, addr);
1000 break;
1001 case 'l':
1002 if (*(fmt++) != 'x')
1003 goto bad_format;
1004 i64 = va_arg(va, uint64_t);
1005 p += sprintf(p, "%" PRIx64, i64);
1006 break;
1007 case 's':
1008 addr = va_arg(va, target_ulong);
1009 p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int));
1010 break;
1011 default:
1012 bad_format:
1013 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
1014 fmt - 1);
1015 break;
1017 } else {
1018 *(p++) = *(fmt++);
1021 va_end(va);
1022 put_packet(s, buf);
1023 #ifdef CONFIG_USER_ONLY
1024 gdb_handlesig(s->env, 0);
1025 #else
1026 cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
1027 #endif
1030 static void gdb_read_byte(GDBState *s, int ch)
1032 CPUState *env = s->env;
1033 int i, csum;
1034 char reply[1];
1036 #ifndef CONFIG_USER_ONLY
1037 if (s->last_packet_len) {
1038 /* Waiting for a response to the last packet. If we see the start
1039 of a new command then abandon the previous response. */
1040 if (ch == '-') {
1041 #ifdef DEBUG_GDB
1042 printf("Got NACK, retransmitting\n");
1043 #endif
1044 put_buffer(s, s->last_packet, s->last_packet_len);
1046 #ifdef DEBUG_GDB
1047 else if (ch == '+')
1048 printf("Got ACK\n");
1049 else
1050 printf("Got '%c' when expecting ACK/NACK\n", ch);
1051 #endif
1052 if (ch == '+' || ch == '$')
1053 s->last_packet_len = 0;
1054 if (ch != '$')
1055 return;
1057 if (vm_running) {
1058 /* when the CPU is running, we cannot do anything except stop
1059 it when receiving a char */
1060 vm_stop(EXCP_INTERRUPT);
1061 } else
1062 #endif
1064 switch(s->state) {
1065 case RS_IDLE:
1066 if (ch == '$') {
1067 s->line_buf_index = 0;
1068 s->state = RS_GETLINE;
1070 break;
1071 case RS_GETLINE:
1072 if (ch == '#') {
1073 s->state = RS_CHKSUM1;
1074 } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1075 s->state = RS_IDLE;
1076 } else {
1077 s->line_buf[s->line_buf_index++] = ch;
1079 break;
1080 case RS_CHKSUM1:
1081 s->line_buf[s->line_buf_index] = '\0';
1082 s->line_csum = fromhex(ch) << 4;
1083 s->state = RS_CHKSUM2;
1084 break;
1085 case RS_CHKSUM2:
1086 s->line_csum |= fromhex(ch);
1087 csum = 0;
1088 for(i = 0; i < s->line_buf_index; i++) {
1089 csum += s->line_buf[i];
1091 if (s->line_csum != (csum & 0xff)) {
1092 reply[0] = '-';
1093 put_buffer(s, reply, 1);
1094 s->state = RS_IDLE;
1095 } else {
1096 reply[0] = '+';
1097 put_buffer(s, reply, 1);
1098 s->state = gdb_handle_packet(s, env, s->line_buf);
1100 break;
1101 default:
1102 abort();
1107 #ifdef CONFIG_USER_ONLY
1109 gdb_handlesig (CPUState *env, int sig)
1111 GDBState *s;
1112 char buf[256];
1113 int n;
1115 if (gdbserver_fd < 0)
1116 return sig;
1118 s = &gdbserver_state;
1120 /* disable single step if it was enabled */
1121 cpu_single_step(env, 0);
1122 tb_flush(env);
1124 if (sig != 0)
1126 snprintf(buf, sizeof(buf), "S%02x", sig);
1127 put_packet(s, buf);
1130 sig = 0;
1131 s->state = RS_IDLE;
1132 s->running_state = 0;
1133 while (s->running_state == 0) {
1134 n = read (s->fd, buf, 256);
1135 if (n > 0)
1137 int i;
1139 for (i = 0; i < n; i++)
1140 gdb_read_byte (s, buf[i]);
1142 else if (n == 0 || errno != EAGAIN)
1144 /* XXX: Connection closed. Should probably wait for annother
1145 connection before continuing. */
1146 return sig;
1149 return sig;
1152 /* Tell the remote gdb that the process has exited. */
1153 void gdb_exit(CPUState *env, int code)
1155 GDBState *s;
1156 char buf[4];
1158 if (gdbserver_fd < 0)
1159 return;
1161 s = &gdbserver_state;
1163 snprintf(buf, sizeof(buf), "W%02x", code);
1164 put_packet(s, buf);
1168 static void gdb_accept(void *opaque)
1170 GDBState *s;
1171 struct sockaddr_in sockaddr;
1172 socklen_t len;
1173 int val, fd;
1175 for(;;) {
1176 len = sizeof(sockaddr);
1177 fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1178 if (fd < 0 && errno != EINTR) {
1179 perror("accept");
1180 return;
1181 } else if (fd >= 0) {
1182 break;
1186 /* set short latency */
1187 val = 1;
1188 setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
1190 s = &gdbserver_state;
1191 memset (s, 0, sizeof (GDBState));
1192 s->env = first_cpu; /* XXX: allow to change CPU */
1193 s->fd = fd;
1195 gdb_syscall_state = s;
1197 fcntl(fd, F_SETFL, O_NONBLOCK);
1200 static int gdbserver_open(int port)
1202 struct sockaddr_in sockaddr;
1203 int fd, val, ret;
1205 fd = socket(PF_INET, SOCK_STREAM, 0);
1206 if (fd < 0) {
1207 perror("socket");
1208 return -1;
1211 /* allow fast reuse */
1212 val = 1;
1213 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
1215 sockaddr.sin_family = AF_INET;
1216 sockaddr.sin_port = htons(port);
1217 sockaddr.sin_addr.s_addr = 0;
1218 ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1219 if (ret < 0) {
1220 perror("bind");
1221 return -1;
1223 ret = listen(fd, 0);
1224 if (ret < 0) {
1225 perror("listen");
1226 return -1;
1228 return fd;
1231 int gdbserver_start(int port)
1233 gdbserver_fd = gdbserver_open(port);
1234 if (gdbserver_fd < 0)
1235 return -1;
1236 /* accept connections */
1237 gdb_accept (NULL);
1238 return 0;
1240 #else
1241 static int gdb_chr_can_recieve(void *opaque)
1243 return 1;
1246 static void gdb_chr_recieve(void *opaque, const uint8_t *buf, int size)
1248 GDBState *s = opaque;
1249 int i;
1251 for (i = 0; i < size; i++) {
1252 gdb_read_byte(s, buf[i]);
1256 static void gdb_chr_event(void *opaque, int event)
1258 switch (event) {
1259 case CHR_EVENT_RESET:
1260 vm_stop(EXCP_INTERRUPT);
1261 gdb_syscall_state = opaque;
1262 break;
1263 default:
1264 break;
1268 int gdbserver_start(const char *port)
1270 GDBState *s;
1271 char gdbstub_port_name[128];
1272 int port_num;
1273 char *p;
1274 CharDriverState *chr;
1276 if (!port || !*port)
1277 return -1;
1279 port_num = strtol(port, &p, 10);
1280 if (*p == 0) {
1281 /* A numeric value is interpreted as a port number. */
1282 snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
1283 "tcp::%d,nowait,nodelay,server", port_num);
1284 port = gdbstub_port_name;
1287 chr = qemu_chr_open(port);
1288 if (!chr)
1289 return -1;
1291 s = qemu_mallocz(sizeof(GDBState));
1292 if (!s) {
1293 return -1;
1295 s->env = first_cpu; /* XXX: allow to change CPU */
1296 s->chr = chr;
1297 qemu_chr_add_handlers(chr, gdb_chr_can_recieve, gdb_chr_recieve,
1298 gdb_chr_event, s);
1299 qemu_add_vm_stop_handler(gdb_vm_stopped, s);
1300 return 0;
1302 #endif