hw/mainstone.c

   1 /*
   2  * PXA270-based Intel Mainstone platforms.
   3  *
   4  * Copyright (c) 2007 by Armin Kuster <akuster@kama-aina.net> or
   5  *                                    <akuster@mvista.com>
   6  *
   7  * Code based on spitz platform by Andrzej Zaborowski <balrog@zabor.org>
   8  *
   9  * This code is licensed under the GNU GPL v2.
  10  */
  11 #include "hw.h"
  12 #include "pxa.h"
  13 #include "arm-misc.h"
  14 #include "net.h"
  15 #include "devices.h"
  16 #include "boards.h"
  17 #include "mainstone.h"
  18 #include "sysemu.h"
  19 #include "flash.h"
  20
  21 enum mainstone_model_e { mainstone };
  22
  23 static void mainstone_common_init(int ram_size, int vga_ram_size,
  24                 DisplayState *ds, const char *kernel_filename,
  25                 const char *kernel_cmdline, const char *initrd_filename,
  26                 const char *cpu_model, enum mainstone_model_e model, int arm_id)
  27 {
  28     uint32_t mainstone_ram = 0x04000000;
  29     uint32_t mainstone_rom = 0x00800000;
  30     struct pxa2xx_state_s *cpu;
  31     qemu_irq *mst_irq;
  32
  33     if (!cpu_model)
  34         cpu_model = "pxa270-c5";
  35
  36     /* Setup CPU & memory */
  37     if (ram_size < mainstone_ram + mainstone_rom + PXA2XX_INTERNAL_SIZE) {
  38         fprintf(stderr, "This platform requires %i bytes of memory\n",
  39                         mainstone_ram + mainstone_rom + PXA2XX_INTERNAL_SIZE);
  40         exit(1);
  41     }
  42
  43     cpu = pxa270_init(mainstone_ram, ds, cpu_model);
  44     cpu_register_physical_memory(0, mainstone_rom,
  45                     qemu_ram_alloc(mainstone_rom) | IO_MEM_ROM);
  46
  47     /* Setup initial (reset) machine state */
  48     cpu->env->regs[15] = PXA2XX_SDRAM_BASE;
  49
  50         /* There are two 32MiB flash devices on the board */
  51         if (!pflash_register(MST_FLASH_0, mainstone_ram + PXA2XX_INTERNAL_SIZE,
  52                 pflash_table[0], 256 * 1024, 128, 4, 0, 0, 0, 0)) {
  53                         fprintf(stderr, "qemu: Error register flash memory.\n");
  54                         exit(1);
  55         }
  56
  57         if (!pflash_register(MST_FLASH_1, mainstone_ram + PXA2XX_INTERNAL_SIZE,
  58                 pflash_table[1], 256 * 1024, 128, 4, 0, 0, 0, 0)) {
  59                         fprintf(stderr, "qemu: Error register flash memory.\n");
  60                         exit(1);
  61         }
  62
  63     mst_irq = mst_irq_init(cpu, MST_FPGA_PHYS, PXA2XX_PIC_GPIO_0);
  64     smc91c111_init(&nd_table[0], MST_ETH_PHYS, mst_irq[ETHERNET_IRQ]);
  65
  66     arm_load_kernel(cpu->env, mainstone_ram, kernel_filename, kernel_cmdline,
  67                     initrd_filename, arm_id, PXA2XX_SDRAM_BASE);
  68 }
  69
  70 static void mainstone_init(int ram_size, int vga_ram_size,
  71                 const char *boot_device, DisplayState *ds,
  72                 const char *kernel_filename, const char *kernel_cmdline,
  73                 const char *initrd_filename, const char *cpu_model)
  74 {
  75     mainstone_common_init(ram_size, vga_ram_size, ds, kernel_filename,
  76                 kernel_cmdline, initrd_filename, cpu_model, mainstone, 0x196);
  77 }
  78
  79 QEMUMachine mainstone2_machine = {
  80     "mainstone",
  81     "Mainstone II (PXA27x)",
  82     mainstone_init,
  83 };