Larger physical address space for 32-bit MIPS.
[qemu/qemu_0_9_1_stable.git] / disas.c
blobfe1fa9d5a8aab4c970c8ae268a6ec76a90b29ce0
1 /* General "disassemble this chunk" code. Used for debugging. */
2 #include "config.h"
3 #include "dis-asm.h"
4 #include "elf.h"
5 #include <errno.h>
7 #include "cpu.h"
8 #include "exec-all.h"
9 #include "disas.h"
11 /* Filled in by elfload.c. Simplistic, but will do for now. */
12 struct syminfo *syminfos = NULL;
14 /* Get LENGTH bytes from info's buffer, at target address memaddr.
15 Transfer them to myaddr. */
16 int
17 buffer_read_memory (memaddr, myaddr, length, info)
18 bfd_vma memaddr;
19 bfd_byte *myaddr;
20 int length;
21 struct disassemble_info *info;
23 if (memaddr < info->buffer_vma
24 || memaddr + length > info->buffer_vma + info->buffer_length)
25 /* Out of bounds. Use EIO because GDB uses it. */
26 return EIO;
27 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
28 return 0;
31 /* Get LENGTH bytes from info's buffer, at target address memaddr.
32 Transfer them to myaddr. */
33 static int
34 target_read_memory (bfd_vma memaddr,
35 bfd_byte *myaddr,
36 int length,
37 struct disassemble_info *info)
39 int i;
40 for(i = 0; i < length; i++) {
41 myaddr[i] = ldub_code(memaddr + i);
43 return 0;
46 /* Print an error message. We can assume that this is in response to
47 an error return from buffer_read_memory. */
48 void
49 perror_memory (status, memaddr, info)
50 int status;
51 bfd_vma memaddr;
52 struct disassemble_info *info;
54 if (status != EIO)
55 /* Can't happen. */
56 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
57 else
58 /* Actually, address between memaddr and memaddr + len was
59 out of bounds. */
60 (*info->fprintf_func) (info->stream,
61 "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
64 /* This could be in a separate file, to save miniscule amounts of space
65 in statically linked executables. */
67 /* Just print the address is hex. This is included for completeness even
68 though both GDB and objdump provide their own (to print symbolic
69 addresses). */
71 void
72 generic_print_address (addr, info)
73 bfd_vma addr;
74 struct disassemble_info *info;
76 (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
79 /* Just return the given address. */
81 int
82 generic_symbol_at_address (addr, info)
83 bfd_vma addr;
84 struct disassemble_info * info;
86 return 1;
89 bfd_vma bfd_getl32 (const bfd_byte *addr)
91 unsigned long v;
93 v = (unsigned long) addr[0];
94 v |= (unsigned long) addr[1] << 8;
95 v |= (unsigned long) addr[2] << 16;
96 v |= (unsigned long) addr[3] << 24;
97 return (bfd_vma) v;
100 bfd_vma bfd_getb32 (const bfd_byte *addr)
102 unsigned long v;
104 v = (unsigned long) addr[0] << 24;
105 v |= (unsigned long) addr[1] << 16;
106 v |= (unsigned long) addr[2] << 8;
107 v |= (unsigned long) addr[3];
108 return (bfd_vma) v;
111 bfd_vma bfd_getl16 (const bfd_byte *addr)
113 unsigned long v;
115 v = (unsigned long) addr[0];
116 v |= (unsigned long) addr[1] << 8;
117 return (bfd_vma) v;
120 bfd_vma bfd_getb16 (const bfd_byte *addr)
122 unsigned long v;
124 v = (unsigned long) addr[0] << 24;
125 v |= (unsigned long) addr[1] << 16;
126 return (bfd_vma) v;
129 #ifdef TARGET_ARM
130 static int
131 print_insn_thumb1(bfd_vma pc, disassemble_info *info)
133 return print_insn_arm(pc | 1, info);
135 #endif
137 /* Disassemble this for me please... (debugging). 'flags' has the following
138 values:
139 i386 - nonzero means 16 bit code
140 arm - nonzero means thumb code
141 ppc - nonzero means little endian
142 other targets - unused
144 void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
146 target_ulong pc;
147 int count;
148 struct disassemble_info disasm_info;
149 int (*print_insn)(bfd_vma pc, disassemble_info *info);
151 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
153 disasm_info.read_memory_func = target_read_memory;
154 disasm_info.buffer_vma = code;
155 disasm_info.buffer_length = size;
157 #ifdef TARGET_WORDS_BIGENDIAN
158 disasm_info.endian = BFD_ENDIAN_BIG;
159 #else
160 disasm_info.endian = BFD_ENDIAN_LITTLE;
161 #endif
162 #if defined(TARGET_I386)
163 if (flags == 2)
164 disasm_info.mach = bfd_mach_x86_64;
165 else if (flags == 1)
166 disasm_info.mach = bfd_mach_i386_i8086;
167 else
168 disasm_info.mach = bfd_mach_i386_i386;
169 print_insn = print_insn_i386;
170 #elif defined(TARGET_ARM)
171 if (flags)
172 print_insn = print_insn_thumb1;
173 else
174 print_insn = print_insn_arm;
175 #elif defined(TARGET_SPARC)
176 print_insn = print_insn_sparc;
177 #ifdef TARGET_SPARC64
178 disasm_info.mach = bfd_mach_sparc_v9b;
179 #endif
180 #elif defined(TARGET_PPC)
181 if (flags >> 16)
182 disasm_info.endian = BFD_ENDIAN_LITTLE;
183 if (flags & 0xFFFF) {
184 /* If we have a precise definitions of the instructions set, use it */
185 disasm_info.mach = flags & 0xFFFF;
186 } else {
187 #ifdef TARGET_PPC64
188 disasm_info.mach = bfd_mach_ppc64;
189 #else
190 disasm_info.mach = bfd_mach_ppc;
191 #endif
193 print_insn = print_insn_ppc;
194 #elif defined(TARGET_M68K)
195 print_insn = print_insn_m68k;
196 #elif defined(TARGET_MIPS)
197 #ifdef TARGET_WORDS_BIGENDIAN
198 print_insn = print_insn_big_mips;
199 #else
200 print_insn = print_insn_little_mips;
201 #endif
202 #elif defined(TARGET_SH4)
203 disasm_info.mach = bfd_mach_sh4;
204 print_insn = print_insn_sh;
205 #elif defined(TARGET_ALPHA)
206 disasm_info.mach = bfd_mach_alpha;
207 print_insn = print_insn_alpha;
208 #elif defined(TARGET_CRIS)
209 disasm_info.mach = bfd_mach_cris_v32;
210 print_insn = print_insn_crisv32;
211 #else
212 fprintf(out, "0x" TARGET_FMT_lx
213 ": Asm output not supported on this arch\n", code);
214 return;
215 #endif
217 for (pc = code; pc < code + size; pc += count) {
218 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
219 count = print_insn(pc, &disasm_info);
220 #if 0
222 int i;
223 uint8_t b;
224 fprintf(out, " {");
225 for(i = 0; i < count; i++) {
226 target_read_memory(pc + i, &b, 1, &disasm_info);
227 fprintf(out, " %02x", b);
229 fprintf(out, " }");
231 #endif
232 fprintf(out, "\n");
233 if (count < 0)
234 break;
238 /* Disassemble this for me please... (debugging). */
239 void disas(FILE *out, void *code, unsigned long size)
241 unsigned long pc;
242 int count;
243 struct disassemble_info disasm_info;
244 int (*print_insn)(bfd_vma pc, disassemble_info *info);
246 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
248 disasm_info.buffer = code;
249 disasm_info.buffer_vma = (unsigned long)code;
250 disasm_info.buffer_length = size;
252 #ifdef WORDS_BIGENDIAN
253 disasm_info.endian = BFD_ENDIAN_BIG;
254 #else
255 disasm_info.endian = BFD_ENDIAN_LITTLE;
256 #endif
257 #if defined(__i386__)
258 disasm_info.mach = bfd_mach_i386_i386;
259 print_insn = print_insn_i386;
260 #elif defined(__x86_64__)
261 disasm_info.mach = bfd_mach_x86_64;
262 print_insn = print_insn_i386;
263 #elif defined(__powerpc__)
264 print_insn = print_insn_ppc;
265 #elif defined(__alpha__)
266 print_insn = print_insn_alpha;
267 #elif defined(__sparc__)
268 print_insn = print_insn_sparc;
269 #if defined(__sparc_v8plus__) || defined(__sparc_v8plusa__) || defined(__sparc_v9__)
270 disasm_info.mach = bfd_mach_sparc_v9b;
271 #endif
272 #elif defined(__arm__)
273 print_insn = print_insn_arm;
274 #elif defined(__MIPSEB__)
275 print_insn = print_insn_big_mips;
276 #elif defined(__MIPSEL__)
277 print_insn = print_insn_little_mips;
278 #elif defined(__m68k__)
279 print_insn = print_insn_m68k;
280 #elif defined(__s390__)
281 print_insn = print_insn_s390;
282 #else
283 fprintf(out, "0x%lx: Asm output not supported on this arch\n",
284 (long) code);
285 return;
286 #endif
287 for (pc = (unsigned long)code; pc < (unsigned long)code + size; pc += count) {
288 fprintf(out, "0x%08lx: ", pc);
289 #ifdef __arm__
290 /* since data is included in the code, it is better to
291 display code data too */
292 fprintf(out, "%08x ", (int)bfd_getl32((const bfd_byte *)pc));
293 #endif
294 count = print_insn(pc, &disasm_info);
295 fprintf(out, "\n");
296 if (count < 0)
297 break;
301 /* Look up symbol for debugging purpose. Returns "" if unknown. */
302 const char *lookup_symbol(target_ulong orig_addr)
304 unsigned int i;
305 /* Hack, because we know this is x86. */
306 Elf32_Sym *sym;
307 struct syminfo *s;
308 target_ulong addr;
310 for (s = syminfos; s; s = s->next) {
311 sym = s->disas_symtab;
312 for (i = 0; i < s->disas_num_syms; i++) {
313 if (sym[i].st_shndx == SHN_UNDEF
314 || sym[i].st_shndx >= SHN_LORESERVE)
315 continue;
317 if (ELF_ST_TYPE(sym[i].st_info) != STT_FUNC)
318 continue;
320 addr = sym[i].st_value;
321 #if defined(TARGET_ARM) || defined (TARGET_MIPS)
322 /* The bottom address bit marks a Thumb or MIPS16 symbol. */
323 addr &= ~(target_ulong)1;
324 #endif
325 if (orig_addr >= addr
326 && orig_addr < addr + sym[i].st_size)
327 return s->disas_strtab + sym[i].st_name;
330 return "";
333 #if !defined(CONFIG_USER_ONLY)
335 void term_vprintf(const char *fmt, va_list ap);
336 void term_printf(const char *fmt, ...);
338 static int monitor_disas_is_physical;
339 static CPUState *monitor_disas_env;
341 static int
342 monitor_read_memory (memaddr, myaddr, length, info)
343 bfd_vma memaddr;
344 bfd_byte *myaddr;
345 int length;
346 struct disassemble_info *info;
348 if (monitor_disas_is_physical) {
349 cpu_physical_memory_rw(memaddr, myaddr, length, 0);
350 } else {
351 cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
353 return 0;
356 static int monitor_fprintf(FILE *stream, const char *fmt, ...)
358 va_list ap;
359 va_start(ap, fmt);
360 term_vprintf(fmt, ap);
361 va_end(ap);
362 return 0;
365 void monitor_disas(CPUState *env,
366 target_ulong pc, int nb_insn, int is_physical, int flags)
368 int count, i;
369 struct disassemble_info disasm_info;
370 int (*print_insn)(bfd_vma pc, disassemble_info *info);
372 INIT_DISASSEMBLE_INFO(disasm_info, NULL, monitor_fprintf);
374 monitor_disas_env = env;
375 monitor_disas_is_physical = is_physical;
376 disasm_info.read_memory_func = monitor_read_memory;
378 disasm_info.buffer_vma = pc;
380 #ifdef TARGET_WORDS_BIGENDIAN
381 disasm_info.endian = BFD_ENDIAN_BIG;
382 #else
383 disasm_info.endian = BFD_ENDIAN_LITTLE;
384 #endif
385 #if defined(TARGET_I386)
386 if (flags == 2)
387 disasm_info.mach = bfd_mach_x86_64;
388 else if (flags == 1)
389 disasm_info.mach = bfd_mach_i386_i8086;
390 else
391 disasm_info.mach = bfd_mach_i386_i386;
392 print_insn = print_insn_i386;
393 #elif defined(TARGET_ARM)
394 print_insn = print_insn_arm;
395 #elif defined(TARGET_SPARC)
396 print_insn = print_insn_sparc;
397 #ifdef TARGET_SPARC64
398 disasm_info.mach = bfd_mach_sparc_v9b;
399 #endif
400 #elif defined(TARGET_PPC)
401 #ifdef TARGET_PPC64
402 disasm_info.mach = bfd_mach_ppc64;
403 #else
404 disasm_info.mach = bfd_mach_ppc;
405 #endif
406 print_insn = print_insn_ppc;
407 #elif defined(TARGET_M68K)
408 print_insn = print_insn_m68k;
409 #elif defined(TARGET_MIPS)
410 #ifdef TARGET_WORDS_BIGENDIAN
411 print_insn = print_insn_big_mips;
412 #else
413 print_insn = print_insn_little_mips;
414 #endif
415 #else
416 term_printf("0x" TARGET_FMT_lx
417 ": Asm output not supported on this arch\n", pc);
418 return;
419 #endif
421 for(i = 0; i < nb_insn; i++) {
422 term_printf("0x" TARGET_FMT_lx ": ", pc);
423 count = print_insn(pc, &disasm_info);
424 term_printf("\n");
425 if (count < 0)
426 break;
427 pc += count;
430 #endif