All registers are set to 0 on reset (Robert Reif)
[qemu/qemu_0_9_1_stable.git] / tests / cris / check_clrjmp1.s
blob45a7005e24d6c0c18e117b7ab2eeadb34004bd1e
1 # mach: crisv3 crisv8 crisv10 crisv32
2 # output: ffffff00\n
4 ; A bug resulting in a non-effectual clear.b discovered running the GCC
5 ; testsuite; jump actually wrote to p0.
7 .include "testutils.inc"
9 start
10 jump 1f
11 nop
12 .p2align 8
14 move.d y,r4
16 .if 0 ;0 == ..asm.arch.cris.v32
17 ; There was a bug causing this insn to set special register p0
18 ; (byte-clear) to 8 (low 8 bits of location after insn).
19 jump [r4+]
20 .endif
23 move.d 0f,r4
25 ; The corresponding bug would cause this insn too, to set p0.
26 jump r4
27 nop
28 quit
30 moveq -1,r3
31 clear.b r3
32 checkr3 ffffff00
33 quit
36 .dword 1b