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HEAD
All registers are set to 0 on reset (Robert Reif)
[qemu/qemu_0_9_1_stable.git]
/
tests
/
cris
/
check_andc.s
blob
a947b773c9727ef01be12aeb02c4ac54e0884f8d
1
# mach: crisv0 crisv3 crisv8 crisv10 crisv32
2
# output: 2\n2\nffff\nffffffff\n50124400\nffff0002\n2\nfffff\nfedaff0f\n78134400\nffffff02\n2\nf02\n78134401\n78134400\n
3
4
.include
"testutils.inc"
5
start
6
moveq
-
1
,
r3
7
and.
d
2
,
r3
8
test_move_cc
0 0 0 0
9
checkr3
2
10
11
moveq
2
,
r3
12
and.
d
-
1
,
r3
13
test_move_cc
0 0 0 0
14
checkr3
2
15
16
move.d
0xffff
,
r3
17
and.
d
0xffff
,
r3
18
test_move_cc
0 0 0 0
19
checkr3 ffff
20
21
moveq
-
1
,
r3
22
and.
d
-
1
,
r3
23
test_move_cc
1 0 0 0
24
checkr3 ffffffff
25
26
move.d
0x78134452
,
r3
27
and.
d
0x5432f789
,
r3
28
test_move_cc
0 0 0 0
29
checkr3
50124400
30
31
moveq
-
1
,
r3
32
and.
w
2
,
r3
33
test_move_cc
0 0 0 0
34
checkr3 ffff0002
35
36
moveq
2
,
r3
37
and.
w
-
1
,
r3
38
test_move_cc
0 0 0 0
39
checkr3
2
40
41
move.d
0xfffff
,
r3
42
and.
w
0xffff
,
r3
43
test_move_cc
1 0 0 0
44
checkr3 fffff
45
46
move.d
0xfedaffaf
,
r3
47
and.
w
0xff5f
,
r3
48
test_move_cc
1 0 0 0
49
checkr3 fedaff0f
50
51
move.d
0x78134452
,
r3
52
and.
w
0xf789
,
r3
53
test_move_cc
0 0 0 0
54
checkr3
78134400
55
56
moveq
-
1
,
r3
57
and.b
2
,
r3
58
test_move_cc
0 0 0 0
59
checkr3 ffffff02
60
61
moveq
2
,
r3
62
and.b
-
1
,
r3
63
test_move_cc
0 0 0 0
64
checkr3
2
65
66
move.d
0xfa7
,
r3
67
and.b
0x5a
,
r3
68
test_move_cc
0 0 0 0
69
checkr3 f02
70
71
move.d
0x78134453
,
r3
72
and.b
0x89
,
r3
73
test_move_cc
0 0 0 0
74
checkr3
78134401
75
76
and.b
0
,
r3
77
test_move_cc
0 1 0 0
78
checkr3
78134400
79
80
quit