ARM host configure tweaks (Paul Brook)
[qemu/qemu_0_9_1_stable.git] / translate-all.c
blobf6a7bc2b5052c2cfc253af100966cd3d4f67d07c
1 /*
2 * Host code generation
3 *
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <stdarg.h>
21 #include <stdlib.h>
22 #include <stdio.h>
23 #include <string.h>
24 #include <inttypes.h>
26 #include "config.h"
28 #define NO_CPU_IO_DEFS
29 #include "cpu.h"
30 #include "exec-all.h"
31 #include "disas.h"
33 enum {
34 #define DEF(s, n, copy_size) INDEX_op_ ## s,
35 #include "opc.h"
36 #undef DEF
37 NB_OPS,
40 #include "dyngen.h"
41 #include "op.h"
43 uint16_t gen_opc_buf[OPC_BUF_SIZE];
44 uint32_t gen_opparam_buf[OPPARAM_BUF_SIZE];
45 long gen_labels[OPC_BUF_SIZE];
46 int nb_gen_labels;
48 target_ulong gen_opc_pc[OPC_BUF_SIZE];
49 uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
50 #if defined(TARGET_I386)
51 uint8_t gen_opc_cc_op[OPC_BUF_SIZE];
52 #elif defined(TARGET_SPARC)
53 target_ulong gen_opc_npc[OPC_BUF_SIZE];
54 #endif
56 int code_copy_enabled = 1;
58 #ifdef DEBUG_DISAS
59 static const char *op_str[] = {
60 #define DEF(s, n, copy_size) #s,
61 #include "opc.h"
62 #undef DEF
65 static uint8_t op_nb_args[] = {
66 #define DEF(s, n, copy_size) n,
67 #include "opc.h"
68 #undef DEF
71 static const unsigned short opc_copy_size[] = {
72 #define DEF(s, n, copy_size) copy_size,
73 #include "opc.h"
74 #undef DEF
77 void dump_ops(const uint16_t *opc_buf, const uint32_t *opparam_buf)
79 const uint16_t *opc_ptr;
80 const uint32_t *opparam_ptr;
81 int c, n, i;
83 opc_ptr = opc_buf;
84 opparam_ptr = opparam_buf;
85 for(;;) {
86 c = *opc_ptr++;
87 n = op_nb_args[c];
88 fprintf(logfile, "0x%04x: %s",
89 (int)(opc_ptr - opc_buf - 1), op_str[c]);
90 for(i = 0; i < n; i++) {
91 fprintf(logfile, " 0x%x", opparam_ptr[i]);
93 fprintf(logfile, "\n");
94 if (c == INDEX_op_end)
95 break;
96 opparam_ptr += n;
100 #endif
102 /* compute label info */
103 static void dyngen_labels(long *gen_labels, int nb_gen_labels,
104 uint8_t *gen_code_buf, const uint16_t *opc_buf)
106 uint8_t *gen_code_ptr;
107 int c, i;
108 unsigned long gen_code_addr[OPC_BUF_SIZE];
110 if (nb_gen_labels == 0)
111 return;
112 /* compute the address of each op code */
114 gen_code_ptr = gen_code_buf;
115 i = 0;
116 for(;;) {
117 c = opc_buf[i];
118 gen_code_addr[i] =(unsigned long)gen_code_ptr;
119 if (c == INDEX_op_end)
120 break;
121 gen_code_ptr += opc_copy_size[c];
122 i++;
125 /* compute the address of each label */
126 for(i = 0; i < nb_gen_labels; i++) {
127 gen_labels[i] = gen_code_addr[gen_labels[i]];
131 /* return non zero if the very first instruction is invalid so that
132 the virtual CPU can trigger an exception.
134 '*gen_code_size_ptr' contains the size of the generated code (host
135 code).
137 int cpu_gen_code(CPUState *env, TranslationBlock *tb,
138 int max_code_size, int *gen_code_size_ptr)
140 uint8_t *gen_code_buf;
141 int gen_code_size;
143 #ifdef USE_CODE_COPY
144 if (code_copy_enabled &&
145 cpu_gen_code_copy(env, tb, max_code_size, &gen_code_size) == 0) {
146 /* nothing more to do */
147 } else
148 #endif
150 if (gen_intermediate_code(env, tb) < 0)
151 return -1;
153 /* generate machine code */
154 tb->tb_next_offset[0] = 0xffff;
155 tb->tb_next_offset[1] = 0xffff;
156 gen_code_buf = tb->tc_ptr;
157 #ifdef USE_DIRECT_JUMP
158 /* the following two entries are optional (only used for string ops) */
159 tb->tb_jmp_offset[2] = 0xffff;
160 tb->tb_jmp_offset[3] = 0xffff;
161 #endif
162 dyngen_labels(gen_labels, nb_gen_labels, gen_code_buf, gen_opc_buf);
164 gen_code_size = dyngen_code(gen_code_buf, tb->tb_next_offset,
165 #ifdef USE_DIRECT_JUMP
166 tb->tb_jmp_offset,
167 #else
168 NULL,
169 #endif
170 gen_opc_buf, gen_opparam_buf, gen_labels);
172 *gen_code_size_ptr = gen_code_size;
173 #ifdef DEBUG_DISAS
174 if (loglevel & CPU_LOG_TB_OUT_ASM) {
175 fprintf(logfile, "OUT: [size=%d]\n", *gen_code_size_ptr);
176 disas(logfile, tb->tc_ptr, *gen_code_size_ptr);
177 fprintf(logfile, "\n");
178 fflush(logfile);
180 #endif
181 return 0;
184 /* The cpu state corresponding to 'searched_pc' is restored.
186 int cpu_restore_state(TranslationBlock *tb,
187 CPUState *env, unsigned long searched_pc,
188 void *puc)
190 int j, c;
191 unsigned long tc_ptr;
192 uint16_t *opc_ptr;
194 #ifdef USE_CODE_COPY
195 if (tb->cflags & CF_CODE_COPY) {
196 return cpu_restore_state_copy(tb, env, searched_pc, puc);
198 #endif
199 if (gen_intermediate_code_pc(env, tb) < 0)
200 return -1;
202 /* find opc index corresponding to search_pc */
203 tc_ptr = (unsigned long)tb->tc_ptr;
204 if (searched_pc < tc_ptr)
205 return -1;
206 j = 0;
207 opc_ptr = gen_opc_buf;
208 for(;;) {
209 c = *opc_ptr;
210 if (c == INDEX_op_end)
211 return -1;
212 tc_ptr += opc_copy_size[c];
213 if (searched_pc < tc_ptr)
214 break;
215 opc_ptr++;
217 j = opc_ptr - gen_opc_buf;
218 /* now find start of instruction before */
219 while (gen_opc_instr_start[j] == 0)
220 j--;
221 #if defined(TARGET_I386)
223 int cc_op;
224 #ifdef DEBUG_DISAS
225 if (loglevel & CPU_LOG_TB_OP) {
226 int i;
227 fprintf(logfile, "RESTORE:\n");
228 for(i=0;i<=j; i++) {
229 if (gen_opc_instr_start[i]) {
230 fprintf(logfile, "0x%04x: " TARGET_FMT_lx "\n", i, gen_opc_pc[i]);
233 fprintf(logfile, "spc=0x%08lx j=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n",
234 searched_pc, j, gen_opc_pc[j] - tb->cs_base,
235 (uint32_t)tb->cs_base);
237 #endif
238 env->eip = gen_opc_pc[j] - tb->cs_base;
239 cc_op = gen_opc_cc_op[j];
240 if (cc_op != CC_OP_DYNAMIC)
241 env->cc_op = cc_op;
243 #elif defined(TARGET_ARM)
244 env->regs[15] = gen_opc_pc[j];
245 #elif defined(TARGET_SPARC)
246 /* XXX: restore npc too */
247 env->pc = gen_opc_pc[j];
248 env->npc = gen_opc_npc[j];
249 #elif defined(TARGET_PPC)
251 int type;
252 /* for PPC, we need to look at the micro operation to get the
253 access type */
254 env->nip = gen_opc_pc[j];
255 switch(c) {
256 #if defined(CONFIG_USER_ONLY)
257 #define CASE3(op)\
258 case INDEX_op_ ## op ## _raw
259 #else
260 #define CASE3(op)\
261 case INDEX_op_ ## op ## _user:\
262 case INDEX_op_ ## op ## _kernel
263 #endif
265 CASE3(stfd):
266 CASE3(stfs):
267 CASE3(lfd):
268 CASE3(lfs):
269 type = ACCESS_FLOAT;
270 break;
271 CASE3(lwarx):
272 type = ACCESS_RES;
273 break;
274 CASE3(stwcx):
275 type = ACCESS_RES;
276 break;
277 CASE3(eciwx):
278 CASE3(ecowx):
279 type = ACCESS_EXT;
280 break;
281 default:
282 type = ACCESS_INT;
283 break;
285 env->access_type = type;
287 #endif
288 return 0;