2 * Arm PrimeCell PL110 Color LCD Controller
4 * Copyright (c) 2005-2006 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licenced under the GNU LGPL
12 #define PL110_CR_EN 0x001
13 #define PL110_CR_BGR 0x100
14 #define PL110_CR_BEBO 0x200
15 #define PL110_CR_BEPO 0x400
16 #define PL110_CR_PWR 0x800
31 /* The Versatile/PB uses a slightly modified PL110 controller. */
41 enum pl110_bppmode bpp
;
43 uint32_t pallette
[256];
44 uint32_t raw_pallette
[128];
48 static const unsigned char pl110_id
[] =
49 { 0x10, 0x11, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
51 /* The Arm documentation (DDI0224C) says the CLDC on the Versatile board
52 has a different ID. However Linux only looks for the normal ID. */
54 static const unsigned char pl110_versatile_id
[] =
55 { 0x93, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
57 #define pl110_versatile_id pl110_id
60 static inline uint32_t rgb_to_pixel8(unsigned int r
, unsigned int g
, unsigned b
)
62 return ((r
>> 5) << 5) | ((g
>> 5) << 2) | (b
>> 6);
65 static inline uint32_t rgb_to_pixel15(unsigned int r
, unsigned int g
, unsigned b
)
67 return ((r
>> 3) << 10) | ((g
>> 3) << 5) | (b
>> 3);
70 static inline uint32_t rgb_to_pixel16(unsigned int r
, unsigned int g
, unsigned b
)
72 return ((r
>> 3) << 11) | ((g
>> 2) << 5) | (b
>> 3);
75 static inline uint32_t rgb_to_pixel24(unsigned int r
, unsigned int g
, unsigned b
)
77 return (r
<< 16) | (g
<< 8) | b
;
80 static inline uint32_t rgb_to_pixel32(unsigned int r
, unsigned int g
, unsigned b
)
82 return (r
<< 16) | (g
<< 8) | b
;
85 typedef void (*drawfn
)(uint32_t *, uint8_t *, const uint8_t *, int);
88 #include "pl110_template.h"
90 #include "pl110_template.h"
92 #include "pl110_template.h"
94 #include "pl110_template.h"
96 #include "pl110_template.h"
98 static int pl110_enabled(pl110_state
*s
)
100 return (s
->cr
& PL110_CR_EN
) && (s
->cr
& PL110_CR_PWR
);
103 static void pl110_update_display(void *opaque
)
105 pl110_state
*s
= (pl110_state
*)opaque
;
116 int dirty
, new_dirty
;
120 if (!pl110_enabled(s
))
123 switch (s
->ds
->depth
) {
127 fntable
= pl110_draw_fn_8
;
131 fntable
= pl110_draw_fn_15
;
135 fntable
= pl110_draw_fn_16
;
139 fntable
= pl110_draw_fn_24
;
143 fntable
= pl110_draw_fn_32
;
147 fprintf(stderr
, "pl110: Bad color depth\n");
150 if (s
->cr
& PL110_CR_BGR
)
155 if (s
->cr
& PL110_CR_BEBO
)
156 fn
= fntable
[s
->bpp
+ 6 + bpp_offset
];
157 else if (s
->cr
& PL110_CR_BEPO
)
158 fn
= fntable
[s
->bpp
+ 12 + bpp_offset
];
160 fn
= fntable
[s
->bpp
+ bpp_offset
];
182 dest_width
*= s
->cols
;
183 pallette
= s
->pallette
;
185 /* HACK: Arm aliases physical memory at 0x80000000. */
186 if (base
> 0x80000000)
188 src
= phys_ram_base
+ base
;
193 dirty
= cpu_physical_memory_get_dirty(addr
, VGA_DIRTY_FLAG
);
195 for (i
= 0; i
< s
->rows
; i
++) {
196 if ((addr
& ~TARGET_PAGE_MASK
) + src_width
>= TARGET_PAGE_SIZE
) {
199 for (tmp
= 0; tmp
< src_width
; tmp
+= TARGET_PAGE_SIZE
) {
200 new_dirty
|= cpu_physical_memory_get_dirty(addr
+ tmp
,
205 if (dirty
|| new_dirty
|| s
->invalidate
) {
206 fn(pallette
, dest
, src
, s
->cols
);
220 cpu_physical_memory_reset_dirty(base
+ first
* src_width
,
221 base
+ (last
+ 1) * src_width
,
223 dpy_update(s
->ds
, 0, first
, s
->cols
, last
- first
+ 1);
226 static void pl110_invalidate_display(void * opaque
)
228 pl110_state
*s
= (pl110_state
*)opaque
;
232 static void pl110_update_pallette(pl110_state
*s
, int n
)
236 unsigned int r
, g
, b
;
238 raw
= s
->raw_pallette
[n
];
240 for (i
= 0; i
< 2; i
++) {
241 r
= (raw
& 0x1f) << 3;
243 g
= (raw
& 0x1f) << 3;
245 b
= (raw
& 0x1f) << 3;
246 /* The I bit is ignored. */
248 switch (s
->ds
->depth
) {
250 s
->pallette
[n
] = rgb_to_pixel8(r
, g
, b
);
253 s
->pallette
[n
] = rgb_to_pixel15(r
, g
, b
);
256 s
->pallette
[n
] = rgb_to_pixel16(r
, g
, b
);
260 s
->pallette
[n
] = rgb_to_pixel32(r
, g
, b
);
267 static void pl110_resize(pl110_state
*s
, int width
, int height
)
269 if (width
!= s
->cols
|| height
!= s
->rows
) {
270 if (pl110_enabled(s
)) {
271 dpy_resize(s
->ds
, width
, height
);
278 /* Update interrupts. */
279 static void pl110_update(pl110_state
*s
)
281 /* TODO: Implement interrupts. */
284 static uint32_t pl110_read(void *opaque
, target_phys_addr_t offset
)
286 pl110_state
*s
= (pl110_state
*)opaque
;
289 if (offset
>= 0xfe0 && offset
< 0x1000) {
291 return pl110_versatile_id
[(offset
- 0xfe0) >> 2];
293 return pl110_id
[(offset
- 0xfe0) >> 2];
295 if (offset
>= 0x200 && offset
< 0x400) {
296 return s
->raw_pallette
[(offset
- 0x200) >> 2];
298 switch (offset
>> 2) {
299 case 0: /* LCDTiming0 */
301 case 1: /* LCDTiming1 */
303 case 2: /* LCDTiming2 */
305 case 3: /* LCDTiming3 */
307 case 4: /* LCDUPBASE */
309 case 5: /* LCDLPBASE */
311 case 6: /* LCDIMSC */
315 case 7: /* LCDControl */
320 return s
->int_status
;
322 return s
->int_status
& s
->int_mask
;
323 case 11: /* LCDUPCURR */
324 /* TODO: Implement vertical refresh. */
326 case 12: /* LCDLPCURR */
329 cpu_abort (cpu_single_env
, "pl110_read: Bad offset %x\n", offset
);
334 static void pl110_write(void *opaque
, target_phys_addr_t offset
,
337 pl110_state
*s
= (pl110_state
*)opaque
;
340 /* For simplicity invalidate the display whenever a control register
344 if (offset
>= 0x200 && offset
< 0x400) {
346 n
= (offset
- 0x200) >> 2;
347 s
->raw_pallette
[(offset
- 0x200) >> 2] = val
;
348 pl110_update_pallette(s
, n
);
351 switch (offset
>> 2) {
352 case 0: /* LCDTiming0 */
354 n
= ((val
& 0xfc) + 4) * 4;
355 pl110_resize(s
, n
, s
->rows
);
357 case 1: /* LCDTiming1 */
359 n
= (val
& 0x3ff) + 1;
360 pl110_resize(s
, s
->cols
, n
);
362 case 2: /* LCDTiming2 */
365 case 3: /* LCDTiming3 */
368 case 4: /* LCDUPBASE */
371 case 5: /* LCDLPBASE */
374 case 6: /* LCDIMSC */
381 case 7: /* LCDControl */
386 s
->bpp
= (val
>> 1) & 7;
387 if (pl110_enabled(s
)) {
388 dpy_resize(s
->ds
, s
->cols
, s
->rows
);
391 case 10: /* LCDICR */
392 s
->int_status
&= ~val
;
396 cpu_abort (cpu_single_env
, "pl110_write: Bad offset %x\n", offset
);
400 static CPUReadMemoryFunc
*pl110_readfn
[] = {
406 static CPUWriteMemoryFunc
*pl110_writefn
[] = {
412 void *pl110_init(DisplayState
*ds
, uint32_t base
, qemu_irq irq
,
418 s
= (pl110_state
*)qemu_mallocz(sizeof(pl110_state
));
419 iomemtype
= cpu_register_io_memory(0, pl110_readfn
,
421 cpu_register_physical_memory(base
, 0x00001000, iomemtype
);
424 s
->versatile
= versatile
;
426 graphic_console_init(ds
, pl110_update_display
, pl110_invalidate_display
,
428 /* ??? Save/restore. */