?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
NaN tests
[qemu/qemu_0_9_1_stable.git] / tests / test-i386.c
blob5e6e6c624c5986b13cfbaff658cdff7b0e0ff50d
1 /*
2 * x86 CPU test
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20 #define _GNU_SOURCE
21 #include <stdlib.h>
22 #include <stdio.h>
23 #include <string.h>
24 #include <inttypes.h>
25 #include <math.h>
26 #include <signal.h>
27 #include <setjmp.h>
28 #include <errno.h>
29 #include <sys/ucontext.h>
30 #include <sys/mman.h>
31
32 #if !defined(__x86_64__)
33 #define TEST_VM86
34 #define TEST_SEGS
35 #endif
36 //#define LINUX_VM86_IOPL_FIX
37 //#define TEST_P4_FLAGS
38 #if defined(__x86_64__)
39 #define TEST_SSE
40 #define TEST_CMOV 1
41 #define TEST_FCOMI 1
42 #else
43 //#define TEST_SSE
44 #define TEST_CMOV 0
45 #define TEST_FCOMI 0
46 #endif
47
48 #if defined(__x86_64__)
49 #define FMT64X "%016lx"
50 #define FMTLX "%016lx"
51 #define X86_64_ONLY(x) x
52 #else
53 #define FMT64X "%016llx"
54 #define FMTLX "%08lx"
55 #define X86_64_ONLY(x)
56 #endif
57
58 #ifdef TEST_VM86
59 #include <asm/vm86.h>
60 #endif
61
62 #define xglue(x, y) x ## y
63 #define glue(x, y) xglue(x, y)
64 #define stringify(s) tostring(s)
65 #define tostring(s) #s
66
67 #define CC_C 0x0001
68 #define CC_P 0x0004
69 #define CC_A 0x0010
70 #define CC_Z 0x0040
71 #define CC_S 0x0080
72 #define CC_O 0x0800
73
74 #define __init_call __attribute__ ((unused,__section__ ("initcall")))
75
76 #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
77
78 #if defined(__x86_64__)
79 static inline long i2l(long v)
80 {
81 return v | ((v ^ 0xabcd) << 32);
82 }
83 #else
84 static inline long i2l(long v)
85 {
86 return v;
87 }
88 #endif
89
90 #define OP add
91 #include "test-i386.h"
92
93 #define OP sub
94 #include "test-i386.h"
95
96 #define OP xor
97 #include "test-i386.h"
98
99 #define OP and
100 #include "test-i386.h"
101
102 #define OP or
103 #include "test-i386.h"
104
105 #define OP cmp
106 #include "test-i386.h"
107
108 #define OP adc
109 #define OP_CC
110 #include "test-i386.h"
111
112 #define OP sbb
113 #define OP_CC
114 #include "test-i386.h"
115
116 #define OP inc
117 #define OP_CC
118 #define OP1
119 #include "test-i386.h"
120
121 #define OP dec
122 #define OP_CC
123 #define OP1
124 #include "test-i386.h"
125
126 #define OP neg
127 #define OP_CC
128 #define OP1
129 #include "test-i386.h"
130
131 #define OP not
132 #define OP_CC
133 #define OP1
134 #include "test-i386.h"
135
136 #undef CC_MASK
137 #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O)
138
139 #define OP shl
140 #include "test-i386-shift.h"
141
142 #define OP shr
143 #include "test-i386-shift.h"
144
145 #define OP sar
146 #include "test-i386-shift.h"
147
148 #define OP rol
149 #include "test-i386-shift.h"
150
151 #define OP ror
152 #include "test-i386-shift.h"
153
154 #define OP rcr
155 #define OP_CC
156 #include "test-i386-shift.h"
157
158 #define OP rcl
159 #define OP_CC
160 #include "test-i386-shift.h"
161
162 #define OP shld
163 #define OP_SHIFTD
164 #define OP_NOBYTE
165 #include "test-i386-shift.h"
166
167 #define OP shrd
168 #define OP_SHIFTD
169 #define OP_NOBYTE
170 #include "test-i386-shift.h"
171
172 /* XXX: should be more precise ? */
173 #undef CC_MASK
174 #define CC_MASK (CC_C)
175
176 #define OP bt
177 #define OP_NOBYTE
178 #include "test-i386-shift.h"
179
180 #define OP bts
181 #define OP_NOBYTE
182 #include "test-i386-shift.h"
183
184 #define OP btr
185 #define OP_NOBYTE
186 #include "test-i386-shift.h"
187
188 #define OP btc
189 #define OP_NOBYTE
190 #include "test-i386-shift.h"
191
192 /* lea test (modrm support) */
193 #define TEST_LEAQ(STR)\
194 {\
195 asm("lea " STR ", %0"\
196 : "=r" (res)\
197 : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
198 printf("lea %s = " FMTLX "\n", STR, res);\
199 }
200
201 #define TEST_LEA(STR)\
202 {\
203 asm("lea " STR ", %0"\
204 : "=r" (res)\
205 : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
206 printf("lea %s = " FMTLX "\n", STR, res);\
207 }
208
209 #define TEST_LEA16(STR)\
210 {\
211 asm(".code16 ; .byte 0x67 ; leal " STR ", %0 ; .code32"\
212 : "=wq" (res)\
213 : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
214 printf("lea %s = %08lx\n", STR, res);\
215 }
216
217
218 void test_lea(void)
219 {
220 long eax, ebx, ecx, edx, esi, edi, res;
221 eax = i2l(0x0001);
222 ebx = i2l(0x0002);
223 ecx = i2l(0x0004);
224 edx = i2l(0x0008);
225 esi = i2l(0x0010);
226 edi = i2l(0x0020);
227
228 TEST_LEA("0x4000");
229
230 TEST_LEA("(%%eax)");
231 TEST_LEA("(%%ebx)");
232 TEST_LEA("(%%ecx)");
233 TEST_LEA("(%%edx)");
234 TEST_LEA("(%%esi)");
235 TEST_LEA("(%%edi)");
236
237 TEST_LEA("0x40(%%eax)");
238 TEST_LEA("0x40(%%ebx)");
239 TEST_LEA("0x40(%%ecx)");
240 TEST_LEA("0x40(%%edx)");
241 TEST_LEA("0x40(%%esi)");
242 TEST_LEA("0x40(%%edi)");
243
244 TEST_LEA("0x4000(%%eax)");
245 TEST_LEA("0x4000(%%ebx)");
246 TEST_LEA("0x4000(%%ecx)");
247 TEST_LEA("0x4000(%%edx)");
248 TEST_LEA("0x4000(%%esi)");
249 TEST_LEA("0x4000(%%edi)");
250
251 TEST_LEA("(%%eax, %%ecx)");
252 TEST_LEA("(%%ebx, %%edx)");
253 TEST_LEA("(%%ecx, %%ecx)");
254 TEST_LEA("(%%edx, %%ecx)");
255 TEST_LEA("(%%esi, %%ecx)");
256 TEST_LEA("(%%edi, %%ecx)");
257
258 TEST_LEA("0x40(%%eax, %%ecx)");
259 TEST_LEA("0x4000(%%ebx, %%edx)");
260
261 TEST_LEA("(%%ecx, %%ecx, 2)");
262 TEST_LEA("(%%edx, %%ecx, 4)");
263 TEST_LEA("(%%esi, %%ecx, 8)");
264
265 TEST_LEA("(,%%eax, 2)");
266 TEST_LEA("(,%%ebx, 4)");
267 TEST_LEA("(,%%ecx, 8)");
268
269 TEST_LEA("0x40(,%%eax, 2)");
270 TEST_LEA("0x40(,%%ebx, 4)");
271 TEST_LEA("0x40(,%%ecx, 8)");
272
273
274 TEST_LEA("-10(%%ecx, %%ecx, 2)");
275 TEST_LEA("-10(%%edx, %%ecx, 4)");
276 TEST_LEA("-10(%%esi, %%ecx, 8)");
277
278 TEST_LEA("0x4000(%%ecx, %%ecx, 2)");
279 TEST_LEA("0x4000(%%edx, %%ecx, 4)");
280 TEST_LEA("0x4000(%%esi, %%ecx, 8)");
281
282 #if defined(__x86_64__)
283 TEST_LEAQ("0x4000");
284 TEST_LEAQ("0x4000(%%rip)");
285
286 TEST_LEAQ("(%%rax)");
287 TEST_LEAQ("(%%rbx)");
288 TEST_LEAQ("(%%rcx)");
289 TEST_LEAQ("(%%rdx)");
290 TEST_LEAQ("(%%rsi)");
291 TEST_LEAQ("(%%rdi)");
292
293 TEST_LEAQ("0x40(%%rax)");
294 TEST_LEAQ("0x40(%%rbx)");
295 TEST_LEAQ("0x40(%%rcx)");
296 TEST_LEAQ("0x40(%%rdx)");
297 TEST_LEAQ("0x40(%%rsi)");
298 TEST_LEAQ("0x40(%%rdi)");
299
300 TEST_LEAQ("0x4000(%%rax)");
301 TEST_LEAQ("0x4000(%%rbx)");
302 TEST_LEAQ("0x4000(%%rcx)");
303 TEST_LEAQ("0x4000(%%rdx)");
304 TEST_LEAQ("0x4000(%%rsi)");
305 TEST_LEAQ("0x4000(%%rdi)");
306
307 TEST_LEAQ("(%%rax, %%rcx)");
308 TEST_LEAQ("(%%rbx, %%rdx)");
309 TEST_LEAQ("(%%rcx, %%rcx)");
310 TEST_LEAQ("(%%rdx, %%rcx)");
311 TEST_LEAQ("(%%rsi, %%rcx)");
312 TEST_LEAQ("(%%rdi, %%rcx)");
313
314 TEST_LEAQ("0x40(%%rax, %%rcx)");
315 TEST_LEAQ("0x4000(%%rbx, %%rdx)");
316
317 TEST_LEAQ("(%%rcx, %%rcx, 2)");
318 TEST_LEAQ("(%%rdx, %%rcx, 4)");
319 TEST_LEAQ("(%%rsi, %%rcx, 8)");
320
321 TEST_LEAQ("(,%%rax, 2)");
322 TEST_LEAQ("(,%%rbx, 4)");
323 TEST_LEAQ("(,%%rcx, 8)");
324
325 TEST_LEAQ("0x40(,%%rax, 2)");
326 TEST_LEAQ("0x40(,%%rbx, 4)");
327 TEST_LEAQ("0x40(,%%rcx, 8)");
328
329
330 TEST_LEAQ("-10(%%rcx, %%rcx, 2)");
331 TEST_LEAQ("-10(%%rdx, %%rcx, 4)");
332 TEST_LEAQ("-10(%%rsi, %%rcx, 8)");
333
334 TEST_LEAQ("0x4000(%%rcx, %%rcx, 2)");
335 TEST_LEAQ("0x4000(%%rdx, %%rcx, 4)");
336 TEST_LEAQ("0x4000(%%rsi, %%rcx, 8)");
337 #else
338 /* limited 16 bit addressing test */
339 TEST_LEA16("0x4000");
340 TEST_LEA16("(%%bx)");
341 TEST_LEA16("(%%si)");
342 TEST_LEA16("(%%di)");
343 TEST_LEA16("0x40(%%bx)");
344 TEST_LEA16("0x40(%%si)");
345 TEST_LEA16("0x40(%%di)");
346 TEST_LEA16("0x4000(%%bx)");
347 TEST_LEA16("0x4000(%%si)");
348 TEST_LEA16("(%%bx,%%si)");
349 TEST_LEA16("(%%bx,%%di)");
350 TEST_LEA16("0x40(%%bx,%%si)");
351 TEST_LEA16("0x40(%%bx,%%di)");
352 TEST_LEA16("0x4000(%%bx,%%si)");
353 TEST_LEA16("0x4000(%%bx,%%di)");
354 #endif
355 }
356
357 #define TEST_JCC(JCC, v1, v2)\
358 {\
359 int res;\
360 asm("movl $1, %0\n\t"\
361 "cmpl %2, %1\n\t"\
362 "j" JCC " 1f\n\t"\
363 "movl $0, %0\n\t"\
364 "1:\n\t"\
365 : "=r" (res)\
366 : "r" (v1), "r" (v2));\
367 printf("%-10s %d\n", "j" JCC, res);\
368 \
369 asm("movl $0, %0\n\t"\
370 "cmpl %2, %1\n\t"\
371 "set" JCC " %b0\n\t"\
372 : "=r" (res)\
373 : "r" (v1), "r" (v2));\
374 printf("%-10s %d\n", "set" JCC, res);\
375 if (TEST_CMOV) {\
376 long val = i2l(1);\
377 long res = i2l(0x12345678);\
378 X86_64_ONLY(\
379 asm("cmpl %2, %1\n\t"\
380 "cmov" JCC "q %3, %0\n\t"\
381 : "=r" (res)\
382 : "r" (v1), "r" (v2), "m" (val), "0" (res));\
383 printf("%-10s R=" FMTLX "\n", "cmov" JCC "q", res);)\
384 asm("cmpl %2, %1\n\t"\
385 "cmov" JCC "l %k3, %k0\n\t"\
386 : "=r" (res)\
387 : "r" (v1), "r" (v2), "m" (val), "0" (res));\
388 printf("%-10s R=" FMTLX "\n", "cmov" JCC "l", res);\
389 asm("cmpl %2, %1\n\t"\
390 "cmov" JCC "w %w3, %w0\n\t"\
391 : "=r" (res)\
392 : "r" (v1), "r" (v2), "r" (1), "0" (res));\
393 printf("%-10s R=" FMTLX "\n", "cmov" JCC "w", res);\
394 } \
395 }
396
397 /* various jump tests */
398 void test_jcc(void)
399 {
400 TEST_JCC("ne", 1, 1);
401 TEST_JCC("ne", 1, 0);
402
403 TEST_JCC("e", 1, 1);
404 TEST_JCC("e", 1, 0);
405
406 TEST_JCC("l", 1, 1);
407 TEST_JCC("l", 1, 0);
408 TEST_JCC("l", 1, -1);
409
410 TEST_JCC("le", 1, 1);
411 TEST_JCC("le", 1, 0);
412 TEST_JCC("le", 1, -1);
413
414 TEST_JCC("ge", 1, 1);
415 TEST_JCC("ge", 1, 0);
416 TEST_JCC("ge", -1, 1);
417
418 TEST_JCC("g", 1, 1);
419 TEST_JCC("g", 1, 0);
420 TEST_JCC("g", 1, -1);
421
422 TEST_JCC("b", 1, 1);
423 TEST_JCC("b", 1, 0);
424 TEST_JCC("b", 1, -1);
425
426 TEST_JCC("be", 1, 1);
427 TEST_JCC("be", 1, 0);
428 TEST_JCC("be", 1, -1);
429
430 TEST_JCC("ae", 1, 1);
431 TEST_JCC("ae", 1, 0);
432 TEST_JCC("ae", 1, -1);
433
434 TEST_JCC("a", 1, 1);
435 TEST_JCC("a", 1, 0);
436 TEST_JCC("a", 1, -1);
437
438
439 TEST_JCC("p", 1, 1);
440 TEST_JCC("p", 1, 0);
441
442 TEST_JCC("np", 1, 1);
443 TEST_JCC("np", 1, 0);
444
445 TEST_JCC("o", 0x7fffffff, 0);
446 TEST_JCC("o", 0x7fffffff, -1);
447
448 TEST_JCC("no", 0x7fffffff, 0);
449 TEST_JCC("no", 0x7fffffff, -1);
450
451 TEST_JCC("s", 0, 1);
452 TEST_JCC("s", 0, -1);
453 TEST_JCC("s", 0, 0);
454
455 TEST_JCC("ns", 0, 1);
456 TEST_JCC("ns", 0, -1);
457 TEST_JCC("ns", 0, 0);
458 }
459
460 #undef CC_MASK
461 #ifdef TEST_P4_FLAGS
462 #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
463 #else
464 #define CC_MASK (CC_O | CC_C)
465 #endif
466
467 #define OP mul
468 #include "test-i386-muldiv.h"
469
470 #define OP imul
471 #include "test-i386-muldiv.h"
472
473 void test_imulw2(long op0, long op1)
474 {
475 long res, s1, s0, flags;
476 s0 = op0;
477 s1 = op1;
478 res = s0;
479 flags = 0;
480 asm volatile ("push %4\n\t"
481 "popf\n\t"
482 "imulw %w2, %w0\n\t"
483 "pushf\n\t"
484 "pop %1\n\t"
485 : "=q" (res), "=g" (flags)
486 : "q" (s1), "0" (res), "1" (flags));
487 printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
488 "imulw", s0, s1, res, flags & CC_MASK);
489 }
490
491 void test_imull2(long op0, long op1)
492 {
493 long res, s1, s0, flags;
494 s0 = op0;
495 s1 = op1;
496 res = s0;
497 flags = 0;
498 asm volatile ("push %4\n\t"
499 "popf\n\t"
500 "imull %k2, %k0\n\t"
501 "pushf\n\t"
502 "pop %1\n\t"
503 : "=q" (res), "=g" (flags)
504 : "q" (s1), "0" (res), "1" (flags));
505 printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
506 "imull", s0, s1, res, flags & CC_MASK);
507 }
508
509 #if defined(__x86_64__)
510 void test_imulq2(long op0, long op1)
511 {
512 long res, s1, s0, flags;
513 s0 = op0;
514 s1 = op1;
515 res = s0;
516 flags = 0;
517 asm volatile ("push %4\n\t"
518 "popf\n\t"
519 "imulq %2, %0\n\t"
520 "pushf\n\t"
521 "pop %1\n\t"
522 : "=q" (res), "=g" (flags)
523 : "q" (s1), "0" (res), "1" (flags));
524 printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
525 "imulq", s0, s1, res, flags & CC_MASK);
526 }
527 #endif
528
529 #define TEST_IMUL_IM(size, rsize, op0, op1)\
530 {\
531 long res, flags, s1;\
532 flags = 0;\
533 res = 0;\
534 s1 = op1;\
535 asm volatile ("push %3\n\t"\
536 "popf\n\t"\
537 "imul" size " $" #op0 ", %" rsize "2, %" rsize "0\n\t" \
538 "pushf\n\t"\
539 "pop %1\n\t"\
540 : "=r" (res), "=g" (flags)\
541 : "r" (s1), "1" (flags), "0" (res));\
542 printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",\
543 "imul" size " im", (long)op0, (long)op1, res, flags & CC_MASK);\
544 }
545
546
547 #undef CC_MASK
548 #define CC_MASK (0)
549
550 #define OP div
551 #include "test-i386-muldiv.h"
552
553 #define OP idiv
554 #include "test-i386-muldiv.h"
555
556 void test_mul(void)
557 {
558 test_imulb(0x1234561d, 4);
559 test_imulb(3, -4);
560 test_imulb(0x80, 0x80);
561 test_imulb(0x10, 0x10);
562
563 test_imulw(0, 0x1234001d, 45);
564 test_imulw(0, 23, -45);
565 test_imulw(0, 0x8000, 0x8000);
566 test_imulw(0, 0x100, 0x100);
567
568 test_imull(0, 0x1234001d, 45);
569 test_imull(0, 23, -45);
570 test_imull(0, 0x80000000, 0x80000000);
571 test_imull(0, 0x10000, 0x10000);
572
573 test_mulb(0x1234561d, 4);
574 test_mulb(3, -4);
575 test_mulb(0x80, 0x80);
576 test_mulb(0x10, 0x10);
577
578 test_mulw(0, 0x1234001d, 45);
579 test_mulw(0, 23, -45);
580 test_mulw(0, 0x8000, 0x8000);
581 test_mulw(0, 0x100, 0x100);
582
583 test_mull(0, 0x1234001d, 45);
584 test_mull(0, 23, -45);
585 test_mull(0, 0x80000000, 0x80000000);
586 test_mull(0, 0x10000, 0x10000);
587
588 test_imulw2(0x1234001d, 45);
589 test_imulw2(23, -45);
590 test_imulw2(0x8000, 0x8000);
591 test_imulw2(0x100, 0x100);
592
593 test_imull2(0x1234001d, 45);
594 test_imull2(23, -45);
595 test_imull2(0x80000000, 0x80000000);
596 test_imull2(0x10000, 0x10000);
597
598 TEST_IMUL_IM("w", "w", 45, 0x1234);
599 TEST_IMUL_IM("w", "w", -45, 23);
600 TEST_IMUL_IM("w", "w", 0x8000, 0x80000000);
601 TEST_IMUL_IM("w", "w", 0x7fff, 0x1000);
602
603 TEST_IMUL_IM("l", "k", 45, 0x1234);
604 TEST_IMUL_IM("l", "k", -45, 23);
605 TEST_IMUL_IM("l", "k", 0x8000, 0x80000000);
606 TEST_IMUL_IM("l", "k", 0x7fff, 0x1000);
607
608 test_idivb(0x12341678, 0x127e);
609 test_idivb(0x43210123, -5);
610 test_idivb(0x12340004, -1);
611
612 test_idivw(0, 0x12345678, 12347);
613 test_idivw(0, -23223, -45);
614 test_idivw(0, 0x12348000, -1);
615 test_idivw(0x12343, 0x12345678, 0x81238567);
616
617 test_idivl(0, 0x12345678, 12347);
618 test_idivl(0, -233223, -45);
619 test_idivl(0, 0x80000000, -1);
620 test_idivl(0x12343, 0x12345678, 0x81234567);
621
622 test_divb(0x12341678, 0x127e);
623 test_divb(0x43210123, -5);
624 test_divb(0x12340004, -1);
625
626 test_divw(0, 0x12345678, 12347);
627 test_divw(0, -23223, -45);
628 test_divw(0, 0x12348000, -1);
629 test_divw(0x12343, 0x12345678, 0x81238567);
630
631 test_divl(0, 0x12345678, 12347);
632 test_divl(0, -233223, -45);
633 test_divl(0, 0x80000000, -1);
634 test_divl(0x12343, 0x12345678, 0x81234567);
635
636 #if defined(__x86_64__)
637 test_imulq(0, 0x1234001d1234001d, 45);
638 test_imulq(0, 23, -45);
639 test_imulq(0, 0x8000000000000000, 0x8000000000000000);
640 test_imulq(0, 0x100000000, 0x100000000);
641
642 test_mulq(0, 0x1234001d1234001d, 45);
643 test_mulq(0, 23, -45);
644 test_mulq(0, 0x8000000000000000, 0x8000000000000000);
645 test_mulq(0, 0x100000000, 0x100000000);
646
647 test_imulq2(0x1234001d1234001d, 45);
648 test_imulq2(23, -45);
649 test_imulq2(0x8000000000000000, 0x8000000000000000);
650 test_imulq2(0x100000000, 0x100000000);
651
652 TEST_IMUL_IM("q", "", 45, 0x12341234);
653 TEST_IMUL_IM("q", "", -45, 23);
654 TEST_IMUL_IM("q", "", 0x8000, 0x8000000000000000);
655 TEST_IMUL_IM("q", "", 0x7fff, 0x10000000);
656
657 test_idivq(0, 0x12345678abcdef, 12347);
658 test_idivq(0, -233223, -45);
659 test_idivq(0, 0x8000000000000000, -1);
660 test_idivq(0x12343, 0x12345678, 0x81234567);
661
662 test_divq(0, 0x12345678abcdef, 12347);
663 test_divq(0, -233223, -45);
664 test_divq(0, 0x8000000000000000, -1);
665 test_divq(0x12343, 0x12345678, 0x81234567);
666 #endif
667 }
668
669 #define TEST_BSX(op, size, op0)\
670 {\
671 long res, val, resz;\
672 val = op0;\
673 asm("xor %1, %1\n"\
674 "mov $0x12345678, %0\n"\
675 #op " %" size "2, %" size "0 ; setz %b1" \
676 : "=r" (res), "=q" (resz)\
677 : "g" (val));\
678 printf("%-10s A=" FMTLX " R=" FMTLX " %ld\n", #op, val, res, resz);\
679 }
680
681 void test_bsx(void)
682 {
683 TEST_BSX(bsrw, "w", 0);
684 TEST_BSX(bsrw, "w", 0x12340128);
685 TEST_BSX(bsfw, "w", 0);
686 TEST_BSX(bsfw, "w", 0x12340128);
687 TEST_BSX(bsrl, "k", 0);
688 TEST_BSX(bsrl, "k", 0x00340128);
689 TEST_BSX(bsfl, "k", 0);
690 TEST_BSX(bsfl, "k", 0x00340128);
691 #if defined(__x86_64__)
692 TEST_BSX(bsrq, "", 0);
693 TEST_BSX(bsrq, "", 0x003401281234);
694 TEST_BSX(bsfq, "", 0);
695 TEST_BSX(bsfq, "", 0x003401281234);
696 #endif
697 }
698
699 /**********************************************/
700
701 union float64u {
702 double d;
703 uint64_t l;
704 };
705
706 union float64u q_nan = { .l = 0xFFF8000000000000 };
707 union float64u s_nan = { .l = 0xFFF0000000000000 };
708
709 void test_fops(double a, double b)
710 {
711 printf("a=%f b=%f a+b=%f\n", a, b, a + b);
712 printf("a=%f b=%f a-b=%f\n", a, b, a - b);
713 printf("a=%f b=%f a*b=%f\n", a, b, a * b);
714 printf("a=%f b=%f a/b=%f\n", a, b, a / b);
715 printf("a=%f b=%f fmod(a, b)=%f\n", a, b, fmod(a, b));
716 printf("a=%f sqrt(a)=%f\n", a, sqrt(a));
717 printf("a=%f sin(a)=%f\n", a, sin(a));
718 printf("a=%f cos(a)=%f\n", a, cos(a));
719 printf("a=%f tan(a)=%f\n", a, tan(a));
720 printf("a=%f log(a)=%f\n", a, log(a));
721 printf("a=%f exp(a)=%f\n", a, exp(a));
722 printf("a=%f b=%f atan2(a, b)=%f\n", a, b, atan2(a, b));
723 /* just to test some op combining */
724 printf("a=%f asin(sin(a))=%f\n", a, asin(sin(a)));
725 printf("a=%f acos(cos(a))=%f\n", a, acos(cos(a)));
726 printf("a=%f atan(tan(a))=%f\n", a, atan(tan(a)));
727
728 }
729
730 void fpu_clear_exceptions(void)
731 {
732 struct __attribute__((packed)) {
733 uint16_t fpuc;
734 uint16_t dummy1;
735 uint16_t fpus;
736 uint16_t dummy2;
737 uint16_t fptag;
738 uint16_t dummy3;
739 uint32_t ignored[4];
740 long double fpregs[8];
741 } float_env32;
742
743 asm volatile ("fnstenv %0\n" : : "m" (float_env32));
744 float_env32.fpus &= ~0x7f;
745 asm volatile ("fldenv %0\n" : : "m" (float_env32));
746 }
747
748 /* XXX: display exception bits when supported */
749 #define FPUS_EMASK 0x0000
750 //#define FPUS_EMASK 0x007f
751
752 void test_fcmp(double a, double b)
753 {
754 long eflags, fpus;
755
756 fpu_clear_exceptions();
757 asm("fcom %2\n"
758 "fstsw %%ax\n"
759 : "=a" (fpus)
760 : "t" (a), "u" (b));
761 printf("fcom(%f %f)=%04lx \n",
762 a, b, fpus & (0x4500 | FPUS_EMASK));
763 fpu_clear_exceptions();
764 asm("fucom %2\n"
765 "fstsw %%ax\n"
766 : "=a" (fpus)
767 : "t" (a), "u" (b));
768 printf("fucom(%f %f)=%04lx\n",
769 a, b, fpus & (0x4500 | FPUS_EMASK));
770 if (TEST_FCOMI) {
771 /* test f(u)comi instruction */
772 fpu_clear_exceptions();
773 asm("fcomi %3, %2\n"
774 "fstsw %%ax\n"
775 "pushf\n"
776 "pop %0\n"
777 : "=r" (eflags), "=a" (fpus)
778 : "t" (a), "u" (b));
779 printf("fcomi(%f %f)=%04lx %02lx\n",
780 a, b, fpus & FPUS_EMASK, eflags & (CC_Z | CC_P | CC_C));
781 fpu_clear_exceptions();
782 asm("fucomi %3, %2\n"
783 "fstsw %%ax\n"
784 "pushf\n"
785 "pop %0\n"
786 : "=r" (eflags), "=a" (fpus)
787 : "t" (a), "u" (b));
788 printf("fucomi(%f %f)=%04lx %02lx\n",
789 a, b, fpus & FPUS_EMASK, eflags & (CC_Z | CC_P | CC_C));
790 }
791 fpu_clear_exceptions();
792 }
793
794 void test_fcvt(double a)
795 {
796 float fa;
797 long double la;
798 int16_t fpuc;
799 int i;
800 int64_t lla;
801 int ia;
802 int16_t wa;
803 double ra;
804
805 fa = a;
806 la = a;
807 printf("(float)%f = %f\n", a, fa);
808 printf("(long double)%f = %Lf\n", a, la);
809 printf("a=" FMT64X "\n", *(uint64_t *)&a);
810 printf("la=" FMT64X " %04x\n", *(uint64_t *)&la,
811 *(unsigned short *)((char *)(&la) + 8));
812
813 /* test all roundings */
814 asm volatile ("fstcw %0" : "=m" (fpuc));
815 for(i=0;i<4;i++) {
816 asm volatile ("fldcw %0" : : "m" ((fpuc & ~0x0c00) | (i << 10)));
817 asm volatile ("fist %0" : "=m" (wa) : "t" (a));
818 asm volatile ("fistl %0" : "=m" (ia) : "t" (a));
819 asm volatile ("fistpll %0" : "=m" (lla) : "t" (a) : "st");
820 asm volatile ("frndint ; fstl %0" : "=m" (ra) : "t" (a));
821 asm volatile ("fldcw %0" : : "m" (fpuc));
822 printf("(short)a = %d\n", wa);
823 printf("(int)a = %d\n", ia);
824 printf("(int64_t)a = " FMT64X "\n", lla);
825 printf("rint(a) = %f\n", ra);
826 }
827 }
828
829 #define TEST(N) \
830 asm("fld" #N : "=t" (a)); \
831 printf("fld" #N "= %f\n", a);
832
833 void test_fconst(void)
834 {
835 double a;
836 TEST(1);
837 TEST(l2t);
838 TEST(l2e);
839 TEST(pi);
840 TEST(lg2);
841 TEST(ln2);
842 TEST(z);
843 }
844
845 void test_fbcd(double a)
846 {
847 unsigned short bcd[5];
848 double b;
849
850 asm("fbstp %0" : "=m" (bcd[0]) : "t" (a) : "st");
851 asm("fbld %1" : "=t" (b) : "m" (bcd[0]));
852 printf("a=%f bcd=%04x%04x%04x%04x%04x b=%f\n",
853 a, bcd[4], bcd[3], bcd[2], bcd[1], bcd[0], b);
854 }
855
856 #define TEST_ENV(env, save, restore)\
857 {\
858 memset((env), 0xaa, sizeof(*(env)));\
859 for(i=0;i<5;i++)\
860 asm volatile ("fldl %0" : : "m" (dtab[i]));\
861 asm volatile (save " %0\n" : : "m" (*(env)));\
862 asm volatile (restore " %0\n": : "m" (*(env)));\
863 for(i=0;i<5;i++)\
864 asm volatile ("fstpl %0" : "=m" (rtab[i]));\
865 for(i=0;i<5;i++)\
866 printf("res[%d]=%f\n", i, rtab[i]);\
867 printf("fpuc=%04x fpus=%04x fptag=%04x\n",\
868 (env)->fpuc,\
869 (env)->fpus & 0xff00,\
870 (env)->fptag);\
871 }
872
873 void test_fenv(void)
874 {
875 struct __attribute__((packed)) {
876 uint16_t fpuc;
877 uint16_t dummy1;
878 uint16_t fpus;
879 uint16_t dummy2;
880 uint16_t fptag;
881 uint16_t dummy3;
882 uint32_t ignored[4];
883 long double fpregs[8];
884 } float_env32;
885 struct __attribute__((packed)) {
886 uint16_t fpuc;
887 uint16_t fpus;
888 uint16_t fptag;
889 uint16_t ignored[4];
890 long double fpregs[8];
891 } float_env16;
892 double dtab[8];
893 double rtab[8];
894 int i;
895
896 for(i=0;i<8;i++)
897 dtab[i] = i + 1;
898
899 TEST_ENV(&float_env16, "data16 fnstenv", "data16 fldenv");
900 TEST_ENV(&float_env16, "data16 fnsave", "data16 frstor");
901 TEST_ENV(&float_env32, "fnstenv", "fldenv");
902 TEST_ENV(&float_env32, "fnsave", "frstor");
903
904 /* test for ffree */
905 for(i=0;i<5;i++)
906 asm volatile ("fldl %0" : : "m" (dtab[i]));
907 asm volatile("ffree %st(2)");
908 asm volatile ("fnstenv %0\n" : : "m" (float_env32));
909 asm volatile ("fninit");
910 printf("fptag=%04x\n", float_env32.fptag);
911 }
912
913
914 #define TEST_FCMOV(a, b, eflags, CC)\
915 {\
916 double res;\
917 asm("push %3\n"\
918 "popf\n"\
919 "fcmov" CC " %2, %0\n"\
920 : "=t" (res)\
921 : "0" (a), "u" (b), "g" (eflags));\
922 printf("fcmov%s eflags=0x%04lx-> %f\n", \
923 CC, (long)eflags, res);\
924 }
925
926 void test_fcmov(void)
927 {
928 double a, b;
929 long eflags, i;
930
931 a = 1.0;
932 b = 2.0;
933 for(i = 0; i < 4; i++) {
934 eflags = 0;
935 if (i & 1)
936 eflags |= CC_C;
937 if (i & 2)
938 eflags |= CC_Z;
939 TEST_FCMOV(a, b, eflags, "b");
940 TEST_FCMOV(a, b, eflags, "e");
941 TEST_FCMOV(a, b, eflags, "be");
942 TEST_FCMOV(a, b, eflags, "nb");
943 TEST_FCMOV(a, b, eflags, "ne");
944 TEST_FCMOV(a, b, eflags, "nbe");
945 }
946 TEST_FCMOV(a, b, 0, "u");
947 TEST_FCMOV(a, b, CC_P, "u");
948 TEST_FCMOV(a, b, 0, "nu");
949 TEST_FCMOV(a, b, CC_P, "nu");
950 }
951
952 void test_floats(void)
953 {
954 test_fops(2, 3);
955 test_fops(1.4, -5);
956 test_fcmp(2, -1);
957 test_fcmp(2, 2);
958 test_fcmp(2, 3);
959 test_fcmp(2, q_nan.d);
960 test_fcmp(q_nan.d, -1);
961 test_fcvt(0.5);
962 test_fcvt(-0.5);
963 test_fcvt(1.0/7.0);
964 test_fcvt(-1.0/9.0);
965 test_fcvt(32768);
966 test_fcvt(-1e20);
967 test_fconst();
968 test_fbcd(1234567890123456);
969 test_fbcd(-123451234567890);
970 test_fenv();
971 if (TEST_CMOV) {
972 test_fcmov();
973 }
974 }
975
976 /**********************************************/
977 #if !defined(__x86_64__)
978
979 #define TEST_BCD(op, op0, cc_in, cc_mask)\
980 {\
981 int res, flags;\
982 res = op0;\
983 flags = cc_in;\
984 asm ("push %3\n\t"\
985 "popf\n\t"\
986 #op "\n\t"\
987 "pushf\n\t"\
988 "pop %1\n\t"\
989 : "=a" (res), "=g" (flags)\
990 : "0" (res), "1" (flags));\
991 printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",\
992 #op, op0, res, cc_in, flags & cc_mask);\
993 }
994
995 void test_bcd(void)
996 {
997 TEST_BCD(daa, 0x12340503, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
998 TEST_BCD(daa, 0x12340506, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
999 TEST_BCD(daa, 0x12340507, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1000 TEST_BCD(daa, 0x12340559, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1001 TEST_BCD(daa, 0x12340560, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1002 TEST_BCD(daa, 0x1234059f, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1003 TEST_BCD(daa, 0x123405a0, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1004 TEST_BCD(daa, 0x12340503, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1005 TEST_BCD(daa, 0x12340506, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1006 TEST_BCD(daa, 0x12340503, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1007 TEST_BCD(daa, 0x12340506, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1008 TEST_BCD(daa, 0x12340503, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1009 TEST_BCD(daa, 0x12340506, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1010
1011 TEST_BCD(das, 0x12340503, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1012 TEST_BCD(das, 0x12340506, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1013 TEST_BCD(das, 0x12340507, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1014 TEST_BCD(das, 0x12340559, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1015 TEST_BCD(das, 0x12340560, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1016 TEST_BCD(das, 0x1234059f, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1017 TEST_BCD(das, 0x123405a0, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1018 TEST_BCD(das, 0x12340503, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1019 TEST_BCD(das, 0x12340506, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1020 TEST_BCD(das, 0x12340503, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1021 TEST_BCD(das, 0x12340506, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1022 TEST_BCD(das, 0x12340503, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1023 TEST_BCD(das, 0x12340506, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
1024
1025 TEST_BCD(aaa, 0x12340205, CC_A, (CC_C | CC_A));
1026 TEST_BCD(aaa, 0x12340306, CC_A, (CC_C | CC_A));
1027 TEST_BCD(aaa, 0x1234040a, CC_A, (CC_C | CC_A));
1028 TEST_BCD(aaa, 0x123405fa, CC_A, (CC_C | CC_A));
1029 TEST_BCD(aaa, 0x12340205, 0, (CC_C | CC_A));
1030 TEST_BCD(aaa, 0x12340306, 0, (CC_C | CC_A));
1031 TEST_BCD(aaa, 0x1234040a, 0, (CC_C | CC_A));
1032 TEST_BCD(aaa, 0x123405fa, 0, (CC_C | CC_A));
1033
1034 TEST_BCD(aas, 0x12340205, CC_A, (CC_C | CC_A));
1035 TEST_BCD(aas, 0x12340306, CC_A, (CC_C | CC_A));
1036 TEST_BCD(aas, 0x1234040a, CC_A, (CC_C | CC_A));
1037 TEST_BCD(aas, 0x123405fa, CC_A, (CC_C | CC_A));
1038 TEST_BCD(aas, 0x12340205, 0, (CC_C | CC_A));
1039 TEST_BCD(aas, 0x12340306, 0, (CC_C | CC_A));
1040 TEST_BCD(aas, 0x1234040a, 0, (CC_C | CC_A));
1041 TEST_BCD(aas, 0x123405fa, 0, (CC_C | CC_A));
1042
1043 TEST_BCD(aam, 0x12340547, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
1044 TEST_BCD(aad, 0x12340407, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
1045 }
1046 #endif
1047
1048 #define TEST_XCHG(op, size, opconst)\
1049 {\
1050 long op0, op1;\
1051 op0 = i2l(0x12345678);\
1052 op1 = i2l(0xfbca7654);\
1053 asm(#op " %" size "0, %" size "1" \
1054 : "=q" (op0), opconst (op1) \
1055 : "0" (op0), "1" (op1));\
1056 printf("%-10s A=" FMTLX " B=" FMTLX "\n",\
1057 #op, op0, op1);\
1058 }
1059
1060 #define TEST_CMPXCHG(op, size, opconst, eax)\
1061 {\
1062 long op0, op1, op2;\
1063 op0 = i2l(0x12345678);\
1064 op1 = i2l(0xfbca7654);\
1065 op2 = i2l(eax);\
1066 asm(#op " %" size "0, %" size "1" \
1067 : "=q" (op0), opconst (op1) \
1068 : "0" (op0), "1" (op1), "a" (op2));\
1069 printf("%-10s EAX=" FMTLX " A=" FMTLX " C=" FMTLX "\n",\
1070 #op, op2, op0, op1);\
1071 }
1072
1073 void test_xchg(void)
1074 {
1075 #if defined(__x86_64__)
1076 TEST_XCHG(xchgq, "", "=q");
1077 #endif
1078 TEST_XCHG(xchgl, "k", "=q");
1079 TEST_XCHG(xchgw, "w", "=q");
1080 TEST_XCHG(xchgb, "b", "=q");
1081
1082 #if defined(__x86_64__)
1083 TEST_XCHG(xchgq, "", "=m");
1084 #endif
1085 TEST_XCHG(xchgl, "k", "=m");
1086 TEST_XCHG(xchgw, "w", "=m");
1087 TEST_XCHG(xchgb, "b", "=m");
1088
1089 #if defined(__x86_64__)
1090 TEST_XCHG(xaddq, "", "=q");
1091 #endif
1092 TEST_XCHG(xaddl, "k", "=q");
1093 TEST_XCHG(xaddw, "w", "=q");
1094 TEST_XCHG(xaddb, "b", "=q");
1095
1096 {
1097 int res;
1098 res = 0x12345678;
1099 asm("xaddl %1, %0" : "=r" (res) : "0" (res));
1100 printf("xaddl same res=%08x\n", res);
1101 }
1102
1103 #if defined(__x86_64__)
1104 TEST_XCHG(xaddq, "", "=m");
1105 #endif
1106 TEST_XCHG(xaddl, "k", "=m");
1107 TEST_XCHG(xaddw, "w", "=m");
1108 TEST_XCHG(xaddb, "b", "=m");
1109
1110 #if defined(__x86_64__)
1111 TEST_CMPXCHG(cmpxchgq, "", "=q", 0xfbca7654);
1112 #endif
1113 TEST_CMPXCHG(cmpxchgl, "k", "=q", 0xfbca7654);
1114 TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfbca7654);
1115 TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfbca7654);
1116
1117 #if defined(__x86_64__)
1118 TEST_CMPXCHG(cmpxchgq, "", "=q", 0xfffefdfc);
1119 #endif
1120 TEST_CMPXCHG(cmpxchgl, "k", "=q", 0xfffefdfc);
1121 TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfffefdfc);
1122 TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfffefdfc);
1123
1124 #if defined(__x86_64__)
1125 TEST_CMPXCHG(cmpxchgq, "", "=m", 0xfbca7654);
1126 #endif
1127 TEST_CMPXCHG(cmpxchgl, "k", "=m", 0xfbca7654);
1128 TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfbca7654);
1129 TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfbca7654);
1130
1131 #if defined(__x86_64__)
1132 TEST_CMPXCHG(cmpxchgq, "", "=m", 0xfffefdfc);
1133 #endif
1134 TEST_CMPXCHG(cmpxchgl, "k", "=m", 0xfffefdfc);
1135 TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfffefdfc);
1136 TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfffefdfc);
1137
1138 {
1139 uint64_t op0, op1, op2;
1140 long i, eflags;
1141
1142 for(i = 0; i < 2; i++) {
1143 op0 = 0x123456789abcd;
1144 if (i == 0)
1145 op1 = 0xfbca765423456;
1146 else
1147 op1 = op0;
1148 op2 = 0x6532432432434;
1149 asm("cmpxchg8b %1\n"
1150 "pushf\n"
1151 "pop %2\n"
1152 : "=A" (op0), "=m" (op1), "=g" (eflags)
1153 : "0" (op0), "m" (op1), "b" ((int)op2), "c" ((int)(op2 >> 32)));
1154 printf("cmpxchg8b: op0=" FMT64X " op1=" FMT64X " CC=%02lx\n",
1155 op0, op1, eflags & CC_Z);
1156 }
1157 }
1158 }
1159
1160 #ifdef TEST_SEGS
1161 /**********************************************/
1162 /* segmentation tests */
1163
1164 #include <asm/ldt.h>
1165 #include <linux/unistd.h>
1166 #include <linux/version.h>
1167
1168 _syscall3(int, modify_ldt, int, func, void *, ptr, unsigned long, bytecount)
1169
1170 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 5, 66)
1171 #define modify_ldt_ldt_s user_desc
1172 #endif
1173
1174 #define MK_SEL(n) (((n) << 3) | 7)
1175
1176 uint8_t seg_data1[4096];
1177 uint8_t seg_data2[4096];
1178
1179 #define TEST_LR(op, size, seg, mask)\
1180 {\
1181 int res, res2;\
1182 res = 0x12345678;\
1183 asm (op " %" size "2, %" size "0\n" \
1184 "movl $0, %1\n"\
1185 "jnz 1f\n"\
1186 "movl $1, %1\n"\
1187 "1:\n"\
1188 : "=r" (res), "=r" (res2) : "m" (seg), "0" (res));\
1189 printf(op ": Z=%d %08x\n", res2, res & ~(mask));\
1190 }
1191
1192 /* NOTE: we use Linux modify_ldt syscall */
1193 void test_segs(void)
1194 {
1195 struct modify_ldt_ldt_s ldt;
1196 long long ldt_table[3];
1197 int res, res2;
1198 char tmp;
1199 struct {
1200 uint32_t offset;
1201 uint16_t seg;
1202 } __attribute__((packed)) segoff;
1203
1204 ldt.entry_number = 1;
1205 ldt.base_addr = (unsigned long)&seg_data1;
1206 ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12;
1207 ldt.seg_32bit = 1;
1208 ldt.contents = MODIFY_LDT_CONTENTS_DATA;
1209 ldt.read_exec_only = 0;
1210 ldt.limit_in_pages = 1;
1211 ldt.seg_not_present = 0;
1212 ldt.useable = 1;
1213 modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
1214
1215 ldt.entry_number = 2;
1216 ldt.base_addr = (unsigned long)&seg_data2;
1217 ldt.limit = (sizeof(seg_data2) + 0xfff) >> 12;
1218 ldt.seg_32bit = 1;
1219 ldt.contents = MODIFY_LDT_CONTENTS_DATA;
1220 ldt.read_exec_only = 0;
1221 ldt.limit_in_pages = 1;
1222 ldt.seg_not_present = 0;
1223 ldt.useable = 1;
1224 modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
1225
1226 modify_ldt(0, &ldt_table, sizeof(ldt_table)); /* read ldt entries */
1227 #if 0
1228 {
1229 int i;
1230 for(i=0;i<3;i++)
1231 printf("%d: %016Lx\n", i, ldt_table[i]);
1232 }
1233 #endif
1234 /* do some tests with fs or gs */
1235 asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
1236
1237 seg_data1[1] = 0xaa;
1238 seg_data2[1] = 0x55;
1239
1240 asm volatile ("fs movzbl 0x1, %0" : "=r" (res));
1241 printf("FS[1] = %02x\n", res);
1242
1243 asm volatile ("pushl %%gs\n"
1244 "movl %1, %%gs\n"
1245 "gs movzbl 0x1, %0\n"
1246 "popl %%gs\n"
1247 : "=r" (res)
1248 : "r" (MK_SEL(2)));
1249 printf("GS[1] = %02x\n", res);
1250
1251 /* tests with ds/ss (implicit segment case) */
1252 tmp = 0xa5;
1253 asm volatile ("pushl %%ebp\n\t"
1254 "pushl %%ds\n\t"
1255 "movl %2, %%ds\n\t"
1256 "movl %3, %%ebp\n\t"
1257 "movzbl 0x1, %0\n\t"
1258 "movzbl (%%ebp), %1\n\t"
1259 "popl %%ds\n\t"
1260 "popl %%ebp\n\t"
1261 : "=r" (res), "=r" (res2)
1262 : "r" (MK_SEL(1)), "r" (&tmp));
1263 printf("DS[1] = %02x\n", res);
1264 printf("SS[tmp] = %02x\n", res2);
1265
1266 segoff.seg = MK_SEL(2);
1267 segoff.offset = 0xabcdef12;
1268 asm volatile("lfs %2, %0\n\t"
1269 "movl %%fs, %1\n\t"
1270 : "=r" (res), "=g" (res2)
1271 : "m" (segoff));
1272 printf("FS:reg = %04x:%08x\n", res2, res);
1273
1274 TEST_LR("larw", "w", MK_SEL(2), 0x0100);
1275 TEST_LR("larl", "", MK_SEL(2), 0x0100);
1276 TEST_LR("lslw", "w", MK_SEL(2), 0);
1277 TEST_LR("lsll", "", MK_SEL(2), 0);
1278
1279 TEST_LR("larw", "w", 0xfff8, 0);
1280 TEST_LR("larl", "", 0xfff8, 0);
1281 TEST_LR("lslw", "w", 0xfff8, 0);
1282 TEST_LR("lsll", "", 0xfff8, 0);
1283 }
1284
1285 /* 16 bit code test */
1286 extern char code16_start, code16_end;
1287 extern char code16_func1;
1288 extern char code16_func2;
1289 extern char code16_func3;
1290
1291 void test_code16(void)
1292 {
1293 struct modify_ldt_ldt_s ldt;
1294 int res, res2;
1295
1296 /* build a code segment */
1297 ldt.entry_number = 1;
1298 ldt.base_addr = (unsigned long)&code16_start;
1299 ldt.limit = &code16_end - &code16_start;
1300 ldt.seg_32bit = 0;
1301 ldt.contents = MODIFY_LDT_CONTENTS_CODE;
1302 ldt.read_exec_only = 0;
1303 ldt.limit_in_pages = 0;
1304 ldt.seg_not_present = 0;
1305 ldt.useable = 1;
1306 modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
1307
1308 /* call the first function */
1309 asm volatile ("lcall %1, %2"
1310 : "=a" (res)
1311 : "i" (MK_SEL(1)), "i" (&code16_func1): "memory", "cc");
1312 printf("func1() = 0x%08x\n", res);
1313 asm volatile ("lcall %2, %3"
1314 : "=a" (res), "=c" (res2)
1315 : "i" (MK_SEL(1)), "i" (&code16_func2): "memory", "cc");
1316 printf("func2() = 0x%08x spdec=%d\n", res, res2);
1317 asm volatile ("lcall %1, %2"
1318 : "=a" (res)
1319 : "i" (MK_SEL(1)), "i" (&code16_func3): "memory", "cc");
1320 printf("func3() = 0x%08x\n", res);
1321 }
1322 #endif
1323
1324 extern char func_lret32;
1325 extern char func_iret32;
1326
1327 void test_misc(void)
1328 {
1329 char table[256];
1330 long res, i;
1331
1332 for(i=0;i<256;i++) table[i] = 256 - i;
1333 res = 0x12345678;
1334 asm ("xlat" : "=a" (res) : "b" (table), "0" (res));
1335 printf("xlat: EAX=" FMTLX "\n", res);
1336
1337 #if !defined(__x86_64__)
1338 asm volatile ("push %%cs ; call %1"
1339 : "=a" (res)
1340 : "m" (func_lret32): "memory", "cc");
1341 printf("func_lret32=" FMTLX "\n", res);
1342
1343 asm volatile ("pushf ; push %%cs ; call %1"
1344 : "=a" (res)
1345 : "m" (func_iret32): "memory", "cc");
1346 printf("func_iret32=" FMTLX "\n", res);
1347 #endif
1348
1349 #if defined(__x86_64__)
1350 /* specific popl test */
1351 asm volatile ("push $12345432 ; push $0x9abcdef ; pop (%%rsp) ; pop %0"
1352 : "=g" (res));
1353 printf("popl esp=" FMTLX "\n", res);
1354 #else
1355 /* specific popl test */
1356 asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popl (%%esp) ; popl %0"
1357 : "=g" (res));
1358 printf("popl esp=" FMTLX "\n", res);
1359
1360 /* specific popw test */
1361 asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popw (%%esp) ; addl $2, %%esp ; popl %0"
1362 : "=g" (res));
1363 printf("popw esp=" FMTLX "\n", res);
1364 #endif
1365 }
1366
1367 uint8_t str_buffer[4096];
1368
1369 #define TEST_STRING1(OP, size, DF, REP)\
1370 {\
1371 long esi, edi, eax, ecx, eflags;\
1372 \
1373 esi = (long)(str_buffer + sizeof(str_buffer) / 2);\
1374 edi = (long)(str_buffer + sizeof(str_buffer) / 2) + 16;\
1375 eax = i2l(0x12345678);\
1376 ecx = 17;\
1377 \
1378 asm volatile ("push $0\n\t"\
1379 "popf\n\t"\
1380 DF "\n\t"\
1381 REP #OP size "\n\t"\
1382 "cld\n\t"\
1383 "pushf\n\t"\
1384 "pop %4\n\t"\
1385 : "=S" (esi), "=D" (edi), "=a" (eax), "=c" (ecx), "=g" (eflags)\
1386 : "0" (esi), "1" (edi), "2" (eax), "3" (ecx));\
1387 printf("%-10s ESI=" FMTLX " EDI=" FMTLX " EAX=" FMTLX " ECX=" FMTLX " EFL=%04x\n",\
1388 REP #OP size, esi, edi, eax, ecx,\
1389 (int)(eflags & (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)));\
1390 }
1391
1392 #define TEST_STRING(OP, REP)\
1393 TEST_STRING1(OP, "b", "", REP);\
1394 TEST_STRING1(OP, "w", "", REP);\
1395 TEST_STRING1(OP, "l", "", REP);\
1396 X86_64_ONLY(TEST_STRING1(OP, "q", "", REP));\
1397 TEST_STRING1(OP, "b", "std", REP);\
1398 TEST_STRING1(OP, "w", "std", REP);\
1399 TEST_STRING1(OP, "l", "std", REP);\
1400 X86_64_ONLY(TEST_STRING1(OP, "q", "std", REP))
1401
1402 void test_string(void)
1403 {
1404 int i;
1405 for(i = 0;i < sizeof(str_buffer); i++)
1406 str_buffer[i] = i + 0x56;
1407 TEST_STRING(stos, "");
1408 TEST_STRING(stos, "rep ");
1409 TEST_STRING(lods, ""); /* to verify stos */
1410 TEST_STRING(lods, "rep ");
1411 TEST_STRING(movs, "");
1412 TEST_STRING(movs, "rep ");
1413 TEST_STRING(lods, ""); /* to verify stos */
1414
1415 /* XXX: better tests */
1416 TEST_STRING(scas, "");
1417 TEST_STRING(scas, "repz ");
1418 TEST_STRING(scas, "repnz ");
1419 TEST_STRING(cmps, "");
1420 TEST_STRING(cmps, "repz ");
1421 TEST_STRING(cmps, "repnz ");
1422 }
1423
1424 #ifdef TEST_VM86
1425 /* VM86 test */
1426
1427 static inline void set_bit(uint8_t *a, unsigned int bit)
1428 {
1429 a[bit / 8] |= (1 << (bit % 8));
1430 }
1431
1432 static inline uint8_t *seg_to_linear(unsigned int seg, unsigned int reg)
1433 {
1434 return (uint8_t *)((seg << 4) + (reg & 0xffff));
1435 }
1436
1437 static inline void pushw(struct vm86_regs *r, int val)
1438 {
1439 r->esp = (r->esp & ~0xffff) | ((r->esp - 2) & 0xffff);
1440 *(uint16_t *)seg_to_linear(r->ss, r->esp) = val;
1441 }
1442
1443 #undef __syscall_return
1444 #define __syscall_return(type, res) \
1445 do { \
1446 return (type) (res); \
1447 } while (0)
1448
1449 _syscall2(int, vm86, int, func, struct vm86plus_struct *, v86)
1450
1451 extern char vm86_code_start;
1452 extern char vm86_code_end;
1453
1454 #define VM86_CODE_CS 0x100
1455 #define VM86_CODE_IP 0x100
1456
1457 void test_vm86(void)
1458 {
1459 struct vm86plus_struct ctx;
1460 struct vm86_regs *r;
1461 uint8_t *vm86_mem;
1462 int seg, ret;
1463
1464 vm86_mem = mmap((void *)0x00000000, 0x110000,
1465 PROT_WRITE | PROT_READ | PROT_EXEC,
1466 MAP_FIXED | MAP_ANON | MAP_PRIVATE, -1, 0);
1467 if (vm86_mem == MAP_FAILED) {
1468 printf("ERROR: could not map vm86 memory");
1469 return;
1470 }
1471 memset(&ctx, 0, sizeof(ctx));
1472
1473 /* init basic registers */
1474 r = &ctx.regs;
1475 r->eip = VM86_CODE_IP;
1476 r->esp = 0xfffe;
1477 seg = VM86_CODE_CS;
1478 r->cs = seg;
1479 r->ss = seg;
1480 r->ds = seg;
1481 r->es = seg;
1482 r->fs = seg;
1483 r->gs = seg;
1484 r->eflags = VIF_MASK;
1485
1486 /* move code to proper address. We use the same layout as a .com
1487 dos program. */
1488 memcpy(vm86_mem + (VM86_CODE_CS << 4) + VM86_CODE_IP,
1489 &vm86_code_start, &vm86_code_end - &vm86_code_start);
1490
1491 /* mark int 0x21 as being emulated */
1492 set_bit((uint8_t *)&ctx.int_revectored, 0x21);
1493
1494 for(;;) {
1495 ret = vm86(VM86_ENTER, &ctx);
1496 switch(VM86_TYPE(ret)) {
1497 case VM86_INTx:
1498 {
1499 int int_num, ah, v;
1500
1501 int_num = VM86_ARG(ret);
1502 if (int_num != 0x21)
1503 goto unknown_int;
1504 ah = (r->eax >> 8) & 0xff;
1505 switch(ah) {
1506 case 0x00: /* exit */
1507 goto the_end;
1508 case 0x02: /* write char */
1509 {
1510 uint8_t c = r->edx;
1511 putchar(c);
1512 }
1513 break;
1514 case 0x09: /* write string */
1515 {
1516 uint8_t c, *ptr;
1517 ptr = seg_to_linear(r->ds, r->edx);
1518 for(;;) {
1519 c = *ptr++;
1520 if (c == '$')
1521 break;
1522 putchar(c);
1523 }
1524 r->eax = (r->eax & ~0xff) | '$';
1525 }
1526 break;
1527 case 0xff: /* extension: write eflags number in edx */
1528 v = (int)r->edx;
1529 #ifndef LINUX_VM86_IOPL_FIX
1530 v &= ~0x3000;
1531 #endif
1532 printf("%08x\n", v);
1533 break;
1534 default:
1535 unknown_int:
1536 printf("unsupported int 0x%02x\n", int_num);
1537 goto the_end;
1538 }
1539 }
1540 break;
1541 case VM86_SIGNAL:
1542 /* a signal came, we just ignore that */
1543 break;
1544 case VM86_STI:
1545 break;
1546 default:
1547 printf("ERROR: unhandled vm86 return code (0x%x)\n", ret);
1548 goto the_end;
1549 }
1550 }
1551 the_end:
1552 printf("VM86 end\n");
1553 munmap(vm86_mem, 0x110000);
1554 }
1555 #endif
1556
1557 /* exception tests */
1558 #if defined(__i386__) && !defined(REG_EAX)
1559 #define REG_EAX EAX
1560 #define REG_EBX EBX
1561 #define REG_ECX ECX
1562 #define REG_EDX EDX
1563 #define REG_ESI ESI
1564 #define REG_EDI EDI
1565 #define REG_EBP EBP
1566 #define REG_ESP ESP
1567 #define REG_EIP EIP
1568 #define REG_EFL EFL
1569 #define REG_TRAPNO TRAPNO
1570 #define REG_ERR ERR
1571 #endif
1572
1573 #if defined(__x86_64__)
1574 #define REG_EIP REG_RIP
1575 #endif
1576
1577 jmp_buf jmp_env;
1578 int v1;
1579 int tab[2];
1580
1581 void sig_handler(int sig, siginfo_t *info, void *puc)
1582 {
1583 struct ucontext *uc = puc;
1584
1585 printf("si_signo=%d si_errno=%d si_code=%d",
1586 info->si_signo, info->si_errno, info->si_code);
1587 printf(" si_addr=0x%08lx",
1588 (unsigned long)info->si_addr);
1589 printf("\n");
1590
1591 printf("trapno=" FMTLX " err=" FMTLX,
1592 (long)uc->uc_mcontext.gregs[REG_TRAPNO],
1593 (long)uc->uc_mcontext.gregs[REG_ERR]);
1594 printf(" EIP=" FMTLX, (long)uc->uc_mcontext.gregs[REG_EIP]);
1595 printf("\n");
1596 longjmp(jmp_env, 1);
1597 }
1598
1599 void test_exceptions(void)
1600 {
1601 struct sigaction act;
1602 volatile int val;
1603
1604 act.sa_sigaction = sig_handler;
1605 sigemptyset(&act.sa_mask);
1606 act.sa_flags = SA_SIGINFO | SA_NODEFER;
1607 sigaction(SIGFPE, &act, NULL);
1608 sigaction(SIGILL, &act, NULL);
1609 sigaction(SIGSEGV, &act, NULL);
1610 sigaction(SIGBUS, &act, NULL);
1611 sigaction(SIGTRAP, &act, NULL);
1612
1613 /* test division by zero reporting */
1614 printf("DIVZ exception:\n");
1615 if (setjmp(jmp_env) == 0) {
1616 /* now divide by zero */
1617 v1 = 0;
1618 v1 = 2 / v1;
1619 }
1620
1621 #if !defined(__x86_64__)
1622 printf("BOUND exception:\n");
1623 if (setjmp(jmp_env) == 0) {
1624 /* bound exception */
1625 tab[0] = 1;
1626 tab[1] = 10;
1627 asm volatile ("bound %0, %1" : : "r" (11), "m" (tab[0]));
1628 }
1629 #endif
1630
1631 #ifdef TEST_SEGS
1632 printf("segment exceptions:\n");
1633 if (setjmp(jmp_env) == 0) {
1634 /* load an invalid segment */
1635 asm volatile ("movl %0, %%fs" : : "r" ((0x1234 << 3) | 1));
1636 }
1637 if (setjmp(jmp_env) == 0) {
1638 /* null data segment is valid */
1639 asm volatile ("movl %0, %%fs" : : "r" (3));
1640 /* null stack segment */
1641 asm volatile ("movl %0, %%ss" : : "r" (3));
1642 }
1643
1644 {
1645 struct modify_ldt_ldt_s ldt;
1646 ldt.entry_number = 1;
1647 ldt.base_addr = (unsigned long)&seg_data1;
1648 ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12;
1649 ldt.seg_32bit = 1;
1650 ldt.contents = MODIFY_LDT_CONTENTS_DATA;
1651 ldt.read_exec_only = 0;
1652 ldt.limit_in_pages = 1;
1653 ldt.seg_not_present = 1;
1654 ldt.useable = 1;
1655 modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
1656
1657 if (setjmp(jmp_env) == 0) {
1658 /* segment not present */
1659 asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
1660 }
1661 }
1662 #endif
1663
1664 /* test SEGV reporting */
1665 printf("PF exception:\n");
1666 if (setjmp(jmp_env) == 0) {
1667 val = 1;
1668 /* we add a nop to test a weird PC retrieval case */
1669 asm volatile ("nop");
1670 /* now store in an invalid address */
1671 *(char *)0x1234 = 1;
1672 }
1673
1674 /* test SEGV reporting */
1675 printf("PF exception:\n");
1676 if (setjmp(jmp_env) == 0) {
1677 val = 1;
1678 /* read from an invalid address */
1679 v1 = *(char *)0x1234;
1680 }
1681
1682 /* test illegal instruction reporting */
1683 printf("UD2 exception:\n");
1684 if (setjmp(jmp_env) == 0) {
1685 /* now execute an invalid instruction */
1686 asm volatile("ud2");
1687 }
1688 printf("lock nop exception:\n");
1689 if (setjmp(jmp_env) == 0) {
1690 /* now execute an invalid instruction */
1691 asm volatile("lock nop");
1692 }
1693
1694 printf("INT exception:\n");
1695 if (setjmp(jmp_env) == 0) {
1696 asm volatile ("int $0xfd");
1697 }
1698 if (setjmp(jmp_env) == 0) {
1699 asm volatile ("int $0x01");
1700 }
1701 if (setjmp(jmp_env) == 0) {
1702 asm volatile (".byte 0xcd, 0x03");
1703 }
1704 if (setjmp(jmp_env) == 0) {
1705 asm volatile ("int $0x04");
1706 }
1707 if (setjmp(jmp_env) == 0) {
1708 asm volatile ("int $0x05");
1709 }
1710
1711 printf("INT3 exception:\n");
1712 if (setjmp(jmp_env) == 0) {
1713 asm volatile ("int3");
1714 }
1715
1716 printf("CLI exception:\n");
1717 if (setjmp(jmp_env) == 0) {
1718 asm volatile ("cli");
1719 }
1720
1721 printf("STI exception:\n");
1722 if (setjmp(jmp_env) == 0) {
1723 asm volatile ("cli");
1724 }
1725
1726 #if !defined(__x86_64__)
1727 printf("INTO exception:\n");
1728 if (setjmp(jmp_env) == 0) {
1729 /* overflow exception */
1730 asm volatile ("addl $1, %0 ; into" : : "r" (0x7fffffff));
1731 }
1732 #endif
1733
1734 printf("OUTB exception:\n");
1735 if (setjmp(jmp_env) == 0) {
1736 asm volatile ("outb %%al, %%dx" : : "d" (0x4321), "a" (0));
1737 }
1738
1739 printf("INB exception:\n");
1740 if (setjmp(jmp_env) == 0) {
1741 asm volatile ("inb %%dx, %%al" : "=a" (val) : "d" (0x4321));
1742 }
1743
1744 printf("REP OUTSB exception:\n");
1745 if (setjmp(jmp_env) == 0) {
1746 asm volatile ("rep outsb" : : "d" (0x4321), "S" (tab), "c" (1));
1747 }
1748
1749 printf("REP INSB exception:\n");
1750 if (setjmp(jmp_env) == 0) {
1751 asm volatile ("rep insb" : : "d" (0x4321), "D" (tab), "c" (1));
1752 }
1753
1754 printf("HLT exception:\n");
1755 if (setjmp(jmp_env) == 0) {
1756 asm volatile ("hlt");
1757 }
1758
1759 printf("single step exception:\n");
1760 val = 0;
1761 if (setjmp(jmp_env) == 0) {
1762 asm volatile ("pushf\n"
1763 "orl $0x00100, (%%esp)\n"
1764 "popf\n"
1765 "movl $0xabcd, %0\n"
1766 "movl $0x0, %0\n" : "=m" (val) : : "cc", "memory");
1767 }
1768 printf("val=0x%x\n", val);
1769 }
1770
1771 #if !defined(__x86_64__)
1772 /* specific precise single step test */
1773 void sig_trap_handler(int sig, siginfo_t *info, void *puc)
1774 {
1775 struct ucontext *uc = puc;
1776 printf("EIP=" FMTLX "\n", (long)uc->uc_mcontext.gregs[REG_EIP]);
1777 }
1778
1779 const uint8_t sstep_buf1[4] = { 1, 2, 3, 4};
1780 uint8_t sstep_buf2[4];
1781
1782 void test_single_step(void)
1783 {
1784 struct sigaction act;
1785 volatile int val;
1786 int i;
1787
1788 val = 0;
1789 act.sa_sigaction = sig_trap_handler;
1790 sigemptyset(&act.sa_mask);
1791 act.sa_flags = SA_SIGINFO;
1792 sigaction(SIGTRAP, &act, NULL);
1793 asm volatile ("pushf\n"
1794 "orl $0x00100, (%%esp)\n"
1795 "popf\n"
1796 "movl $0xabcd, %0\n"
1797
1798 /* jmp test */
1799 "movl $3, %%ecx\n"
1800 "1:\n"
1801 "addl $1, %0\n"
1802 "decl %%ecx\n"
1803 "jnz 1b\n"
1804
1805 /* movsb: the single step should stop at each movsb iteration */
1806 "movl $sstep_buf1, %%esi\n"
1807 "movl $sstep_buf2, %%edi\n"
1808 "movl $0, %%ecx\n"
1809 "rep movsb\n"
1810 "movl $3, %%ecx\n"
1811 "rep movsb\n"
1812 "movl $1, %%ecx\n"
1813 "rep movsb\n"
1814
1815 /* cmpsb: the single step should stop at each cmpsb iteration */
1816 "movl $sstep_buf1, %%esi\n"
1817 "movl $sstep_buf2, %%edi\n"
1818 "movl $0, %%ecx\n"
1819 "rep cmpsb\n"
1820 "movl $4, %%ecx\n"
1821 "rep cmpsb\n"
1822
1823 /* getpid() syscall: single step should skip one
1824 instruction */
1825 "movl $20, %%eax\n"
1826 "int $0x80\n"
1827 "movl $0, %%eax\n"
1828
1829 /* when modifying SS, trace is not done on the next
1830 instruction */
1831 "movl %%ss, %%ecx\n"
1832 "movl %%ecx, %%ss\n"
1833 "addl $1, %0\n"
1834 "movl $1, %%eax\n"
1835 "movl %%ecx, %%ss\n"
1836 "jmp 1f\n"
1837 "addl $1, %0\n"
1838 "1:\n"
1839 "movl $1, %%eax\n"
1840 "pushl %%ecx\n"
1841 "popl %%ss\n"
1842 "addl $1, %0\n"
1843 "movl $1, %%eax\n"
1844
1845 "pushf\n"
1846 "andl $~0x00100, (%%esp)\n"
1847 "popf\n"
1848 : "=m" (val)
1849 :
1850 : "cc", "memory", "eax", "ecx", "esi", "edi");
1851 printf("val=%d\n", val);
1852 for(i = 0; i < 4; i++)
1853 printf("sstep_buf2[%d] = %d\n", i, sstep_buf2[i]);
1854 }
1855
1856 /* self modifying code test */
1857 uint8_t code[] = {
1858 0xb8, 0x1, 0x00, 0x00, 0x00, /* movl $1, %eax */
1859 0xc3, /* ret */
1860 };
1861
1862 asm("smc_code2:\n"
1863 "movl 4(%esp), %eax\n"
1864 "movl %eax, smc_patch_addr2 + 1\n"
1865 "nop\n"
1866 "nop\n"
1867 "nop\n"
1868 "nop\n"
1869 "nop\n"
1870 "nop\n"
1871 "nop\n"
1872 "nop\n"
1873 "smc_patch_addr2:\n"
1874 "movl $1, %eax\n"
1875 "ret\n");
1876
1877 typedef int FuncType(void);
1878 extern int smc_code2(int);
1879 void test_self_modifying_code(void)
1880 {
1881 int i;
1882
1883 printf("self modifying code:\n");
1884 printf("func1 = 0x%x\n", ((FuncType *)code)());
1885 for(i = 2; i <= 4; i++) {
1886 code[1] = i;
1887 printf("func%d = 0x%x\n", i, ((FuncType *)code)());
1888 }
1889
1890 /* more difficult test : the modified code is just after the
1891 modifying instruction. It is forbidden in Intel specs, but it
1892 is used by old DOS programs */
1893 for(i = 2; i <= 4; i++) {
1894 printf("smc_code2(%d) = %d\n", i, smc_code2(i));
1895 }
1896 }
1897 #endif
1898
1899 long enter_stack[4096];
1900
1901 #if defined(__x86_64__)
1902 #define RSP "%%rsp"
1903 #define RBP "%%rbp"
1904 #else
1905 #define RSP "%%esp"
1906 #define RBP "%%ebp"
1907 #endif
1908
1909 #define TEST_ENTER(size, stack_type, level)\
1910 {\
1911 long esp_save, esp_val, ebp_val, ebp_save, i;\
1912 stack_type *ptr, *stack_end, *stack_ptr;\
1913 memset(enter_stack, 0, sizeof(enter_stack));\
1914 stack_end = stack_ptr = (stack_type *)(enter_stack + 4096);\
1915 ebp_val = (long)stack_ptr;\
1916 for(i=1;i<=32;i++)\
1917 *--stack_ptr = i;\
1918 esp_val = (long)stack_ptr;\
1919 asm("mov " RSP ", %[esp_save]\n"\
1920 "mov " RBP ", %[ebp_save]\n"\
1921 "mov %[esp_val], " RSP "\n"\
1922 "mov %[ebp_val], " RBP "\n"\
1923 "enter" size " $8, $" #level "\n"\
1924 "mov " RSP ", %[esp_val]\n"\
1925 "mov " RBP ", %[ebp_val]\n"\
1926 "mov %[esp_save], " RSP "\n"\
1927 "mov %[ebp_save], " RBP "\n"\
1928 : [esp_save] "=r" (esp_save),\
1929 [ebp_save] "=r" (ebp_save),\
1930 [esp_val] "=r" (esp_val),\
1931 [ebp_val] "=r" (ebp_val)\
1932 : "[esp_val]" (esp_val),\
1933 "[ebp_val]" (ebp_val));\
1934 printf("level=%d:\n", level);\
1935 printf("esp_val=" FMTLX "\n", esp_val - (long)stack_end);\
1936 printf("ebp_val=" FMTLX "\n", ebp_val - (long)stack_end);\
1937 for(ptr = (stack_type *)esp_val; ptr < stack_end; ptr++)\
1938 printf(FMTLX "\n", (long)ptr[0]);\
1939 }
1940
1941 static void test_enter(void)
1942 {
1943 #if defined(__x86_64__)
1944 TEST_ENTER("q", uint64_t, 0);
1945 TEST_ENTER("q", uint64_t, 1);
1946 TEST_ENTER("q", uint64_t, 2);
1947 TEST_ENTER("q", uint64_t, 31);
1948 #else
1949 TEST_ENTER("l", uint32_t, 0);
1950 TEST_ENTER("l", uint32_t, 1);
1951 TEST_ENTER("l", uint32_t, 2);
1952 TEST_ENTER("l", uint32_t, 31);
1953 #endif
1954
1955 TEST_ENTER("w", uint16_t, 0);
1956 TEST_ENTER("w", uint16_t, 1);
1957 TEST_ENTER("w", uint16_t, 2);
1958 TEST_ENTER("w", uint16_t, 31);
1959 }
1960
1961 #ifdef TEST_SSE
1962
1963 typedef int __m64 __attribute__ ((__mode__ (__V2SI__)));
1964 typedef int __m128 __attribute__ ((__mode__(__V4SF__)));
1965
1966 typedef union {
1967 double d[2];
1968 float s[4];
1969 uint32_t l[4];
1970 uint64_t q[2];
1971 __m128 dq;
1972 } XMMReg;
1973
1974 static uint64_t __attribute__((aligned(16))) test_values[4][2] = {
1975 { 0x456723c698694873, 0xdc515cff944a58ec },
1976 { 0x1f297ccd58bad7ab, 0x41f21efba9e3e146 },
1977 { 0x007c62c2085427f8, 0x231be9e8cde7438d },
1978 { 0x0f76255a085427f8, 0xc233e9e8c4c9439a },
1979 };
1980
1981 #define SSE_OP(op)\
1982 {\
1983 asm volatile (#op " %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
1984 printf("%-9s: a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X " r=" FMT64X "" FMT64X "\n",\
1985 #op,\
1986 a.q[1], a.q[0],\
1987 b.q[1], b.q[0],\
1988 r.q[1], r.q[0]);\
1989 }
1990
1991 #define SSE_OP2(op)\
1992 {\
1993 int i;\
1994 for(i=0;i<2;i++) {\
1995 a.q[0] = test_values[2*i][0];\
1996 a.q[1] = test_values[2*i][1];\
1997 b.q[0] = test_values[2*i+1][0];\
1998 b.q[1] = test_values[2*i+1][1];\
1999 SSE_OP(op);\
2000 }\
2001 }
2002
2003 #define MMX_OP2(op)\
2004 {\
2005 int i;\
2006 for(i=0;i<2;i++) {\
2007 a.q[0] = test_values[2*i][0];\
2008 b.q[0] = test_values[2*i+1][0];\
2009 asm volatile (#op " %2, %0" : "=y" (r.q[0]) : "0" (a.q[0]), "y" (b.q[0]));\
2010 printf("%-9s: a=" FMT64X " b=" FMT64X " r=" FMT64X "\n",\
2011 #op,\
2012 a.q[0],\
2013 b.q[0],\
2014 r.q[0]);\
2015 }\
2016 SSE_OP2(op);\
2017 }
2018
2019 #define SHUF_OP(op, ib)\
2020 {\
2021 a.q[0] = test_values[0][0];\
2022 a.q[1] = test_values[0][1];\
2023 b.q[0] = test_values[1][0];\
2024 b.q[1] = test_values[1][1];\
2025 asm volatile (#op " $" #ib ", %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
2026 printf("%-9s: a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X " ib=%02x r=" FMT64X "" FMT64X "\n",\
2027 #op,\
2028 a.q[1], a.q[0],\
2029 b.q[1], b.q[0],\
2030 ib,\
2031 r.q[1], r.q[0]);\
2032 }
2033
2034 #define PSHUF_OP(op, ib)\
2035 {\
2036 int i;\
2037 for(i=0;i<2;i++) {\
2038 a.q[0] = test_values[2*i][0];\
2039 a.q[1] = test_values[2*i][1];\
2040 asm volatile (#op " $" #ib ", %1, %0" : "=x" (r.dq) : "x" (a.dq));\
2041 printf("%-9s: a=" FMT64X "" FMT64X " ib=%02x r=" FMT64X "" FMT64X "\n",\
2042 #op,\
2043 a.q[1], a.q[0],\
2044 ib,\
2045 r.q[1], r.q[0]);\
2046 }\
2047 }
2048
2049 #define SHIFT_IM(op, ib)\
2050 {\
2051 int i;\
2052 for(i=0;i<2;i++) {\
2053 a.q[0] = test_values[2*i][0];\
2054 a.q[1] = test_values[2*i][1];\
2055 asm volatile (#op " $" #ib ", %0" : "=x" (r.dq) : "0" (a.dq));\
2056 printf("%-9s: a=" FMT64X "" FMT64X " ib=%02x r=" FMT64X "" FMT64X "\n",\
2057 #op,\
2058 a.q[1], a.q[0],\
2059 ib,\
2060 r.q[1], r.q[0]);\
2061 }\
2062 }
2063
2064 #define SHIFT_OP(op, ib)\
2065 {\
2066 int i;\
2067 SHIFT_IM(op, ib);\
2068 for(i=0;i<2;i++) {\
2069 a.q[0] = test_values[2*i][0];\
2070 a.q[1] = test_values[2*i][1];\
2071 b.q[0] = ib;\
2072 b.q[1] = 0;\
2073 asm volatile (#op " %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
2074 printf("%-9s: a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X " r=" FMT64X "" FMT64X "\n",\
2075 #op,\
2076 a.q[1], a.q[0],\
2077 b.q[1], b.q[0],\
2078 r.q[1], r.q[0]);\
2079 }\
2080 }
2081
2082 #define MOVMSK(op)\
2083 {\
2084 int i, reg;\
2085 for(i=0;i<2;i++) {\
2086 a.q[0] = test_values[2*i][0];\
2087 a.q[1] = test_values[2*i][1];\
2088 asm volatile (#op " %1, %0" : "=r" (reg) : "x" (a.dq));\
2089 printf("%-9s: a=" FMT64X "" FMT64X " r=%08x\n",\
2090 #op,\
2091 a.q[1], a.q[0],\
2092 reg);\
2093 }\
2094 }
2095
2096 #define SSE_OPS(a) \
2097 SSE_OP(a ## ps);\
2098 SSE_OP(a ## ss);
2099
2100 #define SSE_OPD(a) \
2101 SSE_OP(a ## pd);\
2102 SSE_OP(a ## sd);
2103
2104 #define SSE_COMI(op, field)\
2105 {\
2106 unsigned int eflags;\
2107 XMMReg a, b;\
2108 a.field[0] = a1;\
2109 b.field[0] = b1;\
2110 asm volatile (#op " %2, %1\n"\
2111 "pushf\n"\
2112 "pop %0\n"\
2113 : "=m" (eflags)\
2114 : "x" (a.dq), "x" (b.dq));\
2115 printf("%-9s: a=%f b=%f cc=%04x\n",\
2116 #op, a1, b1,\
2117 eflags & (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));\
2118 }
2119
2120 void test_sse_comi(double a1, double b1)
2121 {
2122 SSE_COMI(ucomiss, s);
2123 SSE_COMI(ucomisd, d);
2124 SSE_COMI(comiss, s);
2125 SSE_COMI(comisd, d);
2126 }
2127
2128 #define CVT_OP_XMM(op)\
2129 {\
2130 asm volatile (#op " %1, %0" : "=x" (r.dq) : "x" (a.dq));\
2131 printf("%-9s: a=" FMT64X "" FMT64X " r=" FMT64X "" FMT64X "\n",\
2132 #op,\
2133 a.q[1], a.q[0],\
2134 r.q[1], r.q[0]);\
2135 }
2136
2137 #define CVT_OP_XMM2MMX(op)\
2138 {\
2139 asm volatile (#op " %1, %0" : "=y" (r.q[0]) : "x" (a.dq));\
2140 printf("%-9s: a=" FMT64X "" FMT64X " r=" FMT64X "\n",\
2141 #op,\
2142 a.q[1], a.q[0],\
2143 r.q[0]);\
2144 }
2145
2146 #define CVT_OP_MMX2XMM(op)\
2147 {\
2148 asm volatile (#op " %1, %0" : "=x" (r.dq) : "y" (a.q[0]));\
2149 printf("%-9s: a=" FMT64X " r=" FMT64X "" FMT64X "\n",\
2150 #op,\
2151 a.q[0],\
2152 r.q[1], r.q[0]);\
2153 }
2154
2155 #define CVT_OP_REG2XMM(op)\
2156 {\
2157 asm volatile (#op " %1, %0" : "=x" (r.dq) : "r" (a.l[0]));\
2158 printf("%-9s: a=%08x r=" FMT64X "" FMT64X "\n",\
2159 #op,\
2160 a.l[0],\
2161 r.q[1], r.q[0]);\
2162 }
2163
2164 #define CVT_OP_XMM2REG(op)\
2165 {\
2166 asm volatile (#op " %1, %0" : "=r" (r.l[0]) : "x" (a.dq));\
2167 printf("%-9s: a=" FMT64X "" FMT64X " r=%08x\n",\
2168 #op,\
2169 a.q[1], a.q[0],\
2170 r.l[0]);\
2171 }
2172
2173 struct fpxstate {
2174 uint16_t fpuc;
2175 uint16_t fpus;
2176 uint16_t fptag;
2177 uint16_t fop;
2178 uint32_t fpuip;
2179 uint16_t cs_sel;
2180 uint16_t dummy0;
2181 uint32_t fpudp;
2182 uint16_t ds_sel;
2183 uint16_t dummy1;
2184 uint32_t mxcsr;
2185 uint32_t mxcsr_mask;
2186 uint8_t fpregs1[8 * 16];
2187 uint8_t xmm_regs[8 * 16];
2188 uint8_t dummy2[224];
2189 };
2190
2191 static struct fpxstate fpx_state __attribute__((aligned(16)));
2192 static struct fpxstate fpx_state2 __attribute__((aligned(16)));
2193
2194 void test_fxsave(void)
2195 {
2196 struct fpxstate *fp = &fpx_state;
2197 struct fpxstate *fp2 = &fpx_state2;
2198 int i, nb_xmm;
2199 XMMReg a, b;
2200 a.q[0] = test_values[0][0];
2201 a.q[1] = test_values[0][1];
2202 b.q[0] = test_values[1][0];
2203 b.q[1] = test_values[1][1];
2204
2205 asm("movdqa %2, %%xmm0\n"
2206 "movdqa %3, %%xmm7\n"
2207 #if defined(__x86_64__)
2208 "movdqa %2, %%xmm15\n"
2209 #endif
2210 " fld1\n"
2211 " fldpi\n"
2212 " fldln2\n"
2213 " fxsave %0\n"
2214 " fxrstor %0\n"
2215 " fxsave %1\n"
2216 " fninit\n"
2217 : "=m" (*(uint32_t *)fp2), "=m" (*(uint32_t *)fp)
2218 : "m" (a), "m" (b));
2219 printf("fpuc=%04x\n", fp->fpuc);
2220 printf("fpus=%04x\n", fp->fpus);
2221 printf("fptag=%04x\n", fp->fptag);
2222 for(i = 0; i < 3; i++) {
2223 printf("ST%d: " FMT64X " %04x\n",
2224 i,
2225 *(uint64_t *)&fp->fpregs1[i * 16],
2226 *(uint16_t *)&fp->fpregs1[i * 16 + 8]);
2227 }
2228 printf("mxcsr=%08x\n", fp->mxcsr & 0x1f80);
2229 #if defined(__x86_64__)
2230 nb_xmm = 16;
2231 #else
2232 nb_xmm = 8;
2233 #endif
2234 for(i = 0; i < nb_xmm; i++) {
2235 printf("xmm%d: " FMT64X "" FMT64X "\n",
2236 i,
2237 *(uint64_t *)&fp->xmm_regs[i * 16],
2238 *(uint64_t *)&fp->xmm_regs[i * 16 + 8]);
2239 }
2240 }
2241
2242 void test_sse(void)
2243 {
2244 XMMReg r, a, b;
2245 int i;
2246
2247 MMX_OP2(punpcklbw);
2248 MMX_OP2(punpcklwd);
2249 MMX_OP2(punpckldq);
2250 MMX_OP2(packsswb);
2251 MMX_OP2(pcmpgtb);
2252 MMX_OP2(pcmpgtw);
2253 MMX_OP2(pcmpgtd);
2254 MMX_OP2(packuswb);
2255 MMX_OP2(punpckhbw);
2256 MMX_OP2(punpckhwd);
2257 MMX_OP2(punpckhdq);
2258 MMX_OP2(packssdw);
2259 MMX_OP2(pcmpeqb);
2260 MMX_OP2(pcmpeqw);
2261 MMX_OP2(pcmpeqd);
2262
2263 MMX_OP2(paddq);
2264 MMX_OP2(pmullw);
2265 MMX_OP2(psubusb);
2266 MMX_OP2(psubusw);
2267 MMX_OP2(pminub);
2268 MMX_OP2(pand);
2269 MMX_OP2(paddusb);
2270 MMX_OP2(paddusw);
2271 MMX_OP2(pmaxub);
2272 MMX_OP2(pandn);
2273
2274 MMX_OP2(pmulhuw);
2275 MMX_OP2(pmulhw);
2276
2277 MMX_OP2(psubsb);
2278 MMX_OP2(psubsw);
2279 MMX_OP2(pminsw);
2280 MMX_OP2(por);
2281 MMX_OP2(paddsb);
2282 MMX_OP2(paddsw);
2283 MMX_OP2(pmaxsw);
2284 MMX_OP2(pxor);
2285 MMX_OP2(pmuludq);
2286 MMX_OP2(pmaddwd);
2287 MMX_OP2(psadbw);
2288 MMX_OP2(psubb);
2289 MMX_OP2(psubw);
2290 MMX_OP2(psubd);
2291 MMX_OP2(psubq);
2292 MMX_OP2(paddb);
2293 MMX_OP2(paddw);
2294 MMX_OP2(paddd);
2295
2296 MMX_OP2(pavgb);
2297 MMX_OP2(pavgw);
2298
2299 asm volatile ("pinsrw $1, %1, %0" : "=y" (r.q[0]) : "r" (0x12345678));
2300 printf("%-9s: r=" FMT64X "\n", "pinsrw", r.q[0]);
2301
2302 asm volatile ("pinsrw $5, %1, %0" : "=x" (r.dq) : "r" (0x12345678));
2303 printf("%-9s: r=" FMT64X "" FMT64X "\n", "pinsrw", r.q[1], r.q[0]);
2304
2305 a.q[0] = test_values[0][0];
2306 a.q[1] = test_values[0][1];
2307 asm volatile ("pextrw $1, %1, %0" : "=r" (r.l[0]) : "y" (a.q[0]));
2308 printf("%-9s: r=%08x\n", "pextrw", r.l[0]);
2309
2310 asm volatile ("pextrw $5, %1, %0" : "=r" (r.l[0]) : "x" (a.dq));
2311 printf("%-9s: r=%08x\n", "pextrw", r.l[0]);
2312
2313 asm volatile ("pmovmskb %1, %0" : "=r" (r.l[0]) : "y" (a.q[0]));
2314 printf("%-9s: r=%08x\n", "pmovmskb", r.l[0]);
2315
2316 asm volatile ("pmovmskb %1, %0" : "=r" (r.l[0]) : "x" (a.dq));
2317 printf("%-9s: r=%08x\n", "pmovmskb", r.l[0]);
2318
2319 {
2320 r.q[0] = -1;
2321 r.q[1] = -1;
2322
2323 a.q[0] = test_values[0][0];
2324 a.q[1] = test_values[0][1];
2325 b.q[0] = test_values[1][0];
2326 b.q[1] = test_values[1][1];
2327 asm volatile("maskmovq %1, %0" :
2328 : "y" (a.q[0]), "y" (b.q[0]), "D" (&r)
2329 : "memory");
2330 printf("%-9s: r=" FMT64X " a=" FMT64X " b=" FMT64X "\n",
2331 "maskmov",
2332 r.q[0],
2333 a.q[0],
2334 b.q[0]);
2335 asm volatile("maskmovdqu %1, %0" :
2336 : "x" (a.dq), "x" (b.dq), "D" (&r)
2337 : "memory");
2338 printf("%-9s: r=" FMT64X "" FMT64X " a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X "\n",
2339 "maskmov",
2340 r.q[1], r.q[0],
2341 a.q[1], a.q[0],
2342 b.q[1], b.q[0]);
2343 }
2344
2345 asm volatile ("emms");
2346
2347 SSE_OP2(punpcklqdq);
2348 SSE_OP2(punpckhqdq);
2349 SSE_OP2(andps);
2350 SSE_OP2(andpd);
2351 SSE_OP2(andnps);
2352 SSE_OP2(andnpd);
2353 SSE_OP2(orps);
2354 SSE_OP2(orpd);
2355 SSE_OP2(xorps);
2356 SSE_OP2(xorpd);
2357
2358 SSE_OP2(unpcklps);
2359 SSE_OP2(unpcklpd);
2360 SSE_OP2(unpckhps);
2361 SSE_OP2(unpckhpd);
2362
2363 SHUF_OP(shufps, 0x78);
2364 SHUF_OP(shufpd, 0x02);
2365
2366 PSHUF_OP(pshufd, 0x78);
2367 PSHUF_OP(pshuflw, 0x78);
2368 PSHUF_OP(pshufhw, 0x78);
2369
2370 SHIFT_OP(psrlw, 7);
2371 SHIFT_OP(psrlw, 16);
2372 SHIFT_OP(psraw, 7);
2373 SHIFT_OP(psraw, 16);
2374 SHIFT_OP(psllw, 7);
2375 SHIFT_OP(psllw, 16);
2376
2377 SHIFT_OP(psrld, 7);
2378 SHIFT_OP(psrld, 32);
2379 SHIFT_OP(psrad, 7);
2380 SHIFT_OP(psrad, 32);
2381 SHIFT_OP(pslld, 7);
2382 SHIFT_OP(pslld, 32);
2383
2384 SHIFT_OP(psrlq, 7);
2385 SHIFT_OP(psrlq, 32);
2386 SHIFT_OP(psllq, 7);
2387 SHIFT_OP(psllq, 32);
2388
2389 SHIFT_IM(psrldq, 16);
2390 SHIFT_IM(psrldq, 7);
2391 SHIFT_IM(pslldq, 16);
2392 SHIFT_IM(pslldq, 7);
2393
2394 MOVMSK(movmskps);
2395 MOVMSK(movmskpd);
2396
2397 /* FPU specific ops */
2398
2399 {
2400 uint32_t mxcsr;
2401 asm volatile("stmxcsr %0" : "=m" (mxcsr));
2402 printf("mxcsr=%08x\n", mxcsr & 0x1f80);
2403 asm volatile("ldmxcsr %0" : : "m" (mxcsr));
2404 }
2405
2406 test_sse_comi(2, -1);
2407 test_sse_comi(2, 2);
2408 test_sse_comi(2, 3);
2409 test_sse_comi(2, q_nan.d);
2410 test_sse_comi(q_nan.d, -1);
2411
2412 for(i = 0; i < 2; i++) {
2413 a.s[0] = 2.7;
2414 a.s[1] = 3.4;
2415 a.s[2] = 4;
2416 a.s[3] = -6.3;
2417 b.s[0] = 45.7;
2418 b.s[1] = 353.4;
2419 b.s[2] = 4;
2420 b.s[3] = 56.3;
2421 if (i == 1) {
2422 a.s[0] = q_nan.d;
2423 b.s[3] = q_nan.d;
2424 }
2425
2426 SSE_OPS(add);
2427 SSE_OPS(mul);
2428 SSE_OPS(sub);
2429 SSE_OPS(min);
2430 SSE_OPS(div);
2431 SSE_OPS(max);
2432 SSE_OPS(sqrt);
2433 SSE_OPS(cmpeq);
2434 SSE_OPS(cmplt);
2435 SSE_OPS(cmple);
2436 SSE_OPS(cmpunord);
2437 SSE_OPS(cmpneq);
2438 SSE_OPS(cmpnlt);
2439 SSE_OPS(cmpnle);
2440 SSE_OPS(cmpord);
2441
2442
2443 a.d[0] = 2.7;
2444 a.d[1] = -3.4;
2445 b.d[0] = 45.7;
2446 b.d[1] = -53.4;
2447 if (i == 1) {
2448 a.d[0] = q_nan.d;
2449 b.d[1] = q_nan.d;
2450 }
2451 SSE_OPD(add);
2452 SSE_OPD(mul);
2453 SSE_OPD(sub);
2454 SSE_OPD(min);
2455 SSE_OPD(div);
2456 SSE_OPD(max);
2457 SSE_OPD(sqrt);
2458 SSE_OPD(cmpeq);
2459 SSE_OPD(cmplt);
2460 SSE_OPD(cmple);
2461 SSE_OPD(cmpunord);
2462 SSE_OPD(cmpneq);
2463 SSE_OPD(cmpnlt);
2464 SSE_OPD(cmpnle);
2465 SSE_OPD(cmpord);
2466 }
2467
2468 /* float to float/int */
2469 a.s[0] = 2.7;
2470 a.s[1] = 3.4;
2471 a.s[2] = 4;
2472 a.s[3] = -6.3;
2473 CVT_OP_XMM(cvtps2pd);
2474 CVT_OP_XMM(cvtss2sd);
2475 CVT_OP_XMM2MMX(cvtps2pi);
2476 CVT_OP_XMM2MMX(cvttps2pi);
2477 CVT_OP_XMM2REG(cvtss2si);
2478 CVT_OP_XMM2REG(cvttss2si);
2479 CVT_OP_XMM(cvtps2dq);
2480 CVT_OP_XMM(cvttps2dq);
2481
2482 a.d[0] = 2.6;
2483 a.d[1] = -3.4;
2484 CVT_OP_XMM(cvtpd2ps);
2485 CVT_OP_XMM(cvtsd2ss);
2486 CVT_OP_XMM2MMX(cvtpd2pi);
2487 CVT_OP_XMM2MMX(cvttpd2pi);
2488 CVT_OP_XMM2REG(cvtsd2si);
2489 CVT_OP_XMM2REG(cvttsd2si);
2490 CVT_OP_XMM(cvtpd2dq);
2491 CVT_OP_XMM(cvttpd2dq);
2492
2493 /* int to float */
2494 a.l[0] = -6;
2495 a.l[1] = 2;
2496 a.l[2] = 100;
2497 a.l[3] = -60000;
2498 CVT_OP_MMX2XMM(cvtpi2ps);
2499 CVT_OP_MMX2XMM(cvtpi2pd);
2500 CVT_OP_REG2XMM(cvtsi2ss);
2501 CVT_OP_REG2XMM(cvtsi2sd);
2502 CVT_OP_XMM(cvtdq2ps);
2503 CVT_OP_XMM(cvtdq2pd);
2504
2505 /* XXX: test PNI insns */
2506 #if 0
2507 SSE_OP2(movshdup);
2508 #endif
2509 asm volatile ("emms");
2510 }
2511
2512 #endif
2513
2514 extern void *__start_initcall;
2515 extern void *__stop_initcall;
2516
2517
2518 int main(int argc, char **argv)
2519 {
2520 void **ptr;
2521 void (*func)(void);
2522
2523 ptr = &__start_initcall;
2524 while (ptr != &__stop_initcall) {
2525 func = *ptr++;
2526 func();
2527 }
2528 test_bsx();
2529 test_mul();
2530 test_jcc();
2531 test_floats();
2532 #if !defined(__x86_64__)
2533 test_bcd();
2534 #endif
2535 test_xchg();
2536 test_string();
2537 test_misc();
2538 test_lea();
2539 #ifdef TEST_SEGS
2540 test_segs();
2541 test_code16();
2542 #endif
2543 #ifdef TEST_VM86
2544 test_vm86();
2545 #endif
2546 test_exceptions();
2547 #if !defined(__x86_64__)
2548 test_self_modifying_code();
2549 test_single_step();
2550 #endif
2551 test_enter();
2552 #ifdef TEST_SSE
2553 test_sse();
2554 test_fxsave();
2555 #endif
2556 return 0;
2557 }
Stable branch of Qemu 0.9.1