better arm conditionnal execution implementation (Paul Brook)
[qemu/qemu_0_9_1_stable.git] / translate-all.c
blobe4f7c9c19eddfa2a84bc1c7022421b1fb1c1e6de
1 /*
2 * Host code generation
3 *
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <stdarg.h>
21 #include <stdlib.h>
22 #include <stdio.h>
23 #include <string.h>
24 #include <inttypes.h>
26 #include "config.h"
28 #define NO_CPU_IO_DEFS
29 #include "cpu.h"
30 #include "exec-all.h"
31 #include "disas.h"
33 extern int dyngen_code(uint8_t *gen_code_buf,
34 uint16_t *label_offsets, uint16_t *jmp_offsets,
35 const uint16_t *opc_buf, const uint32_t *opparam_buf, const long *gen_labels);
37 enum {
38 #define DEF(s, n, copy_size) INDEX_op_ ## s,
39 #include "opc.h"
40 #undef DEF
41 NB_OPS,
44 uint16_t gen_opc_buf[OPC_BUF_SIZE];
45 uint32_t gen_opparam_buf[OPPARAM_BUF_SIZE];
46 long gen_labels[OPC_BUF_SIZE];
47 int nb_gen_labels;
49 target_ulong gen_opc_pc[OPC_BUF_SIZE];
50 uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
51 #if defined(TARGET_I386)
52 uint8_t gen_opc_cc_op[OPC_BUF_SIZE];
53 #elif defined(TARGET_SPARC)
54 target_ulong gen_opc_npc[OPC_BUF_SIZE];
55 target_ulong gen_opc_jump_pc[2];
56 #endif
58 int code_copy_enabled = 1;
60 #ifdef DEBUG_DISAS
61 static const char *op_str[] = {
62 #define DEF(s, n, copy_size) #s,
63 #include "opc.h"
64 #undef DEF
67 static uint8_t op_nb_args[] = {
68 #define DEF(s, n, copy_size) n,
69 #include "opc.h"
70 #undef DEF
73 static const unsigned short opc_copy_size[] = {
74 #define DEF(s, n, copy_size) copy_size,
75 #include "opc.h"
76 #undef DEF
79 void dump_ops(const uint16_t *opc_buf, const uint32_t *opparam_buf)
81 const uint16_t *opc_ptr;
82 const uint32_t *opparam_ptr;
83 int c, n, i;
85 opc_ptr = opc_buf;
86 opparam_ptr = opparam_buf;
87 for(;;) {
88 c = *opc_ptr++;
89 n = op_nb_args[c];
90 fprintf(logfile, "0x%04x: %s",
91 (int)(opc_ptr - opc_buf - 1), op_str[c]);
92 for(i = 0; i < n; i++) {
93 fprintf(logfile, " 0x%x", opparam_ptr[i]);
95 fprintf(logfile, "\n");
96 if (c == INDEX_op_end)
97 break;
98 opparam_ptr += n;
102 #endif
104 /* compute label info */
105 static void dyngen_labels(long *gen_labels, int nb_gen_labels,
106 uint8_t *gen_code_buf, const uint16_t *opc_buf)
108 uint8_t *gen_code_ptr;
109 int c, i;
110 unsigned long gen_code_addr[OPC_BUF_SIZE];
112 if (nb_gen_labels == 0)
113 return;
114 /* compute the address of each op code */
116 gen_code_ptr = gen_code_buf;
117 i = 0;
118 for(;;) {
119 c = opc_buf[i];
120 gen_code_addr[i] =(unsigned long)gen_code_ptr;
121 if (c == INDEX_op_end)
122 break;
123 gen_code_ptr += opc_copy_size[c];
124 i++;
127 /* compute the address of each label */
128 for(i = 0; i < nb_gen_labels; i++) {
129 gen_labels[i] = gen_code_addr[gen_labels[i]];
133 /* return non zero if the very first instruction is invalid so that
134 the virtual CPU can trigger an exception.
136 '*gen_code_size_ptr' contains the size of the generated code (host
137 code).
139 int cpu_gen_code(CPUState *env, TranslationBlock *tb,
140 int max_code_size, int *gen_code_size_ptr)
142 uint8_t *gen_code_buf;
143 int gen_code_size;
145 #ifdef USE_CODE_COPY
146 if (code_copy_enabled &&
147 cpu_gen_code_copy(env, tb, max_code_size, &gen_code_size) == 0) {
148 /* nothing more to do */
149 } else
150 #endif
152 if (gen_intermediate_code(env, tb) < 0)
153 return -1;
155 /* generate machine code */
156 tb->tb_next_offset[0] = 0xffff;
157 tb->tb_next_offset[1] = 0xffff;
158 gen_code_buf = tb->tc_ptr;
159 #ifdef USE_DIRECT_JUMP
160 /* the following two entries are optional (only used for string ops) */
161 tb->tb_jmp_offset[2] = 0xffff;
162 tb->tb_jmp_offset[3] = 0xffff;
163 #endif
164 dyngen_labels(gen_labels, nb_gen_labels, gen_code_buf, gen_opc_buf);
166 gen_code_size = dyngen_code(gen_code_buf, tb->tb_next_offset,
167 #ifdef USE_DIRECT_JUMP
168 tb->tb_jmp_offset,
169 #else
170 NULL,
171 #endif
172 gen_opc_buf, gen_opparam_buf, gen_labels);
174 *gen_code_size_ptr = gen_code_size;
175 #ifdef DEBUG_DISAS
176 if (loglevel & CPU_LOG_TB_OUT_ASM) {
177 fprintf(logfile, "OUT: [size=%d]\n", *gen_code_size_ptr);
178 disas(logfile, tb->tc_ptr, *gen_code_size_ptr);
179 fprintf(logfile, "\n");
180 fflush(logfile);
182 #endif
183 return 0;
186 /* The cpu state corresponding to 'searched_pc' is restored.
188 int cpu_restore_state(TranslationBlock *tb,
189 CPUState *env, unsigned long searched_pc,
190 void *puc)
192 int j, c;
193 unsigned long tc_ptr;
194 uint16_t *opc_ptr;
196 #ifdef USE_CODE_COPY
197 if (tb->cflags & CF_CODE_COPY) {
198 return cpu_restore_state_copy(tb, env, searched_pc, puc);
200 #endif
201 if (gen_intermediate_code_pc(env, tb) < 0)
202 return -1;
204 /* find opc index corresponding to search_pc */
205 tc_ptr = (unsigned long)tb->tc_ptr;
206 if (searched_pc < tc_ptr)
207 return -1;
208 j = 0;
209 opc_ptr = gen_opc_buf;
210 for(;;) {
211 c = *opc_ptr;
212 if (c == INDEX_op_end)
213 return -1;
214 tc_ptr += opc_copy_size[c];
215 if (searched_pc < tc_ptr)
216 break;
217 opc_ptr++;
219 j = opc_ptr - gen_opc_buf;
220 /* now find start of instruction before */
221 while (gen_opc_instr_start[j] == 0)
222 j--;
223 #if defined(TARGET_I386)
225 int cc_op;
226 #ifdef DEBUG_DISAS
227 if (loglevel & CPU_LOG_TB_OP) {
228 int i;
229 fprintf(logfile, "RESTORE:\n");
230 for(i=0;i<=j; i++) {
231 if (gen_opc_instr_start[i]) {
232 fprintf(logfile, "0x%04x: " TARGET_FMT_lx "\n", i, gen_opc_pc[i]);
235 fprintf(logfile, "spc=0x%08lx j=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n",
236 searched_pc, j, gen_opc_pc[j] - tb->cs_base,
237 (uint32_t)tb->cs_base);
239 #endif
240 env->eip = gen_opc_pc[j] - tb->cs_base;
241 cc_op = gen_opc_cc_op[j];
242 if (cc_op != CC_OP_DYNAMIC)
243 env->cc_op = cc_op;
245 #elif defined(TARGET_ARM)
246 env->regs[15] = gen_opc_pc[j];
247 #elif defined(TARGET_SPARC)
249 target_ulong npc;
250 env->pc = gen_opc_pc[j];
251 npc = gen_opc_npc[j];
252 if (npc == 1) {
253 /* dynamic NPC: already stored */
254 } else if (npc == 2) {
255 target_ulong t2 = (target_ulong)puc;
256 /* jump PC: use T2 and the jump targets of the translation */
257 if (t2)
258 env->npc = gen_opc_jump_pc[0];
259 else
260 env->npc = gen_opc_jump_pc[1];
261 } else {
262 env->npc = npc;
265 #elif defined(TARGET_PPC)
267 int type;
268 /* for PPC, we need to look at the micro operation to get the
269 access type */
270 env->nip = gen_opc_pc[j];
271 switch(c) {
272 #if defined(CONFIG_USER_ONLY)
273 #define CASE3(op)\
274 case INDEX_op_ ## op ## _raw
275 #else
276 #define CASE3(op)\
277 case INDEX_op_ ## op ## _user:\
278 case INDEX_op_ ## op ## _kernel
279 #endif
281 CASE3(stfd):
282 CASE3(stfs):
283 CASE3(lfd):
284 CASE3(lfs):
285 type = ACCESS_FLOAT;
286 break;
287 CASE3(lwarx):
288 type = ACCESS_RES;
289 break;
290 CASE3(stwcx):
291 type = ACCESS_RES;
292 break;
293 CASE3(eciwx):
294 CASE3(ecowx):
295 type = ACCESS_EXT;
296 break;
297 default:
298 type = ACCESS_INT;
299 break;
301 env->access_type = type;
303 #endif
304 return 0;