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CPU specific boot mode (Robert Reif)
[qemu/qemu_0_9_1_stable.git] / linux-user / main.c
blob6fe51107c2cf68b27e5a93339cf1565f28e3f394
1 /*
2 * qemu user main
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20 #include <stdlib.h>
21 #include <stdio.h>
22 #include <stdarg.h>
23 #include <string.h>
24 #include <errno.h>
25 #include <unistd.h>
26
27 #include "qemu.h"
28
29 #define DEBUG_LOGFILE "/tmp/qemu.log"
30
31 #ifdef __APPLE__
32 #include <crt_externs.h>
33 # define environ (*_NSGetEnviron())
34 #endif
35
36 static const char *interp_prefix = CONFIG_QEMU_PREFIX;
37 const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
38
39 #if defined(__i386__) && !defined(CONFIG_STATIC)
40 /* Force usage of an ELF interpreter even if it is an ELF shared
41 object ! */
42 const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
43 #endif
44
45 /* for recent libc, we add these dummy symbols which are not declared
46 when generating a linked object (bug in ld ?) */
47 #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
48 long __preinit_array_start[0];
49 long __preinit_array_end[0];
50 long __init_array_start[0];
51 long __init_array_end[0];
52 long __fini_array_start[0];
53 long __fini_array_end[0];
54 #endif
55
56 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
57 we allocate a bigger stack. Need a better solution, for example
58 by remapping the process stack directly at the right place */
59 unsigned long x86_stack_size = 512 * 1024;
60
61 void gemu_log(const char *fmt, ...)
62 {
63 va_list ap;
64
65 va_start(ap, fmt);
66 vfprintf(stderr, fmt, ap);
67 va_end(ap);
68 }
69
70 void cpu_outb(CPUState *env, int addr, int val)
71 {
72 fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
73 }
74
75 void cpu_outw(CPUState *env, int addr, int val)
76 {
77 fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
78 }
79
80 void cpu_outl(CPUState *env, int addr, int val)
81 {
82 fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
83 }
84
85 int cpu_inb(CPUState *env, int addr)
86 {
87 fprintf(stderr, "inb: port=0x%04x\n", addr);
88 return 0;
89 }
90
91 int cpu_inw(CPUState *env, int addr)
92 {
93 fprintf(stderr, "inw: port=0x%04x\n", addr);
94 return 0;
95 }
96
97 int cpu_inl(CPUState *env, int addr)
98 {
99 fprintf(stderr, "inl: port=0x%04x\n", addr);
100 return 0;
101 }
102
103 int cpu_get_pic_interrupt(CPUState *env)
104 {
105 return -1;
106 }
107
108 /* timers for rdtsc */
109
110 #if 0
111
112 static uint64_t emu_time;
113
114 int64_t cpu_get_real_ticks(void)
115 {
116 return emu_time++;
117 }
118
119 #endif
120
121 #ifdef TARGET_I386
122 /***********************************************************/
123 /* CPUX86 core interface */
124
125 void cpu_smm_update(CPUState *env)
126 {
127 }
128
129 uint64_t cpu_get_tsc(CPUX86State *env)
130 {
131 return cpu_get_real_ticks();
132 }
133
134 static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
135 int flags)
136 {
137 unsigned int e1, e2;
138 uint32_t *p;
139 e1 = (addr << 16) | (limit & 0xffff);
140 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
141 e2 |= flags;
142 p = ptr;
143 p[0] = tswapl(e1);
144 p[1] = tswapl(e2);
145 }
146
147 static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
148 unsigned long addr, unsigned int sel)
149 {
150 unsigned int e1, e2;
151 uint32_t *p;
152 e1 = (addr & 0xffff) | (sel << 16);
153 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
154 p = ptr;
155 p[0] = tswapl(e1);
156 p[1] = tswapl(e2);
157 }
158
159 uint64_t gdt_table[6];
160 uint64_t idt_table[256];
161
162 /* only dpl matters as we do only user space emulation */
163 static void set_idt(int n, unsigned int dpl)
164 {
165 set_gate(idt_table + n, 0, dpl, 0, 0);
166 }
167
168 void cpu_loop(CPUX86State *env)
169 {
170 int trapnr;
171 abi_ulong pc;
172 target_siginfo_t info;
173
174 for(;;) {
175 trapnr = cpu_x86_exec(env);
176 switch(trapnr) {
177 case 0x80:
178 /* linux syscall */
179 env->regs[R_EAX] = do_syscall(env,
180 env->regs[R_EAX],
181 env->regs[R_EBX],
182 env->regs[R_ECX],
183 env->regs[R_EDX],
184 env->regs[R_ESI],
185 env->regs[R_EDI],
186 env->regs[R_EBP]);
187 break;
188 case EXCP0B_NOSEG:
189 case EXCP0C_STACK:
190 info.si_signo = SIGBUS;
191 info.si_errno = 0;
192 info.si_code = TARGET_SI_KERNEL;
193 info._sifields._sigfault._addr = 0;
194 queue_signal(info.si_signo, &info);
195 break;
196 case EXCP0D_GPF:
197 #ifndef TARGET_X86_64
198 if (env->eflags & VM_MASK) {
199 handle_vm86_fault(env);
200 } else
201 #endif
202 {
203 info.si_signo = SIGSEGV;
204 info.si_errno = 0;
205 info.si_code = TARGET_SI_KERNEL;
206 info._sifields._sigfault._addr = 0;
207 queue_signal(info.si_signo, &info);
208 }
209 break;
210 case EXCP0E_PAGE:
211 info.si_signo = SIGSEGV;
212 info.si_errno = 0;
213 if (!(env->error_code & 1))
214 info.si_code = TARGET_SEGV_MAPERR;
215 else
216 info.si_code = TARGET_SEGV_ACCERR;
217 info._sifields._sigfault._addr = env->cr[2];
218 queue_signal(info.si_signo, &info);
219 break;
220 case EXCP00_DIVZ:
221 #ifndef TARGET_X86_64
222 if (env->eflags & VM_MASK) {
223 handle_vm86_trap(env, trapnr);
224 } else
225 #endif
226 {
227 /* division by zero */
228 info.si_signo = SIGFPE;
229 info.si_errno = 0;
230 info.si_code = TARGET_FPE_INTDIV;
231 info._sifields._sigfault._addr = env->eip;
232 queue_signal(info.si_signo, &info);
233 }
234 break;
235 case EXCP01_SSTP:
236 case EXCP03_INT3:
237 #ifndef TARGET_X86_64
238 if (env->eflags & VM_MASK) {
239 handle_vm86_trap(env, trapnr);
240 } else
241 #endif
242 {
243 info.si_signo = SIGTRAP;
244 info.si_errno = 0;
245 if (trapnr == EXCP01_SSTP) {
246 info.si_code = TARGET_TRAP_BRKPT;
247 info._sifields._sigfault._addr = env->eip;
248 } else {
249 info.si_code = TARGET_SI_KERNEL;
250 info._sifields._sigfault._addr = 0;
251 }
252 queue_signal(info.si_signo, &info);
253 }
254 break;
255 case EXCP04_INTO:
256 case EXCP05_BOUND:
257 #ifndef TARGET_X86_64
258 if (env->eflags & VM_MASK) {
259 handle_vm86_trap(env, trapnr);
260 } else
261 #endif
262 {
263 info.si_signo = SIGSEGV;
264 info.si_errno = 0;
265 info.si_code = TARGET_SI_KERNEL;
266 info._sifields._sigfault._addr = 0;
267 queue_signal(info.si_signo, &info);
268 }
269 break;
270 case EXCP06_ILLOP:
271 info.si_signo = SIGILL;
272 info.si_errno = 0;
273 info.si_code = TARGET_ILL_ILLOPN;
274 info._sifields._sigfault._addr = env->eip;
275 queue_signal(info.si_signo, &info);
276 break;
277 case EXCP_INTERRUPT:
278 /* just indicate that signals should be handled asap */
279 break;
280 case EXCP_DEBUG:
281 {
282 int sig;
283
284 sig = gdb_handlesig (env, TARGET_SIGTRAP);
285 if (sig)
286 {
287 info.si_signo = sig;
288 info.si_errno = 0;
289 info.si_code = TARGET_TRAP_BRKPT;
290 queue_signal(info.si_signo, &info);
291 }
292 }
293 break;
294 default:
295 pc = env->segs[R_CS].base + env->eip;
296 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
297 (long)pc, trapnr);
298 abort();
299 }
300 process_pending_signals(env);
301 }
302 }
303 #endif
304
305 #ifdef TARGET_ARM
306
307 /* XXX: find a better solution */
308 extern void tb_invalidate_page_range(abi_ulong start, abi_ulong end);
309
310 static void arm_cache_flush(abi_ulong start, abi_ulong last)
311 {
312 abi_ulong addr, last1;
313
314 if (last < start)
315 return;
316 addr = start;
317 for(;;) {
318 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
319 if (last1 > last)
320 last1 = last;
321 tb_invalidate_page_range(addr, last1 + 1);
322 if (last1 == last)
323 break;
324 addr = last1 + 1;
325 }
326 }
327
328 void cpu_loop(CPUARMState *env)
329 {
330 int trapnr;
331 unsigned int n, insn;
332 target_siginfo_t info;
333 uint32_t addr;
334
335 for(;;) {
336 trapnr = cpu_arm_exec(env);
337 switch(trapnr) {
338 case EXCP_UDEF:
339 {
340 TaskState *ts = env->opaque;
341 uint32_t opcode;
342
343 /* we handle the FPU emulation here, as Linux */
344 /* we get the opcode */
345 opcode = tget32(env->regs[15]);
346
347 if (EmulateAll(opcode, &ts->fpa, env) == 0) {
348 info.si_signo = SIGILL;
349 info.si_errno = 0;
350 info.si_code = TARGET_ILL_ILLOPN;
351 info._sifields._sigfault._addr = env->regs[15];
352 queue_signal(info.si_signo, &info);
353 } else {
354 /* increment PC */
355 env->regs[15] += 4;
356 }
357 }
358 break;
359 case EXCP_SWI:
360 case EXCP_BKPT:
361 {
362 env->eabi = 1;
363 /* system call */
364 if (trapnr == EXCP_BKPT) {
365 if (env->thumb) {
366 insn = tget16(env->regs[15]);
367 n = insn & 0xff;
368 env->regs[15] += 2;
369 } else {
370 insn = tget32(env->regs[15]);
371 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
372 env->regs[15] += 4;
373 }
374 } else {
375 if (env->thumb) {
376 insn = tget16(env->regs[15] - 2);
377 n = insn & 0xff;
378 } else {
379 insn = tget32(env->regs[15] - 4);
380 n = insn & 0xffffff;
381 }
382 }
383
384 if (n == ARM_NR_cacheflush) {
385 arm_cache_flush(env->regs[0], env->regs[1]);
386 } else if (n == ARM_NR_semihosting
387 || n == ARM_NR_thumb_semihosting) {
388 env->regs[0] = do_arm_semihosting (env);
389 } else if (n == 0 || n >= ARM_SYSCALL_BASE
390 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
391 /* linux syscall */
392 if (env->thumb || n == 0) {
393 n = env->regs[7];
394 } else {
395 n -= ARM_SYSCALL_BASE;
396 env->eabi = 0;
397 }
398 env->regs[0] = do_syscall(env,
399 n,
400 env->regs[0],
401 env->regs[1],
402 env->regs[2],
403 env->regs[3],
404 env->regs[4],
405 env->regs[5]);
406 } else {
407 goto error;
408 }
409 }
410 break;
411 case EXCP_INTERRUPT:
412 /* just indicate that signals should be handled asap */
413 break;
414 case EXCP_PREFETCH_ABORT:
415 addr = env->cp15.c6_data;
416 goto do_segv;
417 case EXCP_DATA_ABORT:
418 addr = env->cp15.c6_insn;
419 goto do_segv;
420 do_segv:
421 {
422 info.si_signo = SIGSEGV;
423 info.si_errno = 0;
424 /* XXX: check env->error_code */
425 info.si_code = TARGET_SEGV_MAPERR;
426 info._sifields._sigfault._addr = addr;
427 queue_signal(info.si_signo, &info);
428 }
429 break;
430 case EXCP_DEBUG:
431 {
432 int sig;
433
434 sig = gdb_handlesig (env, TARGET_SIGTRAP);
435 if (sig)
436 {
437 info.si_signo = sig;
438 info.si_errno = 0;
439 info.si_code = TARGET_TRAP_BRKPT;
440 queue_signal(info.si_signo, &info);
441 }
442 }
443 break;
444 default:
445 error:
446 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
447 trapnr);
448 cpu_dump_state(env, stderr, fprintf, 0);
449 abort();
450 }
451 process_pending_signals(env);
452 }
453 }
454
455 #endif
456
457 #ifdef TARGET_SPARC
458
459 //#define DEBUG_WIN
460
461 /* WARNING: dealing with register windows _is_ complicated. More info
462 can be found at http://www.sics.se/~psm/sparcstack.html */
463 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
464 {
465 index = (index + cwp * 16) & (16 * NWINDOWS - 1);
466 /* wrap handling : if cwp is on the last window, then we use the
467 registers 'after' the end */
468 if (index < 8 && env->cwp == (NWINDOWS - 1))
469 index += (16 * NWINDOWS);
470 return index;
471 }
472
473 /* save the register window 'cwp1' */
474 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
475 {
476 unsigned int i;
477 abi_ulong sp_ptr;
478
479 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
480 #if defined(DEBUG_WIN)
481 printf("win_overflow: sp_ptr=0x%x save_cwp=%d\n",
482 (int)sp_ptr, cwp1);
483 #endif
484 for(i = 0; i < 16; i++) {
485 tputl(sp_ptr, env->regbase[get_reg_index(env, cwp1, 8 + i)]);
486 sp_ptr += sizeof(abi_ulong);
487 }
488 }
489
490 static void save_window(CPUSPARCState *env)
491 {
492 #ifndef TARGET_SPARC64
493 unsigned int new_wim;
494 new_wim = ((env->wim >> 1) | (env->wim << (NWINDOWS - 1))) &
495 ((1LL << NWINDOWS) - 1);
496 save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1));
497 env->wim = new_wim;
498 #else
499 save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1));
500 env->cansave++;
501 env->canrestore--;
502 #endif
503 }
504
505 static void restore_window(CPUSPARCState *env)
506 {
507 unsigned int new_wim, i, cwp1;
508 abi_ulong sp_ptr;
509
510 new_wim = ((env->wim << 1) | (env->wim >> (NWINDOWS - 1))) &
511 ((1LL << NWINDOWS) - 1);
512
513 /* restore the invalid window */
514 cwp1 = (env->cwp + 1) & (NWINDOWS - 1);
515 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
516 #if defined(DEBUG_WIN)
517 printf("win_underflow: sp_ptr=0x%x load_cwp=%d\n",
518 (int)sp_ptr, cwp1);
519 #endif
520 for(i = 0; i < 16; i++) {
521 env->regbase[get_reg_index(env, cwp1, 8 + i)] = tgetl(sp_ptr);
522 sp_ptr += sizeof(abi_ulong);
523 }
524 env->wim = new_wim;
525 #ifdef TARGET_SPARC64
526 env->canrestore++;
527 if (env->cleanwin < NWINDOWS - 1)
528 env->cleanwin++;
529 env->cansave--;
530 #endif
531 }
532
533 static void flush_windows(CPUSPARCState *env)
534 {
535 int offset, cwp1;
536
537 offset = 1;
538 for(;;) {
539 /* if restore would invoke restore_window(), then we can stop */
540 cwp1 = (env->cwp + offset) & (NWINDOWS - 1);
541 if (env->wim & (1 << cwp1))
542 break;
543 save_window_offset(env, cwp1);
544 offset++;
545 }
546 /* set wim so that restore will reload the registers */
547 cwp1 = (env->cwp + 1) & (NWINDOWS - 1);
548 env->wim = 1 << cwp1;
549 #if defined(DEBUG_WIN)
550 printf("flush_windows: nb=%d\n", offset - 1);
551 #endif
552 }
553
554 void cpu_loop (CPUSPARCState *env)
555 {
556 int trapnr, ret;
557 target_siginfo_t info;
558
559 while (1) {
560 trapnr = cpu_sparc_exec (env);
561
562 switch (trapnr) {
563 #ifndef TARGET_SPARC64
564 case 0x88:
565 case 0x90:
566 #else
567 case 0x110:
568 case 0x16d:
569 #endif
570 ret = do_syscall (env, env->gregs[1],
571 env->regwptr[0], env->regwptr[1],
572 env->regwptr[2], env->regwptr[3],
573 env->regwptr[4], env->regwptr[5]);
574 if ((unsigned int)ret >= (unsigned int)(-515)) {
575 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
576 env->xcc |= PSR_CARRY;
577 #else
578 env->psr |= PSR_CARRY;
579 #endif
580 ret = -ret;
581 } else {
582 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
583 env->xcc &= ~PSR_CARRY;
584 #else
585 env->psr &= ~PSR_CARRY;
586 #endif
587 }
588 env->regwptr[0] = ret;
589 /* next instruction */
590 env->pc = env->npc;
591 env->npc = env->npc + 4;
592 break;
593 case 0x83: /* flush windows */
594 #ifdef TARGET_ABI32
595 case 0x103:
596 #endif
597 flush_windows(env);
598 /* next instruction */
599 env->pc = env->npc;
600 env->npc = env->npc + 4;
601 break;
602 #ifndef TARGET_SPARC64
603 case TT_WIN_OVF: /* window overflow */
604 save_window(env);
605 break;
606 case TT_WIN_UNF: /* window underflow */
607 restore_window(env);
608 break;
609 case TT_TFAULT:
610 case TT_DFAULT:
611 {
612 info.si_signo = SIGSEGV;
613 info.si_errno = 0;
614 /* XXX: check env->error_code */
615 info.si_code = TARGET_SEGV_MAPERR;
616 info._sifields._sigfault._addr = env->mmuregs[4];
617 queue_signal(info.si_signo, &info);
618 }
619 break;
620 #else
621 case TT_SPILL: /* window overflow */
622 save_window(env);
623 break;
624 case TT_FILL: /* window underflow */
625 restore_window(env);
626 break;
627 case TT_TFAULT:
628 case TT_DFAULT:
629 {
630 info.si_signo = SIGSEGV;
631 info.si_errno = 0;
632 /* XXX: check env->error_code */
633 info.si_code = TARGET_SEGV_MAPERR;
634 if (trapnr == TT_DFAULT)
635 info._sifields._sigfault._addr = env->dmmuregs[4];
636 else
637 info._sifields._sigfault._addr = env->tpc[env->tl];
638 queue_signal(info.si_signo, &info);
639 }
640 break;
641 case 0x16e:
642 flush_windows(env);
643 sparc64_get_context(env);
644 break;
645 case 0x16f:
646 flush_windows(env);
647 sparc64_set_context(env);
648 break;
649 #endif
650 case EXCP_INTERRUPT:
651 /* just indicate that signals should be handled asap */
652 break;
653 case EXCP_DEBUG:
654 {
655 int sig;
656
657 sig = gdb_handlesig (env, TARGET_SIGTRAP);
658 if (sig)
659 {
660 info.si_signo = sig;
661 info.si_errno = 0;
662 info.si_code = TARGET_TRAP_BRKPT;
663 queue_signal(info.si_signo, &info);
664 }
665 }
666 break;
667 default:
668 printf ("Unhandled trap: 0x%x\n", trapnr);
669 cpu_dump_state(env, stderr, fprintf, 0);
670 exit (1);
671 }
672 process_pending_signals (env);
673 }
674 }
675
676 #endif
677
678 #ifdef TARGET_PPC
679 static inline uint64_t cpu_ppc_get_tb (CPUState *env)
680 {
681 /* TO FIX */
682 return 0;
683 }
684
685 uint32_t cpu_ppc_load_tbl (CPUState *env)
686 {
687 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
688 }
689
690 uint32_t cpu_ppc_load_tbu (CPUState *env)
691 {
692 return cpu_ppc_get_tb(env) >> 32;
693 }
694
695 uint32_t cpu_ppc_load_atbl (CPUState *env)
696 {
697 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
698 }
699
700 uint32_t cpu_ppc_load_atbu (CPUState *env)
701 {
702 return cpu_ppc_get_tb(env) >> 32;
703 }
704
705 uint32_t cpu_ppc601_load_rtcu (CPUState *env)
706 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
707
708 uint32_t cpu_ppc601_load_rtcl (CPUState *env)
709 {
710 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
711 }
712
713 /* XXX: to be fixed */
714 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)
715 {
716 return -1;
717 }
718
719 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
720 {
721 return -1;
722 }
723
724 #define EXCP_DUMP(env, fmt, args...) \
725 do { \
726 fprintf(stderr, fmt , ##args); \
727 cpu_dump_state(env, stderr, fprintf, 0); \
728 if (loglevel != 0) { \
729 fprintf(logfile, fmt , ##args); \
730 cpu_dump_state(env, logfile, fprintf, 0); \
731 } \
732 } while (0)
733
734 void cpu_loop(CPUPPCState *env)
735 {
736 target_siginfo_t info;
737 int trapnr;
738 uint32_t ret;
739
740 for(;;) {
741 trapnr = cpu_ppc_exec(env);
742 switch(trapnr) {
743 case POWERPC_EXCP_NONE:
744 /* Just go on */
745 break;
746 case POWERPC_EXCP_CRITICAL: /* Critical input */
747 cpu_abort(env, "Critical interrupt while in user mode. "
748 "Aborting\n");
749 break;
750 case POWERPC_EXCP_MCHECK: /* Machine check exception */
751 cpu_abort(env, "Machine check exception while in user mode. "
752 "Aborting\n");
753 break;
754 case POWERPC_EXCP_DSI: /* Data storage exception */
755 EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n",
756 env->spr[SPR_DAR]);
757 /* XXX: check this. Seems bugged */
758 switch (env->error_code & 0xFF000000) {
759 case 0x40000000:
760 info.si_signo = TARGET_SIGSEGV;
761 info.si_errno = 0;
762 info.si_code = TARGET_SEGV_MAPERR;
763 break;
764 case 0x04000000:
765 info.si_signo = TARGET_SIGILL;
766 info.si_errno = 0;
767 info.si_code = TARGET_ILL_ILLADR;
768 break;
769 case 0x08000000:
770 info.si_signo = TARGET_SIGSEGV;
771 info.si_errno = 0;
772 info.si_code = TARGET_SEGV_ACCERR;
773 break;
774 default:
775 /* Let's send a regular segfault... */
776 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
777 env->error_code);
778 info.si_signo = TARGET_SIGSEGV;
779 info.si_errno = 0;
780 info.si_code = TARGET_SEGV_MAPERR;
781 break;
782 }
783 info._sifields._sigfault._addr = env->nip;
784 queue_signal(info.si_signo, &info);
785 break;
786 case POWERPC_EXCP_ISI: /* Instruction storage exception */
787 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n",
788 env->spr[SPR_SRR0]);
789 /* XXX: check this */
790 switch (env->error_code & 0xFF000000) {
791 case 0x40000000:
792 info.si_signo = TARGET_SIGSEGV;
793 info.si_errno = 0;
794 info.si_code = TARGET_SEGV_MAPERR;
795 break;
796 case 0x10000000:
797 case 0x08000000:
798 info.si_signo = TARGET_SIGSEGV;
799 info.si_errno = 0;
800 info.si_code = TARGET_SEGV_ACCERR;
801 break;
802 default:
803 /* Let's send a regular segfault... */
804 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
805 env->error_code);
806 info.si_signo = TARGET_SIGSEGV;
807 info.si_errno = 0;
808 info.si_code = TARGET_SEGV_MAPERR;
809 break;
810 }
811 info._sifields._sigfault._addr = env->nip - 4;
812 queue_signal(info.si_signo, &info);
813 break;
814 case POWERPC_EXCP_EXTERNAL: /* External input */
815 cpu_abort(env, "External interrupt while in user mode. "
816 "Aborting\n");
817 break;
818 case POWERPC_EXCP_ALIGN: /* Alignment exception */
819 EXCP_DUMP(env, "Unaligned memory access\n");
820 /* XXX: check this */
821 info.si_signo = TARGET_SIGBUS;
822 info.si_errno = 0;
823 info.si_code = TARGET_BUS_ADRALN;
824 info._sifields._sigfault._addr = env->nip - 4;
825 queue_signal(info.si_signo, &info);
826 break;
827 case POWERPC_EXCP_PROGRAM: /* Program exception */
828 /* XXX: check this */
829 switch (env->error_code & ~0xF) {
830 case POWERPC_EXCP_FP:
831 EXCP_DUMP(env, "Floating point program exception\n");
832 info.si_signo = TARGET_SIGFPE;
833 info.si_errno = 0;
834 switch (env->error_code & 0xF) {
835 case POWERPC_EXCP_FP_OX:
836 info.si_code = TARGET_FPE_FLTOVF;
837 break;
838 case POWERPC_EXCP_FP_UX:
839 info.si_code = TARGET_FPE_FLTUND;
840 break;
841 case POWERPC_EXCP_FP_ZX:
842 case POWERPC_EXCP_FP_VXZDZ:
843 info.si_code = TARGET_FPE_FLTDIV;
844 break;
845 case POWERPC_EXCP_FP_XX:
846 info.si_code = TARGET_FPE_FLTRES;
847 break;
848 case POWERPC_EXCP_FP_VXSOFT:
849 info.si_code = TARGET_FPE_FLTINV;
850 break;
851 case POWERPC_EXCP_FP_VXSNAN:
852 case POWERPC_EXCP_FP_VXISI:
853 case POWERPC_EXCP_FP_VXIDI:
854 case POWERPC_EXCP_FP_VXIMZ:
855 case POWERPC_EXCP_FP_VXVC:
856 case POWERPC_EXCP_FP_VXSQRT:
857 case POWERPC_EXCP_FP_VXCVI:
858 info.si_code = TARGET_FPE_FLTSUB;
859 break;
860 default:
861 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
862 env->error_code);
863 break;
864 }
865 break;
866 case POWERPC_EXCP_INVAL:
867 EXCP_DUMP(env, "Invalid instruction\n");
868 info.si_signo = TARGET_SIGILL;
869 info.si_errno = 0;
870 switch (env->error_code & 0xF) {
871 case POWERPC_EXCP_INVAL_INVAL:
872 info.si_code = TARGET_ILL_ILLOPC;
873 break;
874 case POWERPC_EXCP_INVAL_LSWX:
875 info.si_code = TARGET_ILL_ILLOPN;
876 break;
877 case POWERPC_EXCP_INVAL_SPR:
878 info.si_code = TARGET_ILL_PRVREG;
879 break;
880 case POWERPC_EXCP_INVAL_FP:
881 info.si_code = TARGET_ILL_COPROC;
882 break;
883 default:
884 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
885 env->error_code & 0xF);
886 info.si_code = TARGET_ILL_ILLADR;
887 break;
888 }
889 break;
890 case POWERPC_EXCP_PRIV:
891 EXCP_DUMP(env, "Privilege violation\n");
892 info.si_signo = TARGET_SIGILL;
893 info.si_errno = 0;
894 switch (env->error_code & 0xF) {
895 case POWERPC_EXCP_PRIV_OPC:
896 info.si_code = TARGET_ILL_PRVOPC;
897 break;
898 case POWERPC_EXCP_PRIV_REG:
899 info.si_code = TARGET_ILL_PRVREG;
900 break;
901 default:
902 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
903 env->error_code & 0xF);
904 info.si_code = TARGET_ILL_PRVOPC;
905 break;
906 }
907 break;
908 case POWERPC_EXCP_TRAP:
909 cpu_abort(env, "Tried to call a TRAP\n");
910 break;
911 default:
912 /* Should not happen ! */
913 cpu_abort(env, "Unknown program exception (%02x)\n",
914 env->error_code);
915 break;
916 }
917 info._sifields._sigfault._addr = env->nip - 4;
918 queue_signal(info.si_signo, &info);
919 break;
920 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
921 EXCP_DUMP(env, "No floating point allowed\n");
922 info.si_signo = TARGET_SIGILL;
923 info.si_errno = 0;
924 info.si_code = TARGET_ILL_COPROC;
925 info._sifields._sigfault._addr = env->nip - 4;
926 queue_signal(info.si_signo, &info);
927 break;
928 case POWERPC_EXCP_SYSCALL: /* System call exception */
929 cpu_abort(env, "Syscall exception while in user mode. "
930 "Aborting\n");
931 break;
932 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
933 EXCP_DUMP(env, "No APU instruction allowed\n");
934 info.si_signo = TARGET_SIGILL;
935 info.si_errno = 0;
936 info.si_code = TARGET_ILL_COPROC;
937 info._sifields._sigfault._addr = env->nip - 4;
938 queue_signal(info.si_signo, &info);
939 break;
940 case POWERPC_EXCP_DECR: /* Decrementer exception */
941 cpu_abort(env, "Decrementer interrupt while in user mode. "
942 "Aborting\n");
943 break;
944 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
945 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
946 "Aborting\n");
947 break;
948 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
949 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
950 "Aborting\n");
951 break;
952 case POWERPC_EXCP_DTLB: /* Data TLB error */
953 cpu_abort(env, "Data TLB exception while in user mode. "
954 "Aborting\n");
955 break;
956 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
957 cpu_abort(env, "Instruction TLB exception while in user mode. "
958 "Aborting\n");
959 break;
960 case POWERPC_EXCP_DEBUG: /* Debug interrupt */
961 /* XXX: check this */
962 {
963 int sig;
964
965 sig = gdb_handlesig(env, TARGET_SIGTRAP);
966 if (sig) {
967 info.si_signo = sig;
968 info.si_errno = 0;
969 info.si_code = TARGET_TRAP_BRKPT;
970 queue_signal(info.si_signo, &info);
971 }
972 }
973 break;
974 #if defined(TARGET_PPCEMB)
975 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
976 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
977 info.si_signo = TARGET_SIGILL;
978 info.si_errno = 0;
979 info.si_code = TARGET_ILL_COPROC;
980 info._sifields._sigfault._addr = env->nip - 4;
981 queue_signal(info.si_signo, &info);
982 break;
983 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
984 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
985 break;
986 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
987 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
988 break;
989 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
990 cpu_abort(env, "Performance monitor exception not handled\n");
991 break;
992 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
993 cpu_abort(env, "Doorbell interrupt while in user mode. "
994 "Aborting\n");
995 break;
996 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
997 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
998 "Aborting\n");
999 break;
1000 case POWERPC_EXCP_RESET: /* System reset exception */
1001 cpu_abort(env, "Reset interrupt while in user mode. "
1002 "Aborting\n");
1003 break;
1004 #endif /* defined(TARGET_PPCEMB) */
1005 #if defined(TARGET_PPC64) && !defined(TARGET_ABI32) /* PowerPC 64 */
1006 case POWERPC_EXCP_DSEG: /* Data segment exception */
1007 cpu_abort(env, "Data segment exception while in user mode. "
1008 "Aborting\n");
1009 break;
1010 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1011 cpu_abort(env, "Instruction segment exception "
1012 "while in user mode. Aborting\n");
1013 break;
1014 #endif /* defined(TARGET_PPC64) && !defined(TARGET_ABI32) */
1015 #if defined(TARGET_PPC64H) && !defined(TARGET_ABI32)
1016 /* PowerPC 64 with hypervisor mode support */
1017 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1018 cpu_abort(env, "Hypervisor decrementer interrupt "
1019 "while in user mode. Aborting\n");
1020 break;
1021 #endif /* defined(TARGET_PPC64H) && !defined(TARGET_ABI32) */
1022 case POWERPC_EXCP_TRACE: /* Trace exception */
1023 /* Nothing to do:
1024 * we use this exception to emulate step-by-step execution mode.
1025 */
1026 break;
1027 #if defined(TARGET_PPC64H) && !defined(TARGET_ABI32)
1028 /* PowerPC 64 with hypervisor mode support */
1029 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1030 cpu_abort(env, "Hypervisor data storage exception "
1031 "while in user mode. Aborting\n");
1032 break;
1033 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1034 cpu_abort(env, "Hypervisor instruction storage exception "
1035 "while in user mode. Aborting\n");
1036 break;
1037 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1038 cpu_abort(env, "Hypervisor data segment exception "
1039 "while in user mode. Aborting\n");
1040 break;
1041 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1042 cpu_abort(env, "Hypervisor instruction segment exception "
1043 "while in user mode. Aborting\n");
1044 break;
1045 #endif /* defined(TARGET_PPC64H) && !defined(TARGET_ABI32) */
1046 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1047 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1048 info.si_signo = TARGET_SIGILL;
1049 info.si_errno = 0;
1050 info.si_code = TARGET_ILL_COPROC;
1051 info._sifields._sigfault._addr = env->nip - 4;
1052 queue_signal(info.si_signo, &info);
1053 break;
1054 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1055 cpu_abort(env, "Programable interval timer interrupt "
1056 "while in user mode. Aborting\n");
1057 break;
1058 case POWERPC_EXCP_IO: /* IO error exception */
1059 cpu_abort(env, "IO error exception while in user mode. "
1060 "Aborting\n");
1061 break;
1062 case POWERPC_EXCP_RUNM: /* Run mode exception */
1063 cpu_abort(env, "Run mode exception while in user mode. "
1064 "Aborting\n");
1065 break;
1066 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1067 cpu_abort(env, "Emulation trap exception not handled\n");
1068 break;
1069 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1070 cpu_abort(env, "Instruction fetch TLB exception "
1071 "while in user-mode. Aborting");
1072 break;
1073 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1074 cpu_abort(env, "Data load TLB exception while in user-mode. "
1075 "Aborting");
1076 break;
1077 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1078 cpu_abort(env, "Data store TLB exception while in user-mode. "
1079 "Aborting");
1080 break;
1081 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1082 cpu_abort(env, "Floating-point assist exception not handled\n");
1083 break;
1084 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1085 cpu_abort(env, "Instruction address breakpoint exception "
1086 "not handled\n");
1087 break;
1088 case POWERPC_EXCP_SMI: /* System management interrupt */
1089 cpu_abort(env, "System management interrupt while in user mode. "
1090 "Aborting\n");
1091 break;
1092 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1093 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1094 "Aborting\n");
1095 break;
1096 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1097 cpu_abort(env, "Performance monitor exception not handled\n");
1098 break;
1099 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1100 cpu_abort(env, "Vector assist exception not handled\n");
1101 break;
1102 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1103 cpu_abort(env, "Soft patch exception not handled\n");
1104 break;
1105 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1106 cpu_abort(env, "Maintenance exception while in user mode. "
1107 "Aborting\n");
1108 break;
1109 case POWERPC_EXCP_STOP: /* stop translation */
1110 /* We did invalidate the instruction cache. Go on */
1111 break;
1112 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1113 /* We just stopped because of a branch. Go on */
1114 break;
1115 case POWERPC_EXCP_SYSCALL_USER:
1116 /* system call in user-mode emulation */
1117 /* WARNING:
1118 * PPC ABI uses overflow flag in cr0 to signal an error
1119 * in syscalls.
1120 */
1121 #if 0
1122 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1123 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1124 #endif
1125 env->crf[0] &= ~0x1;
1126 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1127 env->gpr[5], env->gpr[6], env->gpr[7],
1128 env->gpr[8]);
1129 if (ret > (uint32_t)(-515)) {
1130 env->crf[0] |= 0x1;
1131 ret = -ret;
1132 }
1133 env->gpr[3] = ret;
1134 #if 0
1135 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1136 #endif
1137 break;
1138 case EXCP_INTERRUPT:
1139 /* just indicate that signals should be handled asap */
1140 break;
1141 default:
1142 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1143 break;
1144 }
1145 process_pending_signals(env);
1146 }
1147 }
1148 #endif
1149
1150 #ifdef TARGET_MIPS
1151
1152 #define MIPS_SYS(name, args) args,
1153
1154 static const uint8_t mips_syscall_args[] = {
1155 MIPS_SYS(sys_syscall , 0) /* 4000 */
1156 MIPS_SYS(sys_exit , 1)
1157 MIPS_SYS(sys_fork , 0)
1158 MIPS_SYS(sys_read , 3)
1159 MIPS_SYS(sys_write , 3)
1160 MIPS_SYS(sys_open , 3) /* 4005 */
1161 MIPS_SYS(sys_close , 1)
1162 MIPS_SYS(sys_waitpid , 3)
1163 MIPS_SYS(sys_creat , 2)
1164 MIPS_SYS(sys_link , 2)
1165 MIPS_SYS(sys_unlink , 1) /* 4010 */
1166 MIPS_SYS(sys_execve , 0)
1167 MIPS_SYS(sys_chdir , 1)
1168 MIPS_SYS(sys_time , 1)
1169 MIPS_SYS(sys_mknod , 3)
1170 MIPS_SYS(sys_chmod , 2) /* 4015 */
1171 MIPS_SYS(sys_lchown , 3)
1172 MIPS_SYS(sys_ni_syscall , 0)
1173 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1174 MIPS_SYS(sys_lseek , 3)
1175 MIPS_SYS(sys_getpid , 0) /* 4020 */
1176 MIPS_SYS(sys_mount , 5)
1177 MIPS_SYS(sys_oldumount , 1)
1178 MIPS_SYS(sys_setuid , 1)
1179 MIPS_SYS(sys_getuid , 0)
1180 MIPS_SYS(sys_stime , 1) /* 4025 */
1181 MIPS_SYS(sys_ptrace , 4)
1182 MIPS_SYS(sys_alarm , 1)
1183 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1184 MIPS_SYS(sys_pause , 0)
1185 MIPS_SYS(sys_utime , 2) /* 4030 */
1186 MIPS_SYS(sys_ni_syscall , 0)
1187 MIPS_SYS(sys_ni_syscall , 0)
1188 MIPS_SYS(sys_access , 2)
1189 MIPS_SYS(sys_nice , 1)
1190 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1191 MIPS_SYS(sys_sync , 0)
1192 MIPS_SYS(sys_kill , 2)
1193 MIPS_SYS(sys_rename , 2)
1194 MIPS_SYS(sys_mkdir , 2)
1195 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1196 MIPS_SYS(sys_dup , 1)
1197 MIPS_SYS(sys_pipe , 0)
1198 MIPS_SYS(sys_times , 1)
1199 MIPS_SYS(sys_ni_syscall , 0)
1200 MIPS_SYS(sys_brk , 1) /* 4045 */
1201 MIPS_SYS(sys_setgid , 1)
1202 MIPS_SYS(sys_getgid , 0)
1203 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1204 MIPS_SYS(sys_geteuid , 0)
1205 MIPS_SYS(sys_getegid , 0) /* 4050 */
1206 MIPS_SYS(sys_acct , 0)
1207 MIPS_SYS(sys_umount , 2)
1208 MIPS_SYS(sys_ni_syscall , 0)
1209 MIPS_SYS(sys_ioctl , 3)
1210 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1211 MIPS_SYS(sys_ni_syscall , 2)
1212 MIPS_SYS(sys_setpgid , 2)
1213 MIPS_SYS(sys_ni_syscall , 0)
1214 MIPS_SYS(sys_olduname , 1)
1215 MIPS_SYS(sys_umask , 1) /* 4060 */
1216 MIPS_SYS(sys_chroot , 1)
1217 MIPS_SYS(sys_ustat , 2)
1218 MIPS_SYS(sys_dup2 , 2)
1219 MIPS_SYS(sys_getppid , 0)
1220 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1221 MIPS_SYS(sys_setsid , 0)
1222 MIPS_SYS(sys_sigaction , 3)
1223 MIPS_SYS(sys_sgetmask , 0)
1224 MIPS_SYS(sys_ssetmask , 1)
1225 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1226 MIPS_SYS(sys_setregid , 2)
1227 MIPS_SYS(sys_sigsuspend , 0)
1228 MIPS_SYS(sys_sigpending , 1)
1229 MIPS_SYS(sys_sethostname , 2)
1230 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1231 MIPS_SYS(sys_getrlimit , 2)
1232 MIPS_SYS(sys_getrusage , 2)
1233 MIPS_SYS(sys_gettimeofday, 2)
1234 MIPS_SYS(sys_settimeofday, 2)
1235 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1236 MIPS_SYS(sys_setgroups , 2)
1237 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1238 MIPS_SYS(sys_symlink , 2)
1239 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1240 MIPS_SYS(sys_readlink , 3) /* 4085 */
1241 MIPS_SYS(sys_uselib , 1)
1242 MIPS_SYS(sys_swapon , 2)
1243 MIPS_SYS(sys_reboot , 3)
1244 MIPS_SYS(old_readdir , 3)
1245 MIPS_SYS(old_mmap , 6) /* 4090 */
1246 MIPS_SYS(sys_munmap , 2)
1247 MIPS_SYS(sys_truncate , 2)
1248 MIPS_SYS(sys_ftruncate , 2)
1249 MIPS_SYS(sys_fchmod , 2)
1250 MIPS_SYS(sys_fchown , 3) /* 4095 */
1251 MIPS_SYS(sys_getpriority , 2)
1252 MIPS_SYS(sys_setpriority , 3)
1253 MIPS_SYS(sys_ni_syscall , 0)
1254 MIPS_SYS(sys_statfs , 2)
1255 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1256 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1257 MIPS_SYS(sys_socketcall , 2)
1258 MIPS_SYS(sys_syslog , 3)
1259 MIPS_SYS(sys_setitimer , 3)
1260 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1261 MIPS_SYS(sys_newstat , 2)
1262 MIPS_SYS(sys_newlstat , 2)
1263 MIPS_SYS(sys_newfstat , 2)
1264 MIPS_SYS(sys_uname , 1)
1265 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1266 MIPS_SYS(sys_vhangup , 0)
1267 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1268 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1269 MIPS_SYS(sys_wait4 , 4)
1270 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1271 MIPS_SYS(sys_sysinfo , 1)
1272 MIPS_SYS(sys_ipc , 6)
1273 MIPS_SYS(sys_fsync , 1)
1274 MIPS_SYS(sys_sigreturn , 0)
1275 MIPS_SYS(sys_clone , 0) /* 4120 */
1276 MIPS_SYS(sys_setdomainname, 2)
1277 MIPS_SYS(sys_newuname , 1)
1278 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1279 MIPS_SYS(sys_adjtimex , 1)
1280 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1281 MIPS_SYS(sys_sigprocmask , 3)
1282 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1283 MIPS_SYS(sys_init_module , 5)
1284 MIPS_SYS(sys_delete_module, 1)
1285 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1286 MIPS_SYS(sys_quotactl , 0)
1287 MIPS_SYS(sys_getpgid , 1)
1288 MIPS_SYS(sys_fchdir , 1)
1289 MIPS_SYS(sys_bdflush , 2)
1290 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1291 MIPS_SYS(sys_personality , 1)
1292 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1293 MIPS_SYS(sys_setfsuid , 1)
1294 MIPS_SYS(sys_setfsgid , 1)
1295 MIPS_SYS(sys_llseek , 5) /* 4140 */
1296 MIPS_SYS(sys_getdents , 3)
1297 MIPS_SYS(sys_select , 5)
1298 MIPS_SYS(sys_flock , 2)
1299 MIPS_SYS(sys_msync , 3)
1300 MIPS_SYS(sys_readv , 3) /* 4145 */
1301 MIPS_SYS(sys_writev , 3)
1302 MIPS_SYS(sys_cacheflush , 3)
1303 MIPS_SYS(sys_cachectl , 3)
1304 MIPS_SYS(sys_sysmips , 4)
1305 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1306 MIPS_SYS(sys_getsid , 1)
1307 MIPS_SYS(sys_fdatasync , 0)
1308 MIPS_SYS(sys_sysctl , 1)
1309 MIPS_SYS(sys_mlock , 2)
1310 MIPS_SYS(sys_munlock , 2) /* 4155 */
1311 MIPS_SYS(sys_mlockall , 1)
1312 MIPS_SYS(sys_munlockall , 0)
1313 MIPS_SYS(sys_sched_setparam, 2)
1314 MIPS_SYS(sys_sched_getparam, 2)
1315 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1316 MIPS_SYS(sys_sched_getscheduler, 1)
1317 MIPS_SYS(sys_sched_yield , 0)
1318 MIPS_SYS(sys_sched_get_priority_max, 1)
1319 MIPS_SYS(sys_sched_get_priority_min, 1)
1320 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1321 MIPS_SYS(sys_nanosleep, 2)
1322 MIPS_SYS(sys_mremap , 4)
1323 MIPS_SYS(sys_accept , 3)
1324 MIPS_SYS(sys_bind , 3)
1325 MIPS_SYS(sys_connect , 3) /* 4170 */
1326 MIPS_SYS(sys_getpeername , 3)
1327 MIPS_SYS(sys_getsockname , 3)
1328 MIPS_SYS(sys_getsockopt , 5)
1329 MIPS_SYS(sys_listen , 2)
1330 MIPS_SYS(sys_recv , 4) /* 4175 */
1331 MIPS_SYS(sys_recvfrom , 6)
1332 MIPS_SYS(sys_recvmsg , 3)
1333 MIPS_SYS(sys_send , 4)
1334 MIPS_SYS(sys_sendmsg , 3)
1335 MIPS_SYS(sys_sendto , 6) /* 4180 */
1336 MIPS_SYS(sys_setsockopt , 5)
1337 MIPS_SYS(sys_shutdown , 2)
1338 MIPS_SYS(sys_socket , 3)
1339 MIPS_SYS(sys_socketpair , 4)
1340 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1341 MIPS_SYS(sys_getresuid , 3)
1342 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1343 MIPS_SYS(sys_poll , 3)
1344 MIPS_SYS(sys_nfsservctl , 3)
1345 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1346 MIPS_SYS(sys_getresgid , 3)
1347 MIPS_SYS(sys_prctl , 5)
1348 MIPS_SYS(sys_rt_sigreturn, 0)
1349 MIPS_SYS(sys_rt_sigaction, 4)
1350 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1351 MIPS_SYS(sys_rt_sigpending, 2)
1352 MIPS_SYS(sys_rt_sigtimedwait, 4)
1353 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1354 MIPS_SYS(sys_rt_sigsuspend, 0)
1355 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1356 MIPS_SYS(sys_pwrite64 , 6)
1357 MIPS_SYS(sys_chown , 3)
1358 MIPS_SYS(sys_getcwd , 2)
1359 MIPS_SYS(sys_capget , 2)
1360 MIPS_SYS(sys_capset , 2) /* 4205 */
1361 MIPS_SYS(sys_sigaltstack , 0)
1362 MIPS_SYS(sys_sendfile , 4)
1363 MIPS_SYS(sys_ni_syscall , 0)
1364 MIPS_SYS(sys_ni_syscall , 0)
1365 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1366 MIPS_SYS(sys_truncate64 , 4)
1367 MIPS_SYS(sys_ftruncate64 , 4)
1368 MIPS_SYS(sys_stat64 , 2)
1369 MIPS_SYS(sys_lstat64 , 2)
1370 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1371 MIPS_SYS(sys_pivot_root , 2)
1372 MIPS_SYS(sys_mincore , 3)
1373 MIPS_SYS(sys_madvise , 3)
1374 MIPS_SYS(sys_getdents64 , 3)
1375 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1376 MIPS_SYS(sys_ni_syscall , 0)
1377 MIPS_SYS(sys_gettid , 0)
1378 MIPS_SYS(sys_readahead , 5)
1379 MIPS_SYS(sys_setxattr , 5)
1380 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1381 MIPS_SYS(sys_fsetxattr , 5)
1382 MIPS_SYS(sys_getxattr , 4)
1383 MIPS_SYS(sys_lgetxattr , 4)
1384 MIPS_SYS(sys_fgetxattr , 4)
1385 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1386 MIPS_SYS(sys_llistxattr , 3)
1387 MIPS_SYS(sys_flistxattr , 3)
1388 MIPS_SYS(sys_removexattr , 2)
1389 MIPS_SYS(sys_lremovexattr, 2)
1390 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1391 MIPS_SYS(sys_tkill , 2)
1392 MIPS_SYS(sys_sendfile64 , 5)
1393 MIPS_SYS(sys_futex , 2)
1394 MIPS_SYS(sys_sched_setaffinity, 3)
1395 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1396 MIPS_SYS(sys_io_setup , 2)
1397 MIPS_SYS(sys_io_destroy , 1)
1398 MIPS_SYS(sys_io_getevents, 5)
1399 MIPS_SYS(sys_io_submit , 3)
1400 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1401 MIPS_SYS(sys_exit_group , 1)
1402 MIPS_SYS(sys_lookup_dcookie, 3)
1403 MIPS_SYS(sys_epoll_create, 1)
1404 MIPS_SYS(sys_epoll_ctl , 4)
1405 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1406 MIPS_SYS(sys_remap_file_pages, 5)
1407 MIPS_SYS(sys_set_tid_address, 1)
1408 MIPS_SYS(sys_restart_syscall, 0)
1409 MIPS_SYS(sys_fadvise64_64, 7)
1410 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1411 MIPS_SYS(sys_fstatfs64 , 2)
1412 MIPS_SYS(sys_timer_create, 3)
1413 MIPS_SYS(sys_timer_settime, 4)
1414 MIPS_SYS(sys_timer_gettime, 2)
1415 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1416 MIPS_SYS(sys_timer_delete, 1)
1417 MIPS_SYS(sys_clock_settime, 2)
1418 MIPS_SYS(sys_clock_gettime, 2)
1419 MIPS_SYS(sys_clock_getres, 2)
1420 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1421 MIPS_SYS(sys_tgkill , 3)
1422 MIPS_SYS(sys_utimes , 2)
1423 MIPS_SYS(sys_mbind , 4)
1424 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1425 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1426 MIPS_SYS(sys_mq_open , 4)
1427 MIPS_SYS(sys_mq_unlink , 1)
1428 MIPS_SYS(sys_mq_timedsend, 5)
1429 MIPS_SYS(sys_mq_timedreceive, 5)
1430 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1431 MIPS_SYS(sys_mq_getsetattr, 3)
1432 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1433 MIPS_SYS(sys_waitid , 4)
1434 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1435 MIPS_SYS(sys_add_key , 5)
1436 MIPS_SYS(sys_request_key, 4)
1437 MIPS_SYS(sys_keyctl , 5)
1438 MIPS_SYS(sys_set_thread_area, 1)
1439 MIPS_SYS(sys_inotify_init, 0)
1440 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1441 MIPS_SYS(sys_inotify_rm_watch, 2)
1442 MIPS_SYS(sys_migrate_pages, 4)
1443 MIPS_SYS(sys_openat, 4)
1444 MIPS_SYS(sys_mkdirat, 3)
1445 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1446 MIPS_SYS(sys_fchownat, 5)
1447 MIPS_SYS(sys_futimesat, 3)
1448 MIPS_SYS(sys_fstatat64, 4)
1449 MIPS_SYS(sys_unlinkat, 3)
1450 MIPS_SYS(sys_renameat, 4) /* 4295 */
1451 MIPS_SYS(sys_linkat, 5)
1452 MIPS_SYS(sys_symlinkat, 3)
1453 MIPS_SYS(sys_readlinkat, 4)
1454 MIPS_SYS(sys_fchmodat, 3)
1455 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1456 MIPS_SYS(sys_pselect6, 6)
1457 MIPS_SYS(sys_ppoll, 5)
1458 MIPS_SYS(sys_unshare, 1)
1459 MIPS_SYS(sys_splice, 4)
1460 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1461 MIPS_SYS(sys_tee, 4)
1462 MIPS_SYS(sys_vmsplice, 4)
1463 MIPS_SYS(sys_move_pages, 6)
1464 MIPS_SYS(sys_set_robust_list, 2)
1465 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1466 MIPS_SYS(sys_kexec_load, 4)
1467 MIPS_SYS(sys_getcpu, 3)
1468 MIPS_SYS(sys_epoll_pwait, 6)
1469 MIPS_SYS(sys_ioprio_set, 3)
1470 MIPS_SYS(sys_ioprio_get, 2)
1471 };
1472
1473 #undef MIPS_SYS
1474
1475 void cpu_loop(CPUMIPSState *env)
1476 {
1477 target_siginfo_t info;
1478 int trapnr, ret;
1479 unsigned int syscall_num;
1480
1481 for(;;) {
1482 trapnr = cpu_mips_exec(env);
1483 switch(trapnr) {
1484 case EXCP_SYSCALL:
1485 syscall_num = env->gpr[2][env->current_tc] - 4000;
1486 env->PC[env->current_tc] += 4;
1487 if (syscall_num >= sizeof(mips_syscall_args)) {
1488 ret = -ENOSYS;
1489 } else {
1490 int nb_args;
1491 abi_ulong sp_reg;
1492 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
1493
1494 nb_args = mips_syscall_args[syscall_num];
1495 sp_reg = env->gpr[29][env->current_tc];
1496 switch (nb_args) {
1497 /* these arguments are taken from the stack */
1498 case 8: arg8 = tgetl(sp_reg + 28);
1499 case 7: arg7 = tgetl(sp_reg + 24);
1500 case 6: arg6 = tgetl(sp_reg + 20);
1501 case 5: arg5 = tgetl(sp_reg + 16);
1502 default:
1503 break;
1504 }
1505 ret = do_syscall(env, env->gpr[2][env->current_tc],
1506 env->gpr[4][env->current_tc],
1507 env->gpr[5][env->current_tc],
1508 env->gpr[6][env->current_tc],
1509 env->gpr[7][env->current_tc],
1510 arg5, arg6/*, arg7, arg8*/);
1511 }
1512 if ((unsigned int)ret >= (unsigned int)(-1133)) {
1513 env->gpr[7][env->current_tc] = 1; /* error flag */
1514 ret = -ret;
1515 } else {
1516 env->gpr[7][env->current_tc] = 0; /* error flag */
1517 }
1518 env->gpr[2][env->current_tc] = ret;
1519 break;
1520 case EXCP_TLBL:
1521 case EXCP_TLBS:
1522 case EXCP_CpU:
1523 case EXCP_RI:
1524 info.si_signo = TARGET_SIGILL;
1525 info.si_errno = 0;
1526 info.si_code = 0;
1527 queue_signal(info.si_signo, &info);
1528 break;
1529 case EXCP_INTERRUPT:
1530 /* just indicate that signals should be handled asap */
1531 break;
1532 case EXCP_DEBUG:
1533 {
1534 int sig;
1535
1536 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1537 if (sig)
1538 {
1539 info.si_signo = sig;
1540 info.si_errno = 0;
1541 info.si_code = TARGET_TRAP_BRKPT;
1542 queue_signal(info.si_signo, &info);
1543 }
1544 }
1545 break;
1546 default:
1547 // error:
1548 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1549 trapnr);
1550 cpu_dump_state(env, stderr, fprintf, 0);
1551 abort();
1552 }
1553 process_pending_signals(env);
1554 }
1555 }
1556 #endif
1557
1558 #ifdef TARGET_SH4
1559 void cpu_loop (CPUState *env)
1560 {
1561 int trapnr, ret;
1562 target_siginfo_t info;
1563
1564 while (1) {
1565 trapnr = cpu_sh4_exec (env);
1566
1567 switch (trapnr) {
1568 case 0x160:
1569 ret = do_syscall(env,
1570 env->gregs[3],
1571 env->gregs[4],
1572 env->gregs[5],
1573 env->gregs[6],
1574 env->gregs[7],
1575 env->gregs[0],
1576 0);
1577 env->gregs[0] = ret;
1578 env->pc += 2;
1579 break;
1580 case EXCP_DEBUG:
1581 {
1582 int sig;
1583
1584 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1585 if (sig)
1586 {
1587 info.si_signo = sig;
1588 info.si_errno = 0;
1589 info.si_code = TARGET_TRAP_BRKPT;
1590 queue_signal(info.si_signo, &info);
1591 }
1592 }
1593 break;
1594 default:
1595 printf ("Unhandled trap: 0x%x\n", trapnr);
1596 cpu_dump_state(env, stderr, fprintf, 0);
1597 exit (1);
1598 }
1599 process_pending_signals (env);
1600 }
1601 }
1602 #endif
1603
1604 #ifdef TARGET_CRIS
1605 void cpu_loop (CPUState *env)
1606 {
1607 int trapnr, ret;
1608 target_siginfo_t info;
1609
1610 while (1) {
1611 trapnr = cpu_cris_exec (env);
1612 switch (trapnr) {
1613 case 0xaa:
1614 {
1615 info.si_signo = SIGSEGV;
1616 info.si_errno = 0;
1617 /* XXX: check env->error_code */
1618 info.si_code = TARGET_SEGV_MAPERR;
1619 info._sifields._sigfault._addr = env->debug1;
1620 queue_signal(info.si_signo, &info);
1621 }
1622 break;
1623 case EXCP_BREAK:
1624 ret = do_syscall(env,
1625 env->regs[9],
1626 env->regs[10],
1627 env->regs[11],
1628 env->regs[12],
1629 env->regs[13],
1630 env->pregs[7],
1631 env->pregs[11]);
1632 env->regs[10] = ret;
1633 env->pc += 2;
1634 break;
1635 case EXCP_DEBUG:
1636 {
1637 int sig;
1638
1639 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1640 if (sig)
1641 {
1642 info.si_signo = sig;
1643 info.si_errno = 0;
1644 info.si_code = TARGET_TRAP_BRKPT;
1645 queue_signal(info.si_signo, &info);
1646 }
1647 }
1648 break;
1649 default:
1650 printf ("Unhandled trap: 0x%x\n", trapnr);
1651 cpu_dump_state(env, stderr, fprintf, 0);
1652 exit (1);
1653 }
1654 process_pending_signals (env);
1655 }
1656 }
1657 #endif
1658
1659 #ifdef TARGET_M68K
1660
1661 void cpu_loop(CPUM68KState *env)
1662 {
1663 int trapnr;
1664 unsigned int n;
1665 target_siginfo_t info;
1666 TaskState *ts = env->opaque;
1667
1668 for(;;) {
1669 trapnr = cpu_m68k_exec(env);
1670 switch(trapnr) {
1671 case EXCP_ILLEGAL:
1672 {
1673 if (ts->sim_syscalls) {
1674 uint16_t nr;
1675 nr = lduw(env->pc + 2);
1676 env->pc += 4;
1677 do_m68k_simcall(env, nr);
1678 } else {
1679 goto do_sigill;
1680 }
1681 }
1682 break;
1683 case EXCP_HALT_INSN:
1684 /* Semihosing syscall. */
1685 env->pc += 4;
1686 do_m68k_semihosting(env, env->dregs[0]);
1687 break;
1688 case EXCP_LINEA:
1689 case EXCP_LINEF:
1690 case EXCP_UNSUPPORTED:
1691 do_sigill:
1692 info.si_signo = SIGILL;
1693 info.si_errno = 0;
1694 info.si_code = TARGET_ILL_ILLOPN;
1695 info._sifields._sigfault._addr = env->pc;
1696 queue_signal(info.si_signo, &info);
1697 break;
1698 case EXCP_TRAP0:
1699 {
1700 ts->sim_syscalls = 0;
1701 n = env->dregs[0];
1702 env->pc += 2;
1703 env->dregs[0] = do_syscall(env,
1704 n,
1705 env->dregs[1],
1706 env->dregs[2],
1707 env->dregs[3],
1708 env->dregs[4],
1709 env->dregs[5],
1710 env->dregs[6]);
1711 }
1712 break;
1713 case EXCP_INTERRUPT:
1714 /* just indicate that signals should be handled asap */
1715 break;
1716 case EXCP_ACCESS:
1717 {
1718 info.si_signo = SIGSEGV;
1719 info.si_errno = 0;
1720 /* XXX: check env->error_code */
1721 info.si_code = TARGET_SEGV_MAPERR;
1722 info._sifields._sigfault._addr = env->mmu.ar;
1723 queue_signal(info.si_signo, &info);
1724 }
1725 break;
1726 case EXCP_DEBUG:
1727 {
1728 int sig;
1729
1730 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1731 if (sig)
1732 {
1733 info.si_signo = sig;
1734 info.si_errno = 0;
1735 info.si_code = TARGET_TRAP_BRKPT;
1736 queue_signal(info.si_signo, &info);
1737 }
1738 }
1739 break;
1740 default:
1741 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1742 trapnr);
1743 cpu_dump_state(env, stderr, fprintf, 0);
1744 abort();
1745 }
1746 process_pending_signals(env);
1747 }
1748 }
1749 #endif /* TARGET_M68K */
1750
1751 #ifdef TARGET_ALPHA
1752 void cpu_loop (CPUState *env)
1753 {
1754 int trapnr;
1755 target_siginfo_t info;
1756
1757 while (1) {
1758 trapnr = cpu_alpha_exec (env);
1759
1760 switch (trapnr) {
1761 case EXCP_RESET:
1762 fprintf(stderr, "Reset requested. Exit\n");
1763 exit(1);
1764 break;
1765 case EXCP_MCHK:
1766 fprintf(stderr, "Machine check exception. Exit\n");
1767 exit(1);
1768 break;
1769 case EXCP_ARITH:
1770 fprintf(stderr, "Arithmetic trap.\n");
1771 exit(1);
1772 break;
1773 case EXCP_HW_INTERRUPT:
1774 fprintf(stderr, "External interrupt. Exit\n");
1775 exit(1);
1776 break;
1777 case EXCP_DFAULT:
1778 fprintf(stderr, "MMU data fault\n");
1779 exit(1);
1780 break;
1781 case EXCP_DTB_MISS_PAL:
1782 fprintf(stderr, "MMU data TLB miss in PALcode\n");
1783 exit(1);
1784 break;
1785 case EXCP_ITB_MISS:
1786 fprintf(stderr, "MMU instruction TLB miss\n");
1787 exit(1);
1788 break;
1789 case EXCP_ITB_ACV:
1790 fprintf(stderr, "MMU instruction access violation\n");
1791 exit(1);
1792 break;
1793 case EXCP_DTB_MISS_NATIVE:
1794 fprintf(stderr, "MMU data TLB miss\n");
1795 exit(1);
1796 break;
1797 case EXCP_UNALIGN:
1798 fprintf(stderr, "Unaligned access\n");
1799 exit(1);
1800 break;
1801 case EXCP_OPCDEC:
1802 fprintf(stderr, "Invalid instruction\n");
1803 exit(1);
1804 break;
1805 case EXCP_FEN:
1806 fprintf(stderr, "Floating-point not allowed\n");
1807 exit(1);
1808 break;
1809 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
1810 fprintf(stderr, "Call to PALcode\n");
1811 call_pal(env, (trapnr >> 6) | 0x80);
1812 break;
1813 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
1814 fprintf(stderr, "Privileged call to PALcode\n");
1815 exit(1);
1816 break;
1817 case EXCP_DEBUG:
1818 {
1819 int sig;
1820
1821 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1822 if (sig)
1823 {
1824 info.si_signo = sig;
1825 info.si_errno = 0;
1826 info.si_code = TARGET_TRAP_BRKPT;
1827 queue_signal(info.si_signo, &info);
1828 }
1829 }
1830 break;
1831 default:
1832 printf ("Unhandled trap: 0x%x\n", trapnr);
1833 cpu_dump_state(env, stderr, fprintf, 0);
1834 exit (1);
1835 }
1836 process_pending_signals (env);
1837 }
1838 }
1839 #endif /* TARGET_ALPHA */
1840
1841 void usage(void)
1842 {
1843 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2007 Fabrice Bellard\n"
1844 "usage: qemu-" TARGET_ARCH " [-h] [-g] [-d opts] [-L path] [-s size] [-cpu model] program [arguments...]\n"
1845 "Linux CPU emulator (compiled for %s emulation)\n"
1846 "\n"
1847 "-h print this help\n"
1848 "-g port wait gdb connection to port\n"
1849 "-L path set the elf interpreter prefix (default=%s)\n"
1850 "-s size set the stack size in bytes (default=%ld)\n"
1851 "-cpu model select CPU (-cpu ? for list)\n"
1852 "-drop-ld-preload drop LD_PRELOAD for target process\n"
1853 "\n"
1854 "debug options:\n"
1855 #ifdef USE_CODE_COPY
1856 "-no-code-copy disable code copy acceleration\n"
1857 #endif
1858 "-d options activate log (logfile=%s)\n"
1859 "-p pagesize set the host page size to 'pagesize'\n",
1860 TARGET_ARCH,
1861 interp_prefix,
1862 x86_stack_size,
1863 DEBUG_LOGFILE);
1864 _exit(1);
1865 }
1866
1867 /* XXX: currently only used for async signals (see signal.c) */
1868 CPUState *global_env;
1869
1870 /* used to free thread contexts */
1871 TaskState *first_task_state;
1872
1873 int main(int argc, char **argv)
1874 {
1875 const char *filename;
1876 const char *cpu_model;
1877 struct target_pt_regs regs1, *regs = &regs1;
1878 struct image_info info1, *info = &info1;
1879 TaskState ts1, *ts = &ts1;
1880 CPUState *env;
1881 int optind;
1882 const char *r;
1883 int gdbstub_port = 0;
1884 int drop_ld_preload = 0, environ_count = 0;
1885 char **target_environ, **wrk, **dst;
1886
1887 if (argc <= 1)
1888 usage();
1889
1890 /* init debug */
1891 cpu_set_log_filename(DEBUG_LOGFILE);
1892
1893 cpu_model = NULL;
1894 optind = 1;
1895 for(;;) {
1896 if (optind >= argc)
1897 break;
1898 r = argv[optind];
1899 if (r[0] != '-')
1900 break;
1901 optind++;
1902 r++;
1903 if (!strcmp(r, "-")) {
1904 break;
1905 } else if (!strcmp(r, "d")) {
1906 int mask;
1907 CPULogItem *item;
1908
1909 if (optind >= argc)
1910 break;
1911
1912 r = argv[optind++];
1913 mask = cpu_str_to_log_mask(r);
1914 if (!mask) {
1915 printf("Log items (comma separated):\n");
1916 for(item = cpu_log_items; item->mask != 0; item++) {
1917 printf("%-10s %s\n", item->name, item->help);
1918 }
1919 exit(1);
1920 }
1921 cpu_set_log(mask);
1922 } else if (!strcmp(r, "s")) {
1923 r = argv[optind++];
1924 x86_stack_size = strtol(r, (char **)&r, 0);
1925 if (x86_stack_size <= 0)
1926 usage();
1927 if (*r == 'M')
1928 x86_stack_size *= 1024 * 1024;
1929 else if (*r == 'k' || *r == 'K')
1930 x86_stack_size *= 1024;
1931 } else if (!strcmp(r, "L")) {
1932 interp_prefix = argv[optind++];
1933 } else if (!strcmp(r, "p")) {
1934 qemu_host_page_size = atoi(argv[optind++]);
1935 if (qemu_host_page_size == 0 ||
1936 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
1937 fprintf(stderr, "page size must be a power of two\n");
1938 exit(1);
1939 }
1940 } else if (!strcmp(r, "g")) {
1941 gdbstub_port = atoi(argv[optind++]);
1942 } else if (!strcmp(r, "r")) {
1943 qemu_uname_release = argv[optind++];
1944 } else if (!strcmp(r, "cpu")) {
1945 cpu_model = argv[optind++];
1946 if (strcmp(cpu_model, "?") == 0) {
1947 /* XXX: implement xxx_cpu_list for targets that still miss it */
1948 #if defined(cpu_list)
1949 cpu_list(stdout, &fprintf);
1950 #endif
1951 _exit(1);
1952 }
1953 } else if (!strcmp(r, "drop-ld-preload")) {
1954 drop_ld_preload = 1;
1955 } else
1956 #ifdef USE_CODE_COPY
1957 if (!strcmp(r, "no-code-copy")) {
1958 code_copy_enabled = 0;
1959 } else
1960 #endif
1961 {
1962 usage();
1963 }
1964 }
1965 if (optind >= argc)
1966 usage();
1967 filename = argv[optind];
1968
1969 /* Zero out regs */
1970 memset(regs, 0, sizeof(struct target_pt_regs));
1971
1972 /* Zero out image_info */
1973 memset(info, 0, sizeof(struct image_info));
1974
1975 /* Scan interp_prefix dir for replacement files. */
1976 init_paths(interp_prefix);
1977
1978 /* NOTE: we need to init the CPU at this stage to get
1979 qemu_host_page_size */
1980 env = cpu_init();
1981 global_env = env;
1982
1983 if(getenv("QEMU_STRACE") ){
1984 do_strace=1;
1985 }
1986
1987 wrk = environ;
1988 while (*(wrk++))
1989 environ_count++;
1990
1991 target_environ = malloc((environ_count + 1) * sizeof(char *));
1992 if (!target_environ)
1993 abort();
1994 for (wrk = environ, dst = target_environ; *wrk; wrk++) {
1995 if (drop_ld_preload && !strncmp(*wrk, "LD_PRELOAD=", 11))
1996 continue;
1997 *(dst++) = strdup(*wrk);
1998 }
1999 *dst = NULL; /* NULL terminate target_environ */
2000
2001 if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) {
2002 printf("Error loading %s\n", filename);
2003 _exit(1);
2004 }
2005
2006 for (wrk = target_environ; *wrk; wrk++) {
2007 free(*wrk);
2008 }
2009
2010 free(target_environ);
2011
2012 if (loglevel) {
2013 page_dump(logfile);
2014
2015 fprintf(logfile, "start_brk 0x" TARGET_FMT_lx "\n", info->start_brk);
2016 fprintf(logfile, "end_code 0x" TARGET_FMT_lx "\n", info->end_code);
2017 fprintf(logfile, "start_code 0x" TARGET_FMT_lx "\n",
2018 info->start_code);
2019 fprintf(logfile, "start_data 0x" TARGET_FMT_lx "\n",
2020 info->start_data);
2021 fprintf(logfile, "end_data 0x" TARGET_FMT_lx "\n", info->end_data);
2022 fprintf(logfile, "start_stack 0x" TARGET_FMT_lx "\n",
2023 info->start_stack);
2024 fprintf(logfile, "brk 0x" TARGET_FMT_lx "\n", info->brk);
2025 fprintf(logfile, "entry 0x" TARGET_FMT_lx "\n", info->entry);
2026 }
2027
2028 target_set_brk(info->brk);
2029 syscall_init();
2030 signal_init();
2031
2032 /* build Task State */
2033 memset(ts, 0, sizeof(TaskState));
2034 env->opaque = ts;
2035 ts->used = 1;
2036 ts->info = info;
2037 env->user_mode_only = 1;
2038
2039 #if defined(TARGET_I386)
2040 cpu_x86_set_cpl(env, 3);
2041
2042 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
2043 env->hflags |= HF_PE_MASK;
2044 if (env->cpuid_features & CPUID_SSE) {
2045 env->cr[4] |= CR4_OSFXSR_MASK;
2046 env->hflags |= HF_OSFXSR_MASK;
2047 }
2048
2049 /* flags setup : we activate the IRQs by default as in user mode */
2050 env->eflags |= IF_MASK;
2051
2052 /* linux register setup */
2053 #if defined(TARGET_X86_64)
2054 env->regs[R_EAX] = regs->rax;
2055 env->regs[R_EBX] = regs->rbx;
2056 env->regs[R_ECX] = regs->rcx;
2057 env->regs[R_EDX] = regs->rdx;
2058 env->regs[R_ESI] = regs->rsi;
2059 env->regs[R_EDI] = regs->rdi;
2060 env->regs[R_EBP] = regs->rbp;
2061 env->regs[R_ESP] = regs->rsp;
2062 env->eip = regs->rip;
2063 #else
2064 env->regs[R_EAX] = regs->eax;
2065 env->regs[R_EBX] = regs->ebx;
2066 env->regs[R_ECX] = regs->ecx;
2067 env->regs[R_EDX] = regs->edx;
2068 env->regs[R_ESI] = regs->esi;
2069 env->regs[R_EDI] = regs->edi;
2070 env->regs[R_EBP] = regs->ebp;
2071 env->regs[R_ESP] = regs->esp;
2072 env->eip = regs->eip;
2073 #endif
2074
2075 /* linux interrupt setup */
2076 env->idt.base = h2g(idt_table);
2077 env->idt.limit = sizeof(idt_table) - 1;
2078 set_idt(0, 0);
2079 set_idt(1, 0);
2080 set_idt(2, 0);
2081 set_idt(3, 3);
2082 set_idt(4, 3);
2083 set_idt(5, 3);
2084 set_idt(6, 0);
2085 set_idt(7, 0);
2086 set_idt(8, 0);
2087 set_idt(9, 0);
2088 set_idt(10, 0);
2089 set_idt(11, 0);
2090 set_idt(12, 0);
2091 set_idt(13, 0);
2092 set_idt(14, 0);
2093 set_idt(15, 0);
2094 set_idt(16, 0);
2095 set_idt(17, 0);
2096 set_idt(18, 0);
2097 set_idt(19, 0);
2098 set_idt(0x80, 3);
2099
2100 /* linux segment setup */
2101 env->gdt.base = h2g(gdt_table);
2102 env->gdt.limit = sizeof(gdt_table) - 1;
2103 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2104 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2105 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2106 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
2107 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2108 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
2109 cpu_x86_load_seg(env, R_CS, __USER_CS);
2110 cpu_x86_load_seg(env, R_DS, __USER_DS);
2111 cpu_x86_load_seg(env, R_ES, __USER_DS);
2112 cpu_x86_load_seg(env, R_SS, __USER_DS);
2113 cpu_x86_load_seg(env, R_FS, __USER_DS);
2114 cpu_x86_load_seg(env, R_GS, __USER_DS);
2115
2116 /* This hack makes Wine work... */
2117 env->segs[R_FS].selector = 0;
2118 #elif defined(TARGET_ARM)
2119 {
2120 int i;
2121 if (cpu_model == NULL)
2122 cpu_model = "arm926";
2123 cpu_arm_set_model(env, cpu_model);
2124 cpsr_write(env, regs->uregs[16], 0xffffffff);
2125 for(i = 0; i < 16; i++) {
2126 env->regs[i] = regs->uregs[i];
2127 }
2128 }
2129 #elif defined(TARGET_SPARC)
2130 {
2131 int i;
2132 const sparc_def_t *def;
2133 #ifdef TARGET_SPARC64
2134 if (cpu_model == NULL)
2135 cpu_model = "TI UltraSparc II";
2136 #else
2137 if (cpu_model == NULL)
2138 cpu_model = "Fujitsu MB86904";
2139 #endif
2140 sparc_find_by_name(cpu_model, &def);
2141 if (def == NULL) {
2142 fprintf(stderr, "Unable to find Sparc CPU definition\n");
2143 exit(1);
2144 }
2145 cpu_sparc_register(env, def, 0);
2146 env->pc = regs->pc;
2147 env->npc = regs->npc;
2148 env->y = regs->y;
2149 for(i = 0; i < 8; i++)
2150 env->gregs[i] = regs->u_regs[i];
2151 for(i = 0; i < 8; i++)
2152 env->regwptr[i] = regs->u_regs[i + 8];
2153 }
2154 #elif defined(TARGET_PPC)
2155 {
2156 ppc_def_t *def;
2157 int i;
2158
2159 /* Choose and initialise CPU */
2160 if (cpu_model == NULL)
2161 cpu_model = "750";
2162 ppc_find_by_name(cpu_model, &def);
2163 if (def == NULL) {
2164 cpu_abort(env,
2165 "Unable to find PowerPC CPU definition\n");
2166 }
2167 cpu_ppc_register(env, def);
2168 cpu_ppc_reset(env);
2169 #if defined(TARGET_PPC64)
2170 #if defined(TARGET_ABI32)
2171 env->msr &= ~((target_ulong)1 << MSR_SF);
2172 #else
2173 env->msr |= (target_ulong)1 << MSR_SF;
2174 #endif
2175 #endif
2176 env->nip = regs->nip;
2177 for(i = 0; i < 32; i++) {
2178 env->gpr[i] = regs->gpr[i];
2179 }
2180 }
2181 #elif defined(TARGET_M68K)
2182 {
2183 if (cpu_model == NULL)
2184 cpu_model = "any";
2185 if (cpu_m68k_set_model(env, cpu_model)) {
2186 cpu_abort(cpu_single_env,
2187 "Unable to find m68k CPU definition\n");
2188 }
2189 env->pc = regs->pc;
2190 env->dregs[0] = regs->d0;
2191 env->dregs[1] = regs->d1;
2192 env->dregs[2] = regs->d2;
2193 env->dregs[3] = regs->d3;
2194 env->dregs[4] = regs->d4;
2195 env->dregs[5] = regs->d5;
2196 env->dregs[6] = regs->d6;
2197 env->dregs[7] = regs->d7;
2198 env->aregs[0] = regs->a0;
2199 env->aregs[1] = regs->a1;
2200 env->aregs[2] = regs->a2;
2201 env->aregs[3] = regs->a3;
2202 env->aregs[4] = regs->a4;
2203 env->aregs[5] = regs->a5;
2204 env->aregs[6] = regs->a6;
2205 env->aregs[7] = regs->usp;
2206 env->sr = regs->sr;
2207 ts->sim_syscalls = 1;
2208 }
2209 #elif defined(TARGET_MIPS)
2210 {
2211 mips_def_t *def;
2212 int i;
2213
2214 /* Choose and initialise CPU */
2215 if (cpu_model == NULL)
2216 #if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64)
2217 cpu_model = "20Kc";
2218 #else
2219 cpu_model = "24Kf";
2220 #endif
2221 mips_find_by_name(cpu_model, &def);
2222 if (def == NULL)
2223 cpu_abort(env, "Unable to find MIPS CPU definition\n");
2224 cpu_mips_register(env, def);
2225
2226 for(i = 0; i < 32; i++) {
2227 env->gpr[i][env->current_tc] = regs->regs[i];
2228 }
2229 env->PC[env->current_tc] = regs->cp0_epc;
2230 }
2231 #elif defined(TARGET_SH4)
2232 {
2233 int i;
2234
2235 for(i = 0; i < 16; i++) {
2236 env->gregs[i] = regs->regs[i];
2237 }
2238 env->pc = regs->pc;
2239 }
2240 #elif defined(TARGET_ALPHA)
2241 {
2242 int i;
2243
2244 for(i = 0; i < 28; i++) {
2245 env->ir[i] = ((abi_ulong *)regs)[i];
2246 }
2247 env->ipr[IPR_USP] = regs->usp;
2248 env->ir[30] = regs->usp;
2249 env->pc = regs->pc;
2250 env->unique = regs->unique;
2251 }
2252 #elif defined(TARGET_CRIS)
2253 {
2254 env->regs[0] = regs->r0;
2255 env->regs[1] = regs->r1;
2256 env->regs[2] = regs->r2;
2257 env->regs[3] = regs->r3;
2258 env->regs[4] = regs->r4;
2259 env->regs[5] = regs->r5;
2260 env->regs[6] = regs->r6;
2261 env->regs[7] = regs->r7;
2262 env->regs[8] = regs->r8;
2263 env->regs[9] = regs->r9;
2264 env->regs[10] = regs->r10;
2265 env->regs[11] = regs->r11;
2266 env->regs[12] = regs->r12;
2267 env->regs[13] = regs->r13;
2268 env->regs[14] = info->start_stack;
2269 env->regs[15] = regs->acr;
2270 env->pc = regs->erp;
2271 }
2272 #else
2273 #error unsupported target CPU
2274 #endif
2275
2276 #if defined(TARGET_ARM) || defined(TARGET_M68K)
2277 ts->stack_base = info->start_stack;
2278 ts->heap_base = info->brk;
2279 /* This will be filled in on the first SYS_HEAPINFO call. */
2280 ts->heap_limit = 0;
2281 #endif
2282
2283 if (gdbstub_port) {
2284 gdbserver_start (gdbstub_port);
2285 gdb_handlesig(env, 0);
2286 }
2287 cpu_loop(env);
2288 /* never exits */
2289 return 0;
2290 }
Stable branch of Qemu 0.9.1