hw/ppc_chrp.c

   1 /*
   2  * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25 #include "hw.h"
  26 #include "ppc.h"
  27 #include "ppc_mac.h"
  28 #include "nvram.h"
  29 #include "pc.h"
  30 #include "pci.h"
  31 #include "net.h"
  32 #include "sysemu.h"
  33 #include "boards.h"
  34
  35 /* UniN device */
  36 static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
  37 {
  38 }
  39
  40 static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
  41 {
  42     return 0;
  43 }
  44
  45 static CPUWriteMemoryFunc *unin_write[] = {
  46     &unin_writel,
  47     &unin_writel,
  48     &unin_writel,
  49 };
  50
  51 static CPUReadMemoryFunc *unin_read[] = {
  52     &unin_readl,
  53     &unin_readl,
  54     &unin_readl,
  55 };
  56
  57 /* PowerPC Mac99 hardware initialisation */
  58 static void ppc_core99_init (int ram_size, int vga_ram_size,
  59                              const char *boot_device, DisplayState *ds,
  60                              const char *kernel_filename,
  61                              const char *kernel_cmdline,
  62                              const char *initrd_filename,
  63                              const char *cpu_model)
  64 {
  65     CPUState *env = NULL, *envs[MAX_CPUS];
  66     char buf[1024];
  67     qemu_irq *pic, **openpic_irqs;
  68     int unin_memory;
  69     int linux_boot, i;
  70     unsigned long bios_offset, vga_bios_offset;
  71     uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
  72     PCIBus *pci_bus;
  73     nvram_t nvram;
  74 #if 0
  75     MacIONVRAMState *nvr;
  76     int nvram_mem_index;
  77 #endif
  78     m48t59_t *m48t59;
  79     int vga_bios_size, bios_size;
  80     qemu_irq *dummy_irq;
  81     int pic_mem_index, dbdma_mem_index, cuda_mem_index;
  82     int ide_mem_index[2];
  83     int ppc_boot_device;
  84
  85     linux_boot = (kernel_filename != NULL);
  86
  87     /* init CPUs */
  88     if (cpu_model == NULL)
  89         cpu_model = "default";
  90     for (i = 0; i < smp_cpus; i++) {
  91         env = cpu_init(cpu_model);
  92         if (!env) {
  93             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
  94             exit(1);
  95         }
  96         /* Set time-base frequency to 100 Mhz */
  97         cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
  98 #if 0
  99         env->osi_call = vga_osi_call;
 100 #endif
 101         qemu_register_reset(&cpu_ppc_reset, env);
 102         register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
 103         envs[i] = env;
 104     }
 105     if (env->nip < 0xFFF80000) {
 106         /* Special test for PowerPC 601:
 107          * the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
 108          * But the NVRAM is located at 0xFFF04000...
 109          */
 110         cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
 111     }
 112
 113     /* allocate RAM */
 114     cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
 115
 116     /* allocate and load BIOS */
 117     bios_offset = ram_size + vga_ram_size;
 118     if (bios_name == NULL)
 119         bios_name = BIOS_FILENAME;
 120     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 121     bios_size = load_image(buf, phys_ram_base + bios_offset);
 122     if (bios_size < 0 || bios_size > BIOS_SIZE) {
 123         cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
 124         exit(1);
 125     }
 126     bios_size = (bios_size + 0xfff) & ~0xfff;
 127     if (bios_size > 0x00080000) {
 128         /* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
 129         cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
 130     }
 131     cpu_register_physical_memory((uint32_t)(-bios_size),
 132                                  bios_size, bios_offset | IO_MEM_ROM);
 133
 134     /* allocate and load VGA BIOS */
 135     vga_bios_offset = bios_offset + bios_size;
 136     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 137     vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
 138     if (vga_bios_size < 0) {
 139         /* if no bios is present, we can still work */
 140         fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
 141         vga_bios_size = 0;
 142     } else {
 143         /* set a specific header (XXX: find real Apple format for NDRV
 144            drivers) */
 145         phys_ram_base[vga_bios_offset] = 'N';
 146         phys_ram_base[vga_bios_offset + 1] = 'D';
 147         phys_ram_base[vga_bios_offset + 2] = 'R';
 148         phys_ram_base[vga_bios_offset + 3] = 'V';
 149         cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
 150                      vga_bios_size);
 151         vga_bios_size += 8;
 152     }
 153     vga_bios_size = (vga_bios_size + 0xfff) & ~0xfff;
 154
 155     if (linux_boot) {
 156         kernel_base = KERNEL_LOAD_ADDR;
 157         /* now we can load the kernel */
 158         kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
 159         if (kernel_size < 0) {
 160             cpu_abort(env, "qemu: could not load kernel '%s'\n",
 161                       kernel_filename);
 162             exit(1);
 163         }
 164         /* load initrd */
 165         if (initrd_filename) {
 166             initrd_base = INITRD_LOAD_ADDR;
 167             initrd_size = load_image(initrd_filename,
 168                                      phys_ram_base + initrd_base);
 169             if (initrd_size < 0) {
 170                 cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
 171                           initrd_filename);
 172                 exit(1);
 173             }
 174         } else {
 175             initrd_base = 0;
 176             initrd_size = 0;
 177         }
 178         ppc_boot_device = 'm';
 179     } else {
 180         kernel_base = 0;
 181         kernel_size = 0;
 182         initrd_base = 0;
 183         initrd_size = 0;
 184         ppc_boot_device = '\0';
 185         /* We consider that NewWorld PowerMac never have any floppy drive
 186          * For now, OHW cannot boot from the network.
 187          */
 188         for (i = 0; boot_device[i] != '\0'; i++) {
 189             if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
 190                 ppc_boot_device = boot_device[i];
 191                 break;
 192             }
 193         }
 194         if (ppc_boot_device == '\0') {
 195             fprintf(stderr, "No valid boot device for Mac99 machine\n");
 196             exit(1);
 197         }
 198     }
 199
 200     isa_mem_base = 0x80000000;
 201
 202     /* Register 8 MB of ISA IO space */
 203     isa_mmio_init(0xf2000000, 0x00800000);
 204
 205     /* UniN init */
 206     unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL);
 207     cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
 208
 209     openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
 210     openpic_irqs[0] =
 211         qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
 212     for (i = 0; i < smp_cpus; i++) {
 213         /* Mac99 IRQ connection between OpenPIC outputs pins
 214          * and PowerPC input pins
 215          */
 216         switch (PPC_INPUT(env)) {
 217         case PPC_FLAGS_INPUT_6xx:
 218             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 219             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 220                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 221             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 222                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 223             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 224                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
 225             /* Not connected ? */
 226             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 227             /* Check this */
 228             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 229                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
 230             break;
 231 #if defined(TARGET_PPC64)
 232         case PPC_FLAGS_INPUT_970:
 233             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 234             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 235                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 236             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 237                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 238             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 239                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
 240             /* Not connected ? */
 241             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 242             /* Check this */
 243             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 244                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
 245             break;
 246 #endif /* defined(TARGET_PPC64) */
 247         default:
 248             cpu_abort(env, "Bus model not supported on mac99 machine\n");
 249             exit(1);
 250         }
 251     }
 252     pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
 253     pci_bus = pci_pmac_init(pic);
 254     /* init basic PC hardware */
 255     pci_vga_init(pci_bus, ds, phys_ram_base + ram_size,
 256                  ram_size, vga_ram_size,
 257                  vga_bios_offset, vga_bios_size);
 258
 259     /* XXX: suppress that */
 260     dummy_irq = i8259_init(NULL);
 261
 262     /* XXX: use Mac Serial port */
 263     serial_init(0x3f8, dummy_irq[4], serial_hds[0]);
 264     for(i = 0; i < nb_nics; i++) {
 265         if (!nd_table[i].model)
 266             nd_table[i].model = "ne2k_pci";
 267         pci_nic_init(pci_bus, &nd_table[i], -1);
 268     }
 269 #if 1
 270     ide_mem_index[0] = pmac_ide_init(&bs_table[0], pic[0x13]);
 271     ide_mem_index[1] = pmac_ide_init(&bs_table[2], pic[0x14]);
 272 #else
 273     pci_cmd646_ide_init(pci_bus, &bs_table[0], 0);
 274 #endif
 275     /* cuda also initialize ADB */
 276     cuda_init(&cuda_mem_index, pic[0x19]);
 277
 278     adb_kbd_init(&adb_bus);
 279     adb_mouse_init(&adb_bus);
 280
 281     dbdma_init(&dbdma_mem_index);
 282
 283     macio_init(pci_bus, 0x0022, 0, pic_mem_index, dbdma_mem_index,
 284                cuda_mem_index, NULL, 2, ide_mem_index);
 285
 286     if (usb_enabled) {
 287         usb_ohci_init_pci(pci_bus, 3, -1);
 288     }
 289
 290     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
 291         graphic_depth = 15;
 292 #if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */
 293     /* The NewWorld NVRAM is not located in the MacIO device */
 294     nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
 295     pmac_format_nvram_partition(nvr, 0x2000);
 296     macio_nvram_map(nvr, 0xFFF04000);
 297     nvram.opaque = nvr;
 298     nvram.read_fn = &macio_nvram_read;
 299     nvram.write_fn = &macio_nvram_write;
 300 #else
 301     m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
 302     nvram.opaque = m48t59;
 303     nvram.read_fn = &m48t59_read;
 304     nvram.write_fn = &m48t59_write;
 305 #endif
 306     PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "MAC99", ram_size,
 307                          ppc_boot_device, kernel_base, kernel_size,
 308                          kernel_cmdline,
 309                          initrd_base, initrd_size,
 310                          /* XXX: need an option to load a NVRAM image */
 311                          0,
 312                          graphic_width, graphic_height, graphic_depth);
 313     /* No PCI init: the BIOS will do it */
 314
 315     /* Special port to get debug messages from Open-Firmware */
 316     register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
 317  }
 318
 319 QEMUMachine core99_machine = {
 320     "mac99",
 321     "Mac99 based PowerMAC",
 322     ppc_core99_init,
 323 };