gdbstub.c

   1 /*
   2  * gdb server stub
   3  *
   4  * Copyright (c) 2003-2005 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #include "config.h"
  21 #ifdef CONFIG_USER_ONLY
  22 #include <stdlib.h>
  23 #include <stdio.h>
  24 #include <stdarg.h>
  25 #include <string.h>
  26 #include <errno.h>
  27 #include <unistd.h>
  28 #include <fcntl.h>
  29
  30 #include "qemu.h"
  31 #else
  32 #include "vl.h"
  33 #endif
  34
  35 #include "qemu_socket.h"
  36 #ifdef _WIN32
  37 /* XXX: these constants may be independent of the host ones even for Unix */
  38 #ifndef SIGTRAP
  39 #define SIGTRAP 5
  40 #endif
  41 #ifndef SIGINT
  42 #define SIGINT 2
  43 #endif
  44 #else
  45 #include <signal.h>
  46 #endif
  47
  48 //#define DEBUG_GDB
  49
  50 enum RSState {
  51     RS_IDLE,
  52     RS_GETLINE,
  53     RS_CHKSUM1,
  54     RS_CHKSUM2,
  55     RS_SYSCALL,
  56 };
  57 typedef struct GDBState {
  58     CPUState *env; /* current CPU */
  59     enum RSState state; /* parsing state */
  60     char line_buf[4096];
  61     int line_buf_index;
  62     int line_csum;
  63     char last_packet[4100];
  64     int last_packet_len;
  65 #ifdef CONFIG_USER_ONLY
  66     int fd;
  67     int running_state;
  68 #else
  69     CharDriverState *chr;
  70 #endif
  71 } GDBState;
  72
  73 #ifdef CONFIG_USER_ONLY
  74 /* XXX: This is not thread safe.  Do we care?  */
  75 static int gdbserver_fd = -1;
  76
  77 /* XXX: remove this hack.  */
  78 static GDBState gdbserver_state;
  79
  80 static int get_char(GDBState *s)
  81 {
  82     uint8_t ch;
  83     int ret;
  84
  85     for(;;) {
  86         ret = recv(s->fd, &ch, 1, 0);
  87         if (ret < 0) {
  88             if (errno != EINTR && errno != EAGAIN)
  89                 return -1;
  90         } else if (ret == 0) {
  91             return -1;
  92         } else {
  93             break;
  94         }
  95     }
  96     return ch;
  97 }
  98 #endif
  99
 100 /* GDB stub state for use by semihosting syscalls.  */
 101 static GDBState *gdb_syscall_state;
 102 static gdb_syscall_complete_cb gdb_current_syscall_cb;
 103
 104 enum {
 105     GDB_SYS_UNKNOWN,
 106     GDB_SYS_ENABLED,
 107     GDB_SYS_DISABLED,
 108 } gdb_syscall_mode;
 109
 110 /* If gdb is connected when the first semihosting syscall occurs then use
 111    remote gdb syscalls.  Otherwise use native file IO.  */
 112 int use_gdb_syscalls(void)
 113 {
 114     if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
 115         gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
 116                                               : GDB_SYS_DISABLED);
 117     }
 118     return gdb_syscall_mode == GDB_SYS_ENABLED;
 119 }
 120
 121 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
 122 {
 123 #ifdef CONFIG_USER_ONLY
 124     int ret;
 125
 126     while (len > 0) {
 127         ret = send(s->fd, buf, len, 0);
 128         if (ret < 0) {
 129             if (errno != EINTR && errno != EAGAIN)
 130                 return;
 131         } else {
 132             buf += ret;
 133             len -= ret;
 134         }
 135     }
 136 #else
 137     qemu_chr_write(s->chr, buf, len);
 138 #endif
 139 }
 140
 141 static inline int fromhex(int v)
 142 {
 143     if (v >= '0' && v <= '9')
 144         return v - '0';
 145     else if (v >= 'A' && v <= 'F')
 146         return v - 'A' + 10;
 147     else if (v >= 'a' && v <= 'f')
 148         return v - 'a' + 10;
 149     else
 150         return 0;
 151 }
 152
 153 static inline int tohex(int v)
 154 {
 155     if (v < 10)
 156         return v + '0';
 157     else
 158         return v - 10 + 'a';
 159 }
 160
 161 static void memtohex(char *buf, const uint8_t *mem, int len)
 162 {
 163     int i, c;
 164     char *q;
 165     q = buf;
 166     for(i = 0; i < len; i++) {
 167         c = mem[i];
 168         *q++ = tohex(c >> 4);
 169         *q++ = tohex(c & 0xf);
 170     }
 171     *q = '\0';
 172 }
 173
 174 static void hextomem(uint8_t *mem, const char *buf, int len)
 175 {
 176     int i;
 177
 178     for(i = 0; i < len; i++) {
 179         mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
 180         buf += 2;
 181     }
 182 }
 183
 184 /* return -1 if error, 0 if OK */
 185 static int put_packet(GDBState *s, char *buf)
 186 {
 187     int len, csum, i;
 188     char *p;
 189
 190 #ifdef DEBUG_GDB
 191     printf("reply='%s'\n", buf);
 192 #endif
 193
 194     for(;;) {
 195         p = s->last_packet;
 196         *(p++) = '$';
 197         len = strlen(buf);
 198         memcpy(p, buf, len);
 199         p += len;
 200         csum = 0;
 201         for(i = 0; i < len; i++) {
 202             csum += buf[i];
 203         }
 204         *(p++) = '#';
 205         *(p++) = tohex((csum >> 4) & 0xf);
 206         *(p++) = tohex((csum) & 0xf);
 207
 208         s->last_packet_len = p - s->last_packet;
 209         put_buffer(s, s->last_packet, s->last_packet_len);
 210
 211 #ifdef CONFIG_USER_ONLY
 212         i = get_char(s);
 213         if (i < 0)
 214             return -1;
 215         if (i == '+')
 216             break;
 217 #else
 218         break;
 219 #endif
 220     }
 221     return 0;
 222 }
 223
 224 #if defined(TARGET_I386)
 225
 226 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 227 {
 228     uint32_t *registers = (uint32_t *)mem_buf;
 229     int i, fpus;
 230
 231     for(i = 0; i < 8; i++) {
 232         registers[i] = env->regs[i];
 233     }
 234     registers[8] = env->eip;
 235     registers[9] = env->eflags;
 236     registers[10] = env->segs[R_CS].selector;
 237     registers[11] = env->segs[R_SS].selector;
 238     registers[12] = env->segs[R_DS].selector;
 239     registers[13] = env->segs[R_ES].selector;
 240     registers[14] = env->segs[R_FS].selector;
 241     registers[15] = env->segs[R_GS].selector;
 242     /* XXX: convert floats */
 243     for(i = 0; i < 8; i++) {
 244         memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
 245     }
 246     registers[36] = env->fpuc;
 247     fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
 248     registers[37] = fpus;
 249     registers[38] = 0; /* XXX: convert tags */
 250     registers[39] = 0; /* fiseg */
 251     registers[40] = 0; /* fioff */
 252     registers[41] = 0; /* foseg */
 253     registers[42] = 0; /* fooff */
 254     registers[43] = 0; /* fop */
 255
 256     for(i = 0; i < 16; i++)
 257         tswapls(&registers[i]);
 258     for(i = 36; i < 44; i++)
 259         tswapls(&registers[i]);
 260     return 44 * 4;
 261 }
 262
 263 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 264 {
 265     uint32_t *registers = (uint32_t *)mem_buf;
 266     int i;
 267
 268     for(i = 0; i < 8; i++) {
 269         env->regs[i] = tswapl(registers[i]);
 270     }
 271     env->eip = tswapl(registers[8]);
 272     env->eflags = tswapl(registers[9]);
 273 #if defined(CONFIG_USER_ONLY)
 274 #define LOAD_SEG(index, sreg)\
 275             if (tswapl(registers[index]) != env->segs[sreg].selector)\
 276                 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
 277             LOAD_SEG(10, R_CS);
 278             LOAD_SEG(11, R_SS);
 279             LOAD_SEG(12, R_DS);
 280             LOAD_SEG(13, R_ES);
 281             LOAD_SEG(14, R_FS);
 282             LOAD_SEG(15, R_GS);
 283 #endif
 284 }
 285
 286 #elif defined (TARGET_PPC)
 287 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 288 {
 289     uint32_t *registers = (uint32_t *)mem_buf, tmp;
 290     int i;
 291
 292     /* fill in gprs */
 293     for(i = 0; i < 32; i++) {
 294         registers[i] = tswapl(env->gpr[i]);
 295     }
 296     /* fill in fprs */
 297     for (i = 0; i < 32; i++) {
 298         registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
 299         registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
 300     }
 301     /* nip, msr, ccr, lnk, ctr, xer, mq */
 302     registers[96] = tswapl(env->nip);
 303     registers[97] = tswapl(do_load_msr(env));
 304     tmp = 0;
 305     for (i = 0; i < 8; i++)
 306         tmp |= env->crf[i] << (32 - ((i + 1) * 4));
 307     registers[98] = tswapl(tmp);
 308     registers[99] = tswapl(env->lr);
 309     registers[100] = tswapl(env->ctr);
 310     registers[101] = tswapl(ppc_load_xer(env));
 311     registers[102] = 0;
 312
 313     return 103 * 4;
 314 }
 315
 316 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 317 {
 318     uint32_t *registers = (uint32_t *)mem_buf;
 319     int i;
 320
 321     /* fill in gprs */
 322     for (i = 0; i < 32; i++) {
 323         env->gpr[i] = tswapl(registers[i]);
 324     }
 325     /* fill in fprs */
 326     for (i = 0; i < 32; i++) {
 327         *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
 328         *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
 329     }
 330     /* nip, msr, ccr, lnk, ctr, xer, mq */
 331     env->nip = tswapl(registers[96]);
 332     do_store_msr(env, tswapl(registers[97]));
 333     registers[98] = tswapl(registers[98]);
 334     for (i = 0; i < 8; i++)
 335         env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
 336     env->lr = tswapl(registers[99]);
 337     env->ctr = tswapl(registers[100]);
 338     ppc_store_xer(env, tswapl(registers[101]));
 339 }
 340 #elif defined (TARGET_SPARC)
 341 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 342 {
 343     target_ulong *registers = (target_ulong *)mem_buf;
 344     int i;
 345
 346     /* fill in g0..g7 */
 347     for(i = 0; i < 8; i++) {
 348         registers[i] = tswapl(env->gregs[i]);
 349     }
 350     /* fill in register window */
 351     for(i = 0; i < 24; i++) {
 352         registers[i + 8] = tswapl(env->regwptr[i]);
 353     }
 354 #ifndef TARGET_SPARC64
 355     /* fill in fprs */
 356     for (i = 0; i < 32; i++) {
 357         registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
 358     }
 359     /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 360     registers[64] = tswapl(env->y);
 361     {
 362         target_ulong tmp;
 363
 364         tmp = GET_PSR(env);
 365         registers[65] = tswapl(tmp);
 366     }
 367     registers[66] = tswapl(env->wim);
 368     registers[67] = tswapl(env->tbr);
 369     registers[68] = tswapl(env->pc);
 370     registers[69] = tswapl(env->npc);
 371     registers[70] = tswapl(env->fsr);
 372     registers[71] = 0; /* csr */
 373     registers[72] = 0;
 374     return 73 * sizeof(target_ulong);
 375 #else
 376     /* fill in fprs */
 377     for (i = 0; i < 64; i += 2) {
 378         uint64_t tmp;
 379
 380         tmp = ((uint64_t)*(uint32_t *)&env->fpr[i]) << 32;
 381         tmp |= *(uint32_t *)&env->fpr[i + 1];
 382         registers[i / 2 + 32] = tswap64(tmp);
 383     }
 384     registers[64] = tswapl(env->pc);
 385     registers[65] = tswapl(env->npc);
 386     registers[66] = tswapl(((uint64_t)GET_CCR(env) << 32) |
 387                            ((env->asi & 0xff) << 24) |
 388                            ((env->pstate & 0xfff) << 8) |
 389                            GET_CWP64(env));
 390     registers[67] = tswapl(env->fsr);
 391     registers[68] = tswapl(env->fprs);
 392     registers[69] = tswapl(env->y);
 393     return 70 * sizeof(target_ulong);
 394 #endif
 395 }
 396
 397 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 398 {
 399     target_ulong *registers = (target_ulong *)mem_buf;
 400     int i;
 401
 402     /* fill in g0..g7 */
 403     for(i = 0; i < 7; i++) {
 404         env->gregs[i] = tswapl(registers[i]);
 405     }
 406     /* fill in register window */
 407     for(i = 0; i < 24; i++) {
 408         env->regwptr[i] = tswapl(registers[i + 8]);
 409     }
 410 #ifndef TARGET_SPARC64
 411     /* fill in fprs */
 412     for (i = 0; i < 32; i++) {
 413         *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
 414     }
 415     /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 416     env->y = tswapl(registers[64]);
 417     PUT_PSR(env, tswapl(registers[65]));
 418     env->wim = tswapl(registers[66]);
 419     env->tbr = tswapl(registers[67]);
 420     env->pc = tswapl(registers[68]);
 421     env->npc = tswapl(registers[69]);
 422     env->fsr = tswapl(registers[70]);
 423 #else
 424     for (i = 0; i < 64; i += 2) {
 425         uint64_t tmp;
 426
 427         tmp = tswap64(registers[i / 2 + 32]);
 428         *((uint32_t *)&env->fpr[i]) = tmp >> 32;
 429         *((uint32_t *)&env->fpr[i + 1]) = tmp & 0xffffffff;
 430     }
 431     env->pc = tswapl(registers[64]);
 432     env->npc = tswapl(registers[65]);
 433     {
 434         uint64_t tmp = tswapl(registers[66]);
 435
 436         PUT_CCR(env, tmp >> 32);
 437         env->asi = (tmp >> 24) & 0xff;
 438         env->pstate = (tmp >> 8) & 0xfff;
 439         PUT_CWP64(env, tmp & 0xff);
 440     }
 441     env->fsr = tswapl(registers[67]);
 442     env->fprs = tswapl(registers[68]);
 443     env->y = tswapl(registers[69]);
 444 #endif
 445 }
 446 #elif defined (TARGET_ARM)
 447 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 448 {
 449     int i;
 450     uint8_t *ptr;
 451
 452     ptr = mem_buf;
 453     /* 16 core integer registers (4 bytes each).  */
 454     for (i = 0; i < 16; i++)
 455       {
 456         *(uint32_t *)ptr = tswapl(env->regs[i]);
 457         ptr += 4;
 458       }
 459     /* 8 FPA registers (12 bytes each), FPS (4 bytes).
 460        Not yet implemented.  */
 461     memset (ptr, 0, 8 * 12 + 4);
 462     ptr += 8 * 12 + 4;
 463     /* CPSR (4 bytes).  */
 464     *(uint32_t *)ptr = tswapl (cpsr_read(env));
 465     ptr += 4;
 466
 467     return ptr - mem_buf;
 468 }
 469
 470 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 471 {
 472     int i;
 473     uint8_t *ptr;
 474
 475     ptr = mem_buf;
 476     /* Core integer registers.  */
 477     for (i = 0; i < 16; i++)
 478       {
 479         env->regs[i] = tswapl(*(uint32_t *)ptr);
 480         ptr += 4;
 481       }
 482     /* Ignore FPA regs and scr.  */
 483     ptr += 8 * 12 + 4;
 484     cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
 485 }
 486 #elif defined (TARGET_M68K)
 487 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 488 {
 489     int i;
 490     uint8_t *ptr;
 491     CPU_DoubleU u;
 492
 493     ptr = mem_buf;
 494     /* D0-D7 */
 495     for (i = 0; i < 8; i++) {
 496         *(uint32_t *)ptr = tswapl(env->dregs[i]);
 497         ptr += 4;
 498     }
 499     /* A0-A7 */
 500     for (i = 0; i < 8; i++) {
 501         *(uint32_t *)ptr = tswapl(env->aregs[i]);
 502         ptr += 4;
 503     }
 504     *(uint32_t *)ptr = tswapl(env->sr);
 505     ptr += 4;
 506     *(uint32_t *)ptr = tswapl(env->pc);
 507     ptr += 4;
 508     /* F0-F7.  The 68881/68040 have 12-bit extended precision registers.
 509        ColdFire has 8-bit double precision registers.  */
 510     for (i = 0; i < 8; i++) {
 511         u.d = env->fregs[i];
 512         *(uint32_t *)ptr = tswap32(u.l.upper);
 513         *(uint32_t *)ptr = tswap32(u.l.lower);
 514     }
 515     /* FP control regs (not implemented).  */
 516     memset (ptr, 0, 3 * 4);
 517     ptr += 3 * 4;
 518
 519     return ptr - mem_buf;
 520 }
 521
 522 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 523 {
 524     int i;
 525     uint8_t *ptr;
 526     CPU_DoubleU u;
 527
 528     ptr = mem_buf;
 529     /* D0-D7 */
 530     for (i = 0; i < 8; i++) {
 531         env->dregs[i] = tswapl(*(uint32_t *)ptr);
 532         ptr += 4;
 533     }
 534     /* A0-A7 */
 535     for (i = 0; i < 8; i++) {
 536         env->aregs[i] = tswapl(*(uint32_t *)ptr);
 537         ptr += 4;
 538     }
 539     env->sr = tswapl(*(uint32_t *)ptr);
 540     ptr += 4;
 541     env->pc = tswapl(*(uint32_t *)ptr);
 542     ptr += 4;
 543     /* F0-F7.  The 68881/68040 have 12-bit extended precision registers.
 544        ColdFire has 8-bit double precision registers.  */
 545     for (i = 0; i < 8; i++) {
 546         u.l.upper = tswap32(*(uint32_t *)ptr);
 547         u.l.lower = tswap32(*(uint32_t *)ptr);
 548         env->fregs[i] = u.d;
 549     }
 550     /* FP control regs (not implemented).  */
 551     ptr += 3 * 4;
 552 }
 553 #elif defined (TARGET_MIPS)
 554 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 555 {
 556     int i;
 557     uint8_t *ptr;
 558
 559     ptr = mem_buf;
 560     for (i = 0; i < 32; i++)
 561       {
 562         *(target_ulong *)ptr = tswapl(env->gpr[i][env->current_tc]);
 563         ptr += sizeof(target_ulong);
 564       }
 565
 566     *(target_ulong *)ptr = tswapl(env->CP0_Status);
 567     ptr += sizeof(target_ulong);
 568
 569     *(target_ulong *)ptr = tswapl(env->LO[0][env->current_tc]);
 570     ptr += sizeof(target_ulong);
 571
 572     *(target_ulong *)ptr = tswapl(env->HI[0][env->current_tc]);
 573     ptr += sizeof(target_ulong);
 574
 575     *(target_ulong *)ptr = tswapl(env->CP0_BadVAddr);
 576     ptr += sizeof(target_ulong);
 577
 578     *(target_ulong *)ptr = tswapl(env->CP0_Cause);
 579     ptr += sizeof(target_ulong);
 580
 581     *(target_ulong *)ptr = tswapl(env->PC[env->current_tc]);
 582     ptr += sizeof(target_ulong);
 583
 584     if (env->CP0_Config1 & (1 << CP0C1_FP))
 585       {
 586         for (i = 0; i < 32; i++)
 587           {
 588             *(target_ulong *)ptr = tswapl(env->fpu->fpr[i].fs[FP_ENDIAN_IDX]);
 589             ptr += sizeof(target_ulong);
 590           }
 591
 592         *(target_ulong *)ptr = tswapl(env->fpu->fcr31);
 593         ptr += sizeof(target_ulong);
 594
 595         *(target_ulong *)ptr = tswapl(env->fpu->fcr0);
 596         ptr += sizeof(target_ulong);
 597       }
 598
 599     /* 32 FP registers, fsr, fir, fp.  Not yet implemented.  */
 600     /* what's 'fp' mean here?  */
 601
 602     return ptr - mem_buf;
 603 }
 604
 605 /* convert MIPS rounding mode in FCR31 to IEEE library */
 606 static unsigned int ieee_rm[] =
 607   {
 608     float_round_nearest_even,
 609     float_round_to_zero,
 610     float_round_up,
 611     float_round_down
 612   };
 613 #define RESTORE_ROUNDING_MODE \
 614     set_float_rounding_mode(ieee_rm[env->fpu->fcr31 & 3], &env->fpu->fp_status)
 615
 616 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 617 {
 618     int i;
 619     uint8_t *ptr;
 620
 621     ptr = mem_buf;
 622     for (i = 0; i < 32; i++)
 623       {
 624         env->gpr[i][env->current_tc] = tswapl(*(target_ulong *)ptr);
 625         ptr += sizeof(target_ulong);
 626       }
 627
 628     env->CP0_Status = tswapl(*(target_ulong *)ptr);
 629     ptr += sizeof(target_ulong);
 630
 631     env->LO[0][env->current_tc] = tswapl(*(target_ulong *)ptr);
 632     ptr += sizeof(target_ulong);
 633
 634     env->HI[0][env->current_tc] = tswapl(*(target_ulong *)ptr);
 635     ptr += sizeof(target_ulong);
 636
 637     env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr);
 638     ptr += sizeof(target_ulong);
 639
 640     env->CP0_Cause = tswapl(*(target_ulong *)ptr);
 641     ptr += sizeof(target_ulong);
 642
 643     env->PC[env->current_tc] = tswapl(*(target_ulong *)ptr);
 644     ptr += sizeof(target_ulong);
 645
 646     if (env->CP0_Config1 & (1 << CP0C1_FP))
 647       {
 648         for (i = 0; i < 32; i++)
 649           {
 650             env->fpu->fpr[i].fs[FP_ENDIAN_IDX] = tswapl(*(target_ulong *)ptr);
 651             ptr += sizeof(target_ulong);
 652           }
 653
 654         env->fpu->fcr31 = tswapl(*(target_ulong *)ptr) & 0x0183FFFF;
 655         ptr += sizeof(target_ulong);
 656
 657         env->fpu->fcr0 = tswapl(*(target_ulong *)ptr);
 658         ptr += sizeof(target_ulong);
 659
 660         /* set rounding mode */
 661         RESTORE_ROUNDING_MODE;
 662
 663 #ifndef CONFIG_SOFTFLOAT
 664         /* no floating point exception for native float */
 665         SET_FP_ENABLE(env->fcr31, 0);
 666 #endif
 667       }
 668 }
 669 #elif defined (TARGET_SH4)
 670
 671 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
 672
 673 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 674 {
 675   uint32_t *ptr = (uint32_t *)mem_buf;
 676   int i;
 677
 678 #define SAVE(x) *ptr++=tswapl(x)
 679   if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
 680       for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
 681   } else {
 682       for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
 683   }
 684   for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
 685   SAVE (env->pc);
 686   SAVE (env->pr);
 687   SAVE (env->gbr);
 688   SAVE (env->vbr);
 689   SAVE (env->mach);
 690   SAVE (env->macl);
 691   SAVE (env->sr);
 692   SAVE (env->fpul);
 693   SAVE (env->fpscr);
 694   for (i = 0; i < 16; i++)
 695       SAVE(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
 696   SAVE (env->ssr);
 697   SAVE (env->spc);
 698   for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
 699   for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
 700   return ((uint8_t *)ptr - mem_buf);
 701 }
 702
 703 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 704 {
 705   uint32_t *ptr = (uint32_t *)mem_buf;
 706   int i;
 707
 708 #define LOAD(x) (x)=*ptr++;
 709   if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
 710       for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
 711   } else {
 712       for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
 713   }
 714   for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
 715   LOAD (env->pc);
 716   LOAD (env->pr);
 717   LOAD (env->gbr);
 718   LOAD (env->vbr);
 719   LOAD (env->mach);
 720   LOAD (env->macl);
 721   LOAD (env->sr);
 722   LOAD (env->fpul);
 723   LOAD (env->fpscr);
 724   for (i = 0; i < 16; i++)
 725       LOAD(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
 726   LOAD (env->ssr);
 727   LOAD (env->spc);
 728   for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
 729   for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
 730 }
 731 #elif defined (TARGET_CRIS)
 732
 733 static int cris_save_32 (unsigned char *d, uint32_t value)
 734 {
 735         *d++ = (value);
 736         *d++ = (value >>= 8);
 737         *d++ = (value >>= 8);
 738         *d++ = (value >>= 8);
 739         return 4;
 740 }
 741 static int cris_save_16 (unsigned char *d, uint32_t value)
 742 {
 743         *d++ = (value);
 744         *d++ = (value >>= 8);
 745         return 2;
 746 }
 747 static int cris_save_8 (unsigned char *d, uint32_t value)
 748 {
 749         *d++ = (value);
 750         return 1;
 751 }
 752
 753 /* FIXME: this will bug on archs not supporting unaligned word accesses.  */
 754 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 755 {
 756   uint8_t *ptr = mem_buf;
 757   uint8_t srs;
 758   int i;
 759
 760   for (i = 0; i < 16; i++)
 761           ptr += cris_save_32 (ptr, env->regs[i]);
 762
 763   srs = env->pregs[SR_SRS];
 764
 765   ptr += cris_save_8 (ptr, env->pregs[0]);
 766   ptr += cris_save_8 (ptr, env->pregs[1]);
 767   ptr += cris_save_32 (ptr, env->pregs[2]);
 768   ptr += cris_save_8 (ptr, srs);
 769   ptr += cris_save_16 (ptr, env->pregs[4]);
 770
 771   for (i = 5; i < 16; i++)
 772           ptr += cris_save_32 (ptr, env->pregs[i]);
 773
 774   ptr += cris_save_32 (ptr, env->pc);
 775
 776   for (i = 0; i < 16; i++)
 777           ptr += cris_save_32 (ptr, env->sregs[srs][i]);
 778
 779   return ((uint8_t *)ptr - mem_buf);
 780 }
 781
 782 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 783 {
 784   uint32_t *ptr = (uint32_t *)mem_buf;
 785   int i;
 786
 787 #define LOAD(x) (x)=*ptr++;
 788   for (i = 0; i < 16; i++) LOAD(env->regs[i]);
 789   LOAD (env->pc);
 790 }
 791 #else
 792 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
 793 {
 794     return 0;
 795 }
 796
 797 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
 798 {
 799 }
 800
 801 #endif
 802
 803 static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
 804 {
 805     const char *p;
 806     int ch, reg_size, type;
 807     char buf[4096];
 808     uint8_t mem_buf[4096];
 809     uint32_t *registers;
 810     target_ulong addr, len;
 811
 812 #ifdef DEBUG_GDB
 813     printf("command='%s'\n", line_buf);
 814 #endif
 815     p = line_buf;
 816     ch = *p++;
 817     switch(ch) {
 818     case '?':
 819         /* TODO: Make this return the correct value for user-mode.  */
 820         snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
 821         put_packet(s, buf);
 822         break;
 823     case 'c':
 824         if (*p != '\0') {
 825             addr = strtoull(p, (char **)&p, 16);
 826 #if defined(TARGET_I386)
 827             env->eip = addr;
 828 #elif defined (TARGET_PPC)
 829             env->nip = addr;
 830 #elif defined (TARGET_SPARC)
 831             env->pc = addr;
 832             env->npc = addr + 4;
 833 #elif defined (TARGET_ARM)
 834             env->regs[15] = addr;
 835 #elif defined (TARGET_SH4)
 836             env->pc = addr;
 837 #elif defined (TARGET_MIPS)
 838             env->PC[env->current_tc] = addr;
 839 #elif defined (TARGET_CRIS)
 840             env->pc = addr;
 841 #endif
 842         }
 843 #ifdef CONFIG_USER_ONLY
 844         s->running_state = 1;
 845 #else
 846         vm_start();
 847 #endif
 848         return RS_IDLE;
 849     case 's':
 850         if (*p != '\0') {
 851             addr = strtoull(p, (char **)&p, 16);
 852 #if defined(TARGET_I386)
 853             env->eip = addr;
 854 #elif defined (TARGET_PPC)
 855             env->nip = addr;
 856 #elif defined (TARGET_SPARC)
 857             env->pc = addr;
 858             env->npc = addr + 4;
 859 #elif defined (TARGET_ARM)
 860             env->regs[15] = addr;
 861 #elif defined (TARGET_SH4)
 862             env->pc = addr;
 863 #elif defined (TARGET_MIPS)
 864             env->PC[env->current_tc] = addr;
 865 #elif defined (TARGET_CRIS)
 866             env->pc = addr;
 867 #endif
 868         }
 869         cpu_single_step(env, 1);
 870 #ifdef CONFIG_USER_ONLY
 871         s->running_state = 1;
 872 #else
 873         vm_start();
 874 #endif
 875         return RS_IDLE;
 876     case 'F':
 877         {
 878             target_ulong ret;
 879             target_ulong err;
 880
 881             ret = strtoull(p, (char **)&p, 16);
 882             if (*p == ',') {
 883                 p++;
 884                 err = strtoull(p, (char **)&p, 16);
 885             } else {
 886                 err = 0;
 887             }
 888             if (*p == ',')
 889                 p++;
 890             type = *p;
 891             if (gdb_current_syscall_cb)
 892                 gdb_current_syscall_cb(s->env, ret, err);
 893             if (type == 'C') {
 894                 put_packet(s, "T02");
 895             } else {
 896 #ifdef CONFIG_USER_ONLY
 897                 s->running_state = 1;
 898 #else
 899                 vm_start();
 900 #endif
 901             }
 902         }
 903         break;
 904     case 'g':
 905         reg_size = cpu_gdb_read_registers(env, mem_buf);
 906         memtohex(buf, mem_buf, reg_size);
 907         put_packet(s, buf);
 908         break;
 909     case 'G':
 910         registers = (void *)mem_buf;
 911         len = strlen(p) / 2;
 912         hextomem((uint8_t *)registers, p, len);
 913         cpu_gdb_write_registers(env, mem_buf, len);
 914         put_packet(s, "OK");
 915         break;
 916     case 'm':
 917         addr = strtoull(p, (char **)&p, 16);
 918         if (*p == ',')
 919             p++;
 920         len = strtoull(p, NULL, 16);
 921         if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
 922             put_packet (s, "E14");
 923         } else {
 924             memtohex(buf, mem_buf, len);
 925             put_packet(s, buf);
 926         }
 927         break;
 928     case 'M':
 929         addr = strtoull(p, (char **)&p, 16);
 930         if (*p == ',')
 931             p++;
 932         len = strtoull(p, (char **)&p, 16);
 933         if (*p == ':')
 934             p++;
 935         hextomem(mem_buf, p, len);
 936         if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
 937             put_packet(s, "E14");
 938         else
 939             put_packet(s, "OK");
 940         break;
 941     case 'Z':
 942         type = strtoul(p, (char **)&p, 16);
 943         if (*p == ',')
 944             p++;
 945         addr = strtoull(p, (char **)&p, 16);
 946         if (*p == ',')
 947             p++;
 948         len = strtoull(p, (char **)&p, 16);
 949         if (type == 0 || type == 1) {
 950             if (cpu_breakpoint_insert(env, addr) < 0)
 951                 goto breakpoint_error;
 952             put_packet(s, "OK");
 953 #ifndef CONFIG_USER_ONLY
 954         } else if (type == 2) {
 955             if (cpu_watchpoint_insert(env, addr) < 0)
 956                 goto breakpoint_error;
 957             put_packet(s, "OK");
 958 #endif
 959         } else {
 960         breakpoint_error:
 961             put_packet(s, "E22");
 962         }
 963         break;
 964     case 'z':
 965         type = strtoul(p, (char **)&p, 16);
 966         if (*p == ',')
 967             p++;
 968         addr = strtoull(p, (char **)&p, 16);
 969         if (*p == ',')
 970             p++;
 971         len = strtoull(p, (char **)&p, 16);
 972         if (type == 0 || type == 1) {
 973             cpu_breakpoint_remove(env, addr);
 974             put_packet(s, "OK");
 975 #ifndef CONFIG_USER_ONLY
 976         } else if (type == 2) {
 977             cpu_watchpoint_remove(env, addr);
 978             put_packet(s, "OK");
 979 #endif
 980         } else {
 981             goto breakpoint_error;
 982         }
 983         break;
 984 #ifdef CONFIG_LINUX_USER
 985     case 'q':
 986         if (strncmp(p, "Offsets", 7) == 0) {
 987             TaskState *ts = env->opaque;
 988
 989             sprintf(buf,
 990                     "Text=" TARGET_FMT_lx ";Data=" TARGET_FMT_lx ";Bss=" TARGET_FMT_lx,
 991                     ts->info->code_offset,
 992                     ts->info->data_offset,
 993                     ts->info->data_offset);
 994             put_packet(s, buf);
 995             break;
 996         }
 997         /* Fall through.  */
 998 #endif
 999     default:
1000         //        unknown_command:
1001         /* put empty packet */
1002         buf[0] = '\0';
1003         put_packet(s, buf);
1004         break;
1005     }
1006     return RS_IDLE;
1007 }
1008
1009 extern void tb_flush(CPUState *env);
1010
1011 #ifndef CONFIG_USER_ONLY
1012 static void gdb_vm_stopped(void *opaque, int reason)
1013 {
1014     GDBState *s = opaque;
1015     char buf[256];
1016     int ret;
1017
1018     if (s->state == RS_SYSCALL)
1019         return;
1020
1021     /* disable single step if it was enable */
1022     cpu_single_step(s->env, 0);
1023
1024     if (reason == EXCP_DEBUG) {
1025         if (s->env->watchpoint_hit) {
1026             snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";",
1027                      SIGTRAP,
1028                      s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr);
1029             put_packet(s, buf);
1030             s->env->watchpoint_hit = 0;
1031             return;
1032         }
1033         tb_flush(s->env);
1034         ret = SIGTRAP;
1035     } else if (reason == EXCP_INTERRUPT) {
1036         ret = SIGINT;
1037     } else {
1038         ret = 0;
1039     }
1040     snprintf(buf, sizeof(buf), "S%02x", ret);
1041     put_packet(s, buf);
1042 }
1043 #endif
1044
1045 /* Send a gdb syscall request.
1046    This accepts limited printf-style format specifiers, specifically:
1047     %x  - target_ulong argument printed in hex.
1048     %lx - 64-bit argument printed in hex.
1049     %s  - string pointer (target_ulong) and length (int) pair.  */
1050 void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...)
1051 {
1052     va_list va;
1053     char buf[256];
1054     char *p;
1055     target_ulong addr;
1056     uint64_t i64;
1057     GDBState *s;
1058
1059     s = gdb_syscall_state;
1060     if (!s)
1061         return;
1062     gdb_current_syscall_cb = cb;
1063     s->state = RS_SYSCALL;
1064 #ifndef CONFIG_USER_ONLY
1065     vm_stop(EXCP_DEBUG);
1066 #endif
1067     s->state = RS_IDLE;
1068     va_start(va, fmt);
1069     p = buf;
1070     *(p++) = 'F';
1071     while (*fmt) {
1072         if (*fmt == '%') {
1073             fmt++;
1074             switch (*fmt++) {
1075             case 'x':
1076                 addr = va_arg(va, target_ulong);
1077                 p += sprintf(p, TARGET_FMT_lx, addr);
1078                 break;
1079             case 'l':
1080                 if (*(fmt++) != 'x')
1081                     goto bad_format;
1082                 i64 = va_arg(va, uint64_t);
1083                 p += sprintf(p, "%" PRIx64, i64);
1084                 break;
1085             case 's':
1086                 addr = va_arg(va, target_ulong);
1087                 p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int));
1088                 break;
1089             default:
1090             bad_format:
1091                 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
1092                         fmt - 1);
1093                 break;
1094             }
1095         } else {
1096             *(p++) = *(fmt++);
1097         }
1098     }
1099     *p = 0;
1100     va_end(va);
1101     put_packet(s, buf);
1102 #ifdef CONFIG_USER_ONLY
1103     gdb_handlesig(s->env, 0);
1104 #else
1105     cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
1106 #endif
1107 }
1108
1109 static void gdb_read_byte(GDBState *s, int ch)
1110 {
1111     CPUState *env = s->env;
1112     int i, csum;
1113     char reply[1];
1114
1115 #ifndef CONFIG_USER_ONLY
1116     if (s->last_packet_len) {
1117         /* Waiting for a response to the last packet.  If we see the start
1118            of a new command then abandon the previous response.  */
1119         if (ch == '-') {
1120 #ifdef DEBUG_GDB
1121             printf("Got NACK, retransmitting\n");
1122 #endif
1123             put_buffer(s, s->last_packet, s->last_packet_len);
1124         }
1125 #ifdef DEBUG_GDB
1126         else if (ch == '+')
1127             printf("Got ACK\n");
1128         else
1129             printf("Got '%c' when expecting ACK/NACK\n", ch);
1130 #endif
1131         if (ch == '+' || ch == '$')
1132             s->last_packet_len = 0;
1133         if (ch != '$')
1134             return;
1135     }
1136     if (vm_running) {
1137         /* when the CPU is running, we cannot do anything except stop
1138            it when receiving a char */
1139         vm_stop(EXCP_INTERRUPT);
1140     } else
1141 #endif
1142     {
1143         switch(s->state) {
1144         case RS_IDLE:
1145             if (ch == '$') {
1146                 s->line_buf_index = 0;
1147                 s->state = RS_GETLINE;
1148             }
1149             break;
1150         case RS_GETLINE:
1151             if (ch == '#') {
1152             s->state = RS_CHKSUM1;
1153             } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1154                 s->state = RS_IDLE;
1155             } else {
1156             s->line_buf[s->line_buf_index++] = ch;
1157             }
1158             break;
1159         case RS_CHKSUM1:
1160             s->line_buf[s->line_buf_index] = '\0';
1161             s->line_csum = fromhex(ch) << 4;
1162             s->state = RS_CHKSUM2;
1163             break;
1164         case RS_CHKSUM2:
1165             s->line_csum |= fromhex(ch);
1166             csum = 0;
1167             for(i = 0; i < s->line_buf_index; i++) {
1168                 csum += s->line_buf[i];
1169             }
1170             if (s->line_csum != (csum & 0xff)) {
1171                 reply[0] = '-';
1172                 put_buffer(s, reply, 1);
1173                 s->state = RS_IDLE;
1174             } else {
1175                 reply[0] = '+';
1176                 put_buffer(s, reply, 1);
1177                 s->state = gdb_handle_packet(s, env, s->line_buf);
1178             }
1179             break;
1180         default:
1181             abort();
1182         }
1183     }
1184 }
1185
1186 #ifdef CONFIG_USER_ONLY
1187 int
1188 gdb_handlesig (CPUState *env, int sig)
1189 {
1190   GDBState *s;
1191   char buf[256];
1192   int n;
1193
1194   if (gdbserver_fd < 0)
1195     return sig;
1196
1197   s = &gdbserver_state;
1198
1199   /* disable single step if it was enabled */
1200   cpu_single_step(env, 0);
1201   tb_flush(env);
1202
1203   if (sig != 0)
1204     {
1205       snprintf(buf, sizeof(buf), "S%02x", sig);
1206       put_packet(s, buf);
1207     }
1208
1209   sig = 0;
1210   s->state = RS_IDLE;
1211   s->running_state = 0;
1212   while (s->running_state == 0) {
1213       n = read (s->fd, buf, 256);
1214       if (n > 0)
1215         {
1216           int i;
1217
1218           for (i = 0; i < n; i++)
1219             gdb_read_byte (s, buf[i]);
1220         }
1221       else if (n == 0 || errno != EAGAIN)
1222         {
1223           /* XXX: Connection closed.  Should probably wait for annother
1224              connection before continuing.  */
1225           return sig;
1226         }
1227   }
1228   return sig;
1229 }
1230
1231 /* Tell the remote gdb that the process has exited.  */
1232 void gdb_exit(CPUState *env, int code)
1233 {
1234   GDBState *s;
1235   char buf[4];
1236
1237   if (gdbserver_fd < 0)
1238     return;
1239
1240   s = &gdbserver_state;
1241
1242   snprintf(buf, sizeof(buf), "W%02x", code);
1243   put_packet(s, buf);
1244 }
1245
1246
1247 static void gdb_accept(void *opaque)
1248 {
1249     GDBState *s;
1250     struct sockaddr_in sockaddr;
1251     socklen_t len;
1252     int val, fd;
1253
1254     for(;;) {
1255         len = sizeof(sockaddr);
1256         fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1257         if (fd < 0 && errno != EINTR) {
1258             perror("accept");
1259             return;
1260         } else if (fd >= 0) {
1261             break;
1262         }
1263     }
1264
1265     /* set short latency */
1266     val = 1;
1267     setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
1268
1269     s = &gdbserver_state;
1270     memset (s, 0, sizeof (GDBState));
1271     s->env = first_cpu; /* XXX: allow to change CPU */
1272     s->fd = fd;
1273
1274     gdb_syscall_state = s;
1275
1276     fcntl(fd, F_SETFL, O_NONBLOCK);
1277 }
1278
1279 static int gdbserver_open(int port)
1280 {
1281     struct sockaddr_in sockaddr;
1282     int fd, val, ret;
1283
1284     fd = socket(PF_INET, SOCK_STREAM, 0);
1285     if (fd < 0) {
1286         perror("socket");
1287         return -1;
1288     }
1289
1290     /* allow fast reuse */
1291     val = 1;
1292     setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
1293
1294     sockaddr.sin_family = AF_INET;
1295     sockaddr.sin_port = htons(port);
1296     sockaddr.sin_addr.s_addr = 0;
1297     ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1298     if (ret < 0) {
1299         perror("bind");
1300         return -1;
1301     }
1302     ret = listen(fd, 0);
1303     if (ret < 0) {
1304         perror("listen");
1305         return -1;
1306     }
1307     return fd;
1308 }
1309
1310 int gdbserver_start(int port)
1311 {
1312     gdbserver_fd = gdbserver_open(port);
1313     if (gdbserver_fd < 0)
1314         return -1;
1315     /* accept connections */
1316     gdb_accept (NULL);
1317     return 0;
1318 }
1319 #else
1320 static int gdb_chr_can_receive(void *opaque)
1321 {
1322   return 1;
1323 }
1324
1325 static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
1326 {
1327     GDBState *s = opaque;
1328     int i;
1329
1330     for (i = 0; i < size; i++) {
1331         gdb_read_byte(s, buf[i]);
1332     }
1333 }
1334
1335 static void gdb_chr_event(void *opaque, int event)
1336 {
1337     switch (event) {
1338     case CHR_EVENT_RESET:
1339         vm_stop(EXCP_INTERRUPT);
1340         gdb_syscall_state = opaque;
1341         break;
1342     default:
1343         break;
1344     }
1345 }
1346
1347 int gdbserver_start(const char *port)
1348 {
1349     GDBState *s;
1350     char gdbstub_port_name[128];
1351     int port_num;
1352     char *p;
1353     CharDriverState *chr;
1354
1355     if (!port || !*port)
1356       return -1;
1357
1358     port_num = strtol(port, &p, 10);
1359     if (*p == 0) {
1360         /* A numeric value is interpreted as a port number.  */
1361         snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
1362                  "tcp::%d,nowait,nodelay,server", port_num);
1363         port = gdbstub_port_name;
1364     }
1365
1366     chr = qemu_chr_open(port);
1367     if (!chr)
1368         return -1;
1369
1370     s = qemu_mallocz(sizeof(GDBState));
1371     if (!s) {
1372         return -1;
1373     }
1374     s->env = first_cpu; /* XXX: allow to change CPU */
1375     s->chr = chr;
1376     qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
1377                           gdb_chr_event, s);
1378     qemu_add_vm_stop_handler(gdb_vm_stopped, s);
1379     return 0;
1380 }
1381 #endif